1718dceddSDavid Howells /************************************************************************** 2718dceddSDavid Howells * 3718dceddSDavid Howells * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA 4718dceddSDavid Howells * All Rights Reserved. 5718dceddSDavid Howells * 6718dceddSDavid Howells * Permission is hereby granted, free of charge, to any person obtaining a 7718dceddSDavid Howells * copy of this software and associated documentation files (the 8718dceddSDavid Howells * "Software"), to deal in the Software without restriction, including 9718dceddSDavid Howells * without limitation the rights to use, copy, modify, merge, publish, 10718dceddSDavid Howells * distribute, sub license, and/or sell copies of the Software, and to 11718dceddSDavid Howells * permit persons to whom the Software is furnished to do so, subject to 12718dceddSDavid Howells * the following conditions: 13718dceddSDavid Howells * 14718dceddSDavid Howells * The above copyright notice and this permission notice (including the 15718dceddSDavid Howells * next paragraph) shall be included in all copies or substantial portions 16718dceddSDavid Howells * of the Software. 17718dceddSDavid Howells * 18718dceddSDavid Howells * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19718dceddSDavid Howells * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20718dceddSDavid Howells * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 21718dceddSDavid Howells * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 22718dceddSDavid Howells * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 23718dceddSDavid Howells * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 24718dceddSDavid Howells * USE OR OTHER DEALINGS IN THE SOFTWARE. 25718dceddSDavid Howells * 26718dceddSDavid Howells **************************************************************************/ 27718dceddSDavid Howells 28718dceddSDavid Howells #ifndef __VMWGFX_DRM_H__ 29718dceddSDavid Howells #define __VMWGFX_DRM_H__ 30718dceddSDavid Howells 311d7a5cbfSThomas Hellstrom #ifndef __KERNEL__ 32e351943bSJosh Boyer #include <drm/drm.h> 331d7a5cbfSThomas Hellstrom #endif 341d7a5cbfSThomas Hellstrom 35718dceddSDavid Howells #define DRM_VMW_MAX_SURFACE_FACES 6 36718dceddSDavid Howells #define DRM_VMW_MAX_MIP_LEVELS 24 37718dceddSDavid Howells 38718dceddSDavid Howells 39718dceddSDavid Howells #define DRM_VMW_GET_PARAM 0 40718dceddSDavid Howells #define DRM_VMW_ALLOC_DMABUF 1 41718dceddSDavid Howells #define DRM_VMW_UNREF_DMABUF 2 42718dceddSDavid Howells #define DRM_VMW_CURSOR_BYPASS 3 43718dceddSDavid Howells /* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/ 44718dceddSDavid Howells #define DRM_VMW_CONTROL_STREAM 4 45718dceddSDavid Howells #define DRM_VMW_CLAIM_STREAM 5 46718dceddSDavid Howells #define DRM_VMW_UNREF_STREAM 6 47718dceddSDavid Howells /* guarded by DRM_VMW_PARAM_3D == 1 */ 48718dceddSDavid Howells #define DRM_VMW_CREATE_CONTEXT 7 49718dceddSDavid Howells #define DRM_VMW_UNREF_CONTEXT 8 50718dceddSDavid Howells #define DRM_VMW_CREATE_SURFACE 9 51718dceddSDavid Howells #define DRM_VMW_UNREF_SURFACE 10 52718dceddSDavid Howells #define DRM_VMW_REF_SURFACE 11 53718dceddSDavid Howells #define DRM_VMW_EXECBUF 12 54718dceddSDavid Howells #define DRM_VMW_GET_3D_CAP 13 55718dceddSDavid Howells #define DRM_VMW_FENCE_WAIT 14 56718dceddSDavid Howells #define DRM_VMW_FENCE_SIGNALED 15 57718dceddSDavid Howells #define DRM_VMW_FENCE_UNREF 16 58718dceddSDavid Howells #define DRM_VMW_FENCE_EVENT 17 59718dceddSDavid Howells #define DRM_VMW_PRESENT 18 60718dceddSDavid Howells #define DRM_VMW_PRESENT_READBACK 19 61718dceddSDavid Howells #define DRM_VMW_UPDATE_LAYOUT 20 62cfe4d53eSThomas Hellstrom #define DRM_VMW_CREATE_SHADER 21 63cfe4d53eSThomas Hellstrom #define DRM_VMW_UNREF_SHADER 22 64cfe4d53eSThomas Hellstrom #define DRM_VMW_GB_SURFACE_CREATE 23 65cfe4d53eSThomas Hellstrom #define DRM_VMW_GB_SURFACE_REF 24 661d7a5cbfSThomas Hellstrom #define DRM_VMW_SYNCCPU 25 67d80efd5cSThomas Hellstrom #define DRM_VMW_CREATE_EXTENDED_CONTEXT 26 68718dceddSDavid Howells 69718dceddSDavid Howells /*************************************************************************/ 70718dceddSDavid Howells /** 71718dceddSDavid Howells * DRM_VMW_GET_PARAM - get device information. 72718dceddSDavid Howells * 73718dceddSDavid Howells * DRM_VMW_PARAM_FIFO_OFFSET: 74718dceddSDavid Howells * Offset to use to map the first page of the FIFO read-only. 75718dceddSDavid Howells * The fifo is mapped using the mmap() system call on the drm device. 76718dceddSDavid Howells * 77718dceddSDavid Howells * DRM_VMW_PARAM_OVERLAY_IOCTL: 78718dceddSDavid Howells * Does the driver support the overlay ioctl. 79718dceddSDavid Howells */ 80718dceddSDavid Howells 81718dceddSDavid Howells #define DRM_VMW_PARAM_NUM_STREAMS 0 82718dceddSDavid Howells #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1 83718dceddSDavid Howells #define DRM_VMW_PARAM_3D 2 84718dceddSDavid Howells #define DRM_VMW_PARAM_HW_CAPS 3 85718dceddSDavid Howells #define DRM_VMW_PARAM_FIFO_CAPS 4 86718dceddSDavid Howells #define DRM_VMW_PARAM_MAX_FB_SIZE 5 87718dceddSDavid Howells #define DRM_VMW_PARAM_FIFO_HW_VERSION 6 88cfe4d53eSThomas Hellstrom #define DRM_VMW_PARAM_MAX_SURF_MEMORY 7 89cfe4d53eSThomas Hellstrom #define DRM_VMW_PARAM_3D_CAPS_SIZE 8 90311474dbSThomas Hellstrom #define DRM_VMW_PARAM_MAX_MOB_MEMORY 9 91857aea1cSCharmaine Lee #define DRM_VMW_PARAM_MAX_MOB_SIZE 10 9235c05125SSinclair Yeh #define DRM_VMW_PARAM_SCREEN_TARGET 11 93d80efd5cSThomas Hellstrom #define DRM_VMW_PARAM_DX 12 94718dceddSDavid Howells 95718dceddSDavid Howells /** 96adebcb20SThomas Hellstrom * enum drm_vmw_handle_type - handle type for ref ioctls 97adebcb20SThomas Hellstrom * 98adebcb20SThomas Hellstrom */ 99adebcb20SThomas Hellstrom enum drm_vmw_handle_type { 100adebcb20SThomas Hellstrom DRM_VMW_HANDLE_LEGACY = 0, 101adebcb20SThomas Hellstrom DRM_VMW_HANDLE_PRIME = 1 102adebcb20SThomas Hellstrom }; 103adebcb20SThomas Hellstrom 104adebcb20SThomas Hellstrom /** 105718dceddSDavid Howells * struct drm_vmw_getparam_arg 106718dceddSDavid Howells * 107718dceddSDavid Howells * @value: Returned value. //Out 108718dceddSDavid Howells * @param: Parameter to query. //In. 109718dceddSDavid Howells * 110718dceddSDavid Howells * Argument to the DRM_VMW_GET_PARAM Ioctl. 111718dceddSDavid Howells */ 112718dceddSDavid Howells 113718dceddSDavid Howells struct drm_vmw_getparam_arg { 114718dceddSDavid Howells uint64_t value; 115718dceddSDavid Howells uint32_t param; 116718dceddSDavid Howells uint32_t pad64; 117718dceddSDavid Howells }; 118718dceddSDavid Howells 119718dceddSDavid Howells /*************************************************************************/ 120718dceddSDavid Howells /** 121718dceddSDavid Howells * DRM_VMW_CREATE_CONTEXT - Create a host context. 122718dceddSDavid Howells * 123718dceddSDavid Howells * Allocates a device unique context id, and queues a create context command 124718dceddSDavid Howells * for the host. Does not wait for host completion. 125718dceddSDavid Howells */ 126718dceddSDavid Howells 127718dceddSDavid Howells /** 128718dceddSDavid Howells * struct drm_vmw_context_arg 129718dceddSDavid Howells * 130718dceddSDavid Howells * @cid: Device unique context ID. 131718dceddSDavid Howells * 132718dceddSDavid Howells * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. 133718dceddSDavid Howells * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. 134718dceddSDavid Howells */ 135718dceddSDavid Howells 136718dceddSDavid Howells struct drm_vmw_context_arg { 137718dceddSDavid Howells int32_t cid; 138718dceddSDavid Howells uint32_t pad64; 139718dceddSDavid Howells }; 140718dceddSDavid Howells 141718dceddSDavid Howells /*************************************************************************/ 142718dceddSDavid Howells /** 143718dceddSDavid Howells * DRM_VMW_UNREF_CONTEXT - Create a host context. 144718dceddSDavid Howells * 145718dceddSDavid Howells * Frees a global context id, and queues a destroy host command for the host. 146718dceddSDavid Howells * Does not wait for host completion. The context ID can be used directly 147718dceddSDavid Howells * in the command stream and shows up as the same context ID on the host. 148718dceddSDavid Howells */ 149718dceddSDavid Howells 150718dceddSDavid Howells /*************************************************************************/ 151718dceddSDavid Howells /** 152718dceddSDavid Howells * DRM_VMW_CREATE_SURFACE - Create a host suface. 153718dceddSDavid Howells * 154718dceddSDavid Howells * Allocates a device unique surface id, and queues a create surface command 155718dceddSDavid Howells * for the host. Does not wait for host completion. The surface ID can be 156718dceddSDavid Howells * used directly in the command stream and shows up as the same surface 157718dceddSDavid Howells * ID on the host. 158718dceddSDavid Howells */ 159718dceddSDavid Howells 160718dceddSDavid Howells /** 161718dceddSDavid Howells * struct drm_wmv_surface_create_req 162718dceddSDavid Howells * 163718dceddSDavid Howells * @flags: Surface flags as understood by the host. 164718dceddSDavid Howells * @format: Surface format as understood by the host. 165718dceddSDavid Howells * @mip_levels: Number of mip levels for each face. 166718dceddSDavid Howells * An unused face should have 0 encoded. 167718dceddSDavid Howells * @size_addr: Address of a user-space array of sruct drm_vmw_size 168718dceddSDavid Howells * cast to an uint64_t for 32-64 bit compatibility. 169718dceddSDavid Howells * The size of the array should equal the total number of mipmap levels. 170718dceddSDavid Howells * @shareable: Boolean whether other clients (as identified by file descriptors) 171718dceddSDavid Howells * may reference this surface. 172718dceddSDavid Howells * @scanout: Boolean whether the surface is intended to be used as a 173718dceddSDavid Howells * scanout. 174718dceddSDavid Howells * 175718dceddSDavid Howells * Input data to the DRM_VMW_CREATE_SURFACE Ioctl. 176718dceddSDavid Howells * Output data from the DRM_VMW_REF_SURFACE Ioctl. 177718dceddSDavid Howells */ 178718dceddSDavid Howells 179718dceddSDavid Howells struct drm_vmw_surface_create_req { 180718dceddSDavid Howells uint32_t flags; 181718dceddSDavid Howells uint32_t format; 182718dceddSDavid Howells uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES]; 183718dceddSDavid Howells uint64_t size_addr; 184718dceddSDavid Howells int32_t shareable; 185718dceddSDavid Howells int32_t scanout; 186718dceddSDavid Howells }; 187718dceddSDavid Howells 188718dceddSDavid Howells /** 189718dceddSDavid Howells * struct drm_wmv_surface_arg 190718dceddSDavid Howells * 191718dceddSDavid Howells * @sid: Surface id of created surface or surface to destroy or reference. 192adebcb20SThomas Hellstrom * @handle_type: Handle type for DRM_VMW_REF_SURFACE Ioctl. 193718dceddSDavid Howells * 194718dceddSDavid Howells * Output data from the DRM_VMW_CREATE_SURFACE Ioctl. 195718dceddSDavid Howells * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl. 196718dceddSDavid Howells * Input argument to the DRM_VMW_REF_SURFACE Ioctl. 197718dceddSDavid Howells */ 198718dceddSDavid Howells 199718dceddSDavid Howells struct drm_vmw_surface_arg { 200718dceddSDavid Howells int32_t sid; 201adebcb20SThomas Hellstrom enum drm_vmw_handle_type handle_type; 202718dceddSDavid Howells }; 203718dceddSDavid Howells 204718dceddSDavid Howells /** 205718dceddSDavid Howells * struct drm_vmw_size ioctl. 206718dceddSDavid Howells * 207718dceddSDavid Howells * @width - mip level width 208718dceddSDavid Howells * @height - mip level height 209718dceddSDavid Howells * @depth - mip level depth 210718dceddSDavid Howells * 211718dceddSDavid Howells * Description of a mip level. 212718dceddSDavid Howells * Input data to the DRM_WMW_CREATE_SURFACE Ioctl. 213718dceddSDavid Howells */ 214718dceddSDavid Howells 215718dceddSDavid Howells struct drm_vmw_size { 216718dceddSDavid Howells uint32_t width; 217718dceddSDavid Howells uint32_t height; 218718dceddSDavid Howells uint32_t depth; 219718dceddSDavid Howells uint32_t pad64; 220718dceddSDavid Howells }; 221718dceddSDavid Howells 222718dceddSDavid Howells /** 223718dceddSDavid Howells * union drm_vmw_surface_create_arg 224718dceddSDavid Howells * 225718dceddSDavid Howells * @rep: Output data as described above. 226718dceddSDavid Howells * @req: Input data as described above. 227718dceddSDavid Howells * 228718dceddSDavid Howells * Argument to the DRM_VMW_CREATE_SURFACE Ioctl. 229718dceddSDavid Howells */ 230718dceddSDavid Howells 231718dceddSDavid Howells union drm_vmw_surface_create_arg { 232718dceddSDavid Howells struct drm_vmw_surface_arg rep; 233718dceddSDavid Howells struct drm_vmw_surface_create_req req; 234718dceddSDavid Howells }; 235718dceddSDavid Howells 236718dceddSDavid Howells /*************************************************************************/ 237718dceddSDavid Howells /** 238718dceddSDavid Howells * DRM_VMW_REF_SURFACE - Reference a host surface. 239718dceddSDavid Howells * 240718dceddSDavid Howells * Puts a reference on a host surface with a give sid, as previously 241718dceddSDavid Howells * returned by the DRM_VMW_CREATE_SURFACE ioctl. 242718dceddSDavid Howells * A reference will make sure the surface isn't destroyed while we hold 243718dceddSDavid Howells * it and will allow the calling client to use the surface ID in the command 244718dceddSDavid Howells * stream. 245718dceddSDavid Howells * 246718dceddSDavid Howells * On successful return, the Ioctl returns the surface information given 247718dceddSDavid Howells * in the DRM_VMW_CREATE_SURFACE ioctl. 248718dceddSDavid Howells */ 249718dceddSDavid Howells 250718dceddSDavid Howells /** 251718dceddSDavid Howells * union drm_vmw_surface_reference_arg 252718dceddSDavid Howells * 253718dceddSDavid Howells * @rep: Output data as described above. 254718dceddSDavid Howells * @req: Input data as described above. 255718dceddSDavid Howells * 256718dceddSDavid Howells * Argument to the DRM_VMW_REF_SURFACE Ioctl. 257718dceddSDavid Howells */ 258718dceddSDavid Howells 259718dceddSDavid Howells union drm_vmw_surface_reference_arg { 260718dceddSDavid Howells struct drm_vmw_surface_create_req rep; 261718dceddSDavid Howells struct drm_vmw_surface_arg req; 262718dceddSDavid Howells }; 263718dceddSDavid Howells 264718dceddSDavid Howells /*************************************************************************/ 265718dceddSDavid Howells /** 266718dceddSDavid Howells * DRM_VMW_UNREF_SURFACE - Unreference a host surface. 267718dceddSDavid Howells * 268718dceddSDavid Howells * Clear a reference previously put on a host surface. 269718dceddSDavid Howells * When all references are gone, including the one implicitly placed 270718dceddSDavid Howells * on creation, 271718dceddSDavid Howells * a destroy surface command will be queued for the host. 272718dceddSDavid Howells * Does not wait for completion. 273718dceddSDavid Howells */ 274718dceddSDavid Howells 275718dceddSDavid Howells /*************************************************************************/ 276718dceddSDavid Howells /** 277718dceddSDavid Howells * DRM_VMW_EXECBUF 278718dceddSDavid Howells * 279718dceddSDavid Howells * Submit a command buffer for execution on the host, and return a 280718dceddSDavid Howells * fence seqno that when signaled, indicates that the command buffer has 281718dceddSDavid Howells * executed. 282718dceddSDavid Howells */ 283718dceddSDavid Howells 284718dceddSDavid Howells /** 285718dceddSDavid Howells * struct drm_vmw_execbuf_arg 286718dceddSDavid Howells * 287718dceddSDavid Howells * @commands: User-space address of a command buffer cast to an uint64_t. 288718dceddSDavid Howells * @command-size: Size in bytes of the command buffer. 289718dceddSDavid Howells * @throttle-us: Sleep until software is less than @throttle_us 290718dceddSDavid Howells * microseconds ahead of hardware. The driver may round this value 291718dceddSDavid Howells * to the nearest kernel tick. 292718dceddSDavid Howells * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an 293718dceddSDavid Howells * uint64_t. 294718dceddSDavid Howells * @version: Allows expanding the execbuf ioctl parameters without breaking 295718dceddSDavid Howells * backwards compatibility, since user-space will always tell the kernel 296718dceddSDavid Howells * which version it uses. 297718dceddSDavid Howells * @flags: Execbuf flags. None currently. 298718dceddSDavid Howells * 299718dceddSDavid Howells * Argument to the DRM_VMW_EXECBUF Ioctl. 300718dceddSDavid Howells */ 301718dceddSDavid Howells 302d80efd5cSThomas Hellstrom #define DRM_VMW_EXECBUF_VERSION 2 303718dceddSDavid Howells 304718dceddSDavid Howells struct drm_vmw_execbuf_arg { 305718dceddSDavid Howells uint64_t commands; 306718dceddSDavid Howells uint32_t command_size; 307718dceddSDavid Howells uint32_t throttle_us; 308718dceddSDavid Howells uint64_t fence_rep; 309718dceddSDavid Howells uint32_t version; 310718dceddSDavid Howells uint32_t flags; 311d80efd5cSThomas Hellstrom uint32_t context_handle; 312d80efd5cSThomas Hellstrom uint32_t pad64; 313718dceddSDavid Howells }; 314718dceddSDavid Howells 315718dceddSDavid Howells /** 316718dceddSDavid Howells * struct drm_vmw_fence_rep 317718dceddSDavid Howells * 318718dceddSDavid Howells * @handle: Fence object handle for fence associated with a command submission. 319718dceddSDavid Howells * @mask: Fence flags relevant for this fence object. 320718dceddSDavid Howells * @seqno: Fence sequence number in fifo. A fence object with a lower 321718dceddSDavid Howells * seqno will signal the EXEC flag before a fence object with a higher 322718dceddSDavid Howells * seqno. This can be used by user-space to avoid kernel calls to determine 323718dceddSDavid Howells * whether a fence has signaled the EXEC flag. Note that @seqno will 324718dceddSDavid Howells * wrap at 32-bit. 325718dceddSDavid Howells * @passed_seqno: The highest seqno number processed by the hardware 326718dceddSDavid Howells * so far. This can be used to mark user-space fence objects as signaled, and 327718dceddSDavid Howells * to determine whether a fence seqno might be stale. 328718dceddSDavid Howells * @error: This member should've been set to -EFAULT on submission. 329718dceddSDavid Howells * The following actions should be take on completion: 330718dceddSDavid Howells * error == -EFAULT: Fence communication failed. The host is synchronized. 331718dceddSDavid Howells * Use the last fence id read from the FIFO fence register. 332718dceddSDavid Howells * error != 0 && error != -EFAULT: 333718dceddSDavid Howells * Fence submission failed. The host is synchronized. Use the fence_seq member. 334718dceddSDavid Howells * error == 0: All is OK, The host may not be synchronized. 335718dceddSDavid Howells * Use the fence_seq member. 336718dceddSDavid Howells * 337718dceddSDavid Howells * Input / Output data to the DRM_VMW_EXECBUF Ioctl. 338718dceddSDavid Howells */ 339718dceddSDavid Howells 340718dceddSDavid Howells struct drm_vmw_fence_rep { 341718dceddSDavid Howells uint32_t handle; 342718dceddSDavid Howells uint32_t mask; 343718dceddSDavid Howells uint32_t seqno; 344718dceddSDavid Howells uint32_t passed_seqno; 345718dceddSDavid Howells uint32_t pad64; 346718dceddSDavid Howells int32_t error; 347718dceddSDavid Howells }; 348718dceddSDavid Howells 349718dceddSDavid Howells /*************************************************************************/ 350718dceddSDavid Howells /** 351718dceddSDavid Howells * DRM_VMW_ALLOC_DMABUF 352718dceddSDavid Howells * 353718dceddSDavid Howells * Allocate a DMA buffer that is visible also to the host. 354718dceddSDavid Howells * NOTE: The buffer is 355718dceddSDavid Howells * identified by a handle and an offset, which are private to the guest, but 356718dceddSDavid Howells * useable in the command stream. The guest kernel may translate these 357718dceddSDavid Howells * and patch up the command stream accordingly. In the future, the offset may 358718dceddSDavid Howells * be zero at all times, or it may disappear from the interface before it is 359718dceddSDavid Howells * fixed. 360718dceddSDavid Howells * 361718dceddSDavid Howells * The DMA buffer may stay user-space mapped in the guest at all times, 362718dceddSDavid Howells * and is thus suitable for sub-allocation. 363718dceddSDavid Howells * 364718dceddSDavid Howells * DMA buffers are mapped using the mmap() syscall on the drm device. 365718dceddSDavid Howells */ 366718dceddSDavid Howells 367718dceddSDavid Howells /** 368718dceddSDavid Howells * struct drm_vmw_alloc_dmabuf_req 369718dceddSDavid Howells * 370718dceddSDavid Howells * @size: Required minimum size of the buffer. 371718dceddSDavid Howells * 372718dceddSDavid Howells * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl. 373718dceddSDavid Howells */ 374718dceddSDavid Howells 375718dceddSDavid Howells struct drm_vmw_alloc_dmabuf_req { 376718dceddSDavid Howells uint32_t size; 377718dceddSDavid Howells uint32_t pad64; 378718dceddSDavid Howells }; 379718dceddSDavid Howells 380718dceddSDavid Howells /** 381718dceddSDavid Howells * struct drm_vmw_dmabuf_rep 382718dceddSDavid Howells * 383718dceddSDavid Howells * @map_handle: Offset to use in the mmap() call used to map the buffer. 384718dceddSDavid Howells * @handle: Handle unique to this buffer. Used for unreferencing. 385718dceddSDavid Howells * @cur_gmr_id: GMR id to use in the command stream when this buffer is 386718dceddSDavid Howells * referenced. See not above. 387718dceddSDavid Howells * @cur_gmr_offset: Offset to use in the command stream when this buffer is 388718dceddSDavid Howells * referenced. See note above. 389718dceddSDavid Howells * 390718dceddSDavid Howells * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl. 391718dceddSDavid Howells */ 392718dceddSDavid Howells 393718dceddSDavid Howells struct drm_vmw_dmabuf_rep { 394718dceddSDavid Howells uint64_t map_handle; 395718dceddSDavid Howells uint32_t handle; 396718dceddSDavid Howells uint32_t cur_gmr_id; 397718dceddSDavid Howells uint32_t cur_gmr_offset; 398718dceddSDavid Howells uint32_t pad64; 399718dceddSDavid Howells }; 400718dceddSDavid Howells 401718dceddSDavid Howells /** 402718dceddSDavid Howells * union drm_vmw_dmabuf_arg 403718dceddSDavid Howells * 404718dceddSDavid Howells * @req: Input data as described above. 405718dceddSDavid Howells * @rep: Output data as described above. 406718dceddSDavid Howells * 407718dceddSDavid Howells * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl. 408718dceddSDavid Howells */ 409718dceddSDavid Howells 410718dceddSDavid Howells union drm_vmw_alloc_dmabuf_arg { 411718dceddSDavid Howells struct drm_vmw_alloc_dmabuf_req req; 412718dceddSDavid Howells struct drm_vmw_dmabuf_rep rep; 413718dceddSDavid Howells }; 414718dceddSDavid Howells 415718dceddSDavid Howells /*************************************************************************/ 416718dceddSDavid Howells /** 417718dceddSDavid Howells * DRM_VMW_UNREF_DMABUF - Free a DMA buffer. 418718dceddSDavid Howells * 419718dceddSDavid Howells */ 420718dceddSDavid Howells 421718dceddSDavid Howells /** 422718dceddSDavid Howells * struct drm_vmw_unref_dmabuf_arg 423718dceddSDavid Howells * 424718dceddSDavid Howells * @handle: Handle indicating what buffer to free. Obtained from the 425718dceddSDavid Howells * DRM_VMW_ALLOC_DMABUF Ioctl. 426718dceddSDavid Howells * 427718dceddSDavid Howells * Argument to the DRM_VMW_UNREF_DMABUF Ioctl. 428718dceddSDavid Howells */ 429718dceddSDavid Howells 430718dceddSDavid Howells struct drm_vmw_unref_dmabuf_arg { 431718dceddSDavid Howells uint32_t handle; 432718dceddSDavid Howells uint32_t pad64; 433718dceddSDavid Howells }; 434718dceddSDavid Howells 435718dceddSDavid Howells /*************************************************************************/ 436718dceddSDavid Howells /** 437718dceddSDavid Howells * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams. 438718dceddSDavid Howells * 439718dceddSDavid Howells * This IOCTL controls the overlay units of the svga device. 440718dceddSDavid Howells * The SVGA overlay units does not work like regular hardware units in 441718dceddSDavid Howells * that they do not automaticaly read back the contents of the given dma 442718dceddSDavid Howells * buffer. But instead only read back for each call to this ioctl, and 443718dceddSDavid Howells * at any point between this call being made and a following call that 444718dceddSDavid Howells * either changes the buffer or disables the stream. 445718dceddSDavid Howells */ 446718dceddSDavid Howells 447718dceddSDavid Howells /** 448718dceddSDavid Howells * struct drm_vmw_rect 449718dceddSDavid Howells * 450718dceddSDavid Howells * Defines a rectangle. Used in the overlay ioctl to define 451718dceddSDavid Howells * source and destination rectangle. 452718dceddSDavid Howells */ 453718dceddSDavid Howells 454718dceddSDavid Howells struct drm_vmw_rect { 455718dceddSDavid Howells int32_t x; 456718dceddSDavid Howells int32_t y; 457718dceddSDavid Howells uint32_t w; 458718dceddSDavid Howells uint32_t h; 459718dceddSDavid Howells }; 460718dceddSDavid Howells 461718dceddSDavid Howells /** 462718dceddSDavid Howells * struct drm_vmw_control_stream_arg 463718dceddSDavid Howells * 464718dceddSDavid Howells * @stream_id: Stearm to control 465718dceddSDavid Howells * @enabled: If false all following arguments are ignored. 466718dceddSDavid Howells * @handle: Handle to buffer for getting data from. 467718dceddSDavid Howells * @format: Format of the overlay as understood by the host. 468718dceddSDavid Howells * @width: Width of the overlay. 469718dceddSDavid Howells * @height: Height of the overlay. 470718dceddSDavid Howells * @size: Size of the overlay in bytes. 471718dceddSDavid Howells * @pitch: Array of pitches, the two last are only used for YUV12 formats. 472718dceddSDavid Howells * @offset: Offset from start of dma buffer to overlay. 473718dceddSDavid Howells * @src: Source rect, must be within the defined area above. 474718dceddSDavid Howells * @dst: Destination rect, x and y may be negative. 475718dceddSDavid Howells * 476718dceddSDavid Howells * Argument to the DRM_VMW_CONTROL_STREAM Ioctl. 477718dceddSDavid Howells */ 478718dceddSDavid Howells 479718dceddSDavid Howells struct drm_vmw_control_stream_arg { 480718dceddSDavid Howells uint32_t stream_id; 481718dceddSDavid Howells uint32_t enabled; 482718dceddSDavid Howells 483718dceddSDavid Howells uint32_t flags; 484718dceddSDavid Howells uint32_t color_key; 485718dceddSDavid Howells 486718dceddSDavid Howells uint32_t handle; 487718dceddSDavid Howells uint32_t offset; 488718dceddSDavid Howells int32_t format; 489718dceddSDavid Howells uint32_t size; 490718dceddSDavid Howells uint32_t width; 491718dceddSDavid Howells uint32_t height; 492718dceddSDavid Howells uint32_t pitch[3]; 493718dceddSDavid Howells 494718dceddSDavid Howells uint32_t pad64; 495718dceddSDavid Howells struct drm_vmw_rect src; 496718dceddSDavid Howells struct drm_vmw_rect dst; 497718dceddSDavid Howells }; 498718dceddSDavid Howells 499718dceddSDavid Howells /*************************************************************************/ 500718dceddSDavid Howells /** 501718dceddSDavid Howells * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass. 502718dceddSDavid Howells * 503718dceddSDavid Howells */ 504718dceddSDavid Howells 505718dceddSDavid Howells #define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0) 506718dceddSDavid Howells #define DRM_VMW_CURSOR_BYPASS_FLAGS (1) 507718dceddSDavid Howells 508718dceddSDavid Howells /** 509718dceddSDavid Howells * struct drm_vmw_cursor_bypass_arg 510718dceddSDavid Howells * 511718dceddSDavid Howells * @flags: Flags. 512718dceddSDavid Howells * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed. 513718dceddSDavid Howells * @xpos: X position of cursor. 514718dceddSDavid Howells * @ypos: Y position of cursor. 515718dceddSDavid Howells * @xhot: X hotspot. 516718dceddSDavid Howells * @yhot: Y hotspot. 517718dceddSDavid Howells * 518718dceddSDavid Howells * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl. 519718dceddSDavid Howells */ 520718dceddSDavid Howells 521718dceddSDavid Howells struct drm_vmw_cursor_bypass_arg { 522718dceddSDavid Howells uint32_t flags; 523718dceddSDavid Howells uint32_t crtc_id; 524718dceddSDavid Howells int32_t xpos; 525718dceddSDavid Howells int32_t ypos; 526718dceddSDavid Howells int32_t xhot; 527718dceddSDavid Howells int32_t yhot; 528718dceddSDavid Howells }; 529718dceddSDavid Howells 530718dceddSDavid Howells /*************************************************************************/ 531718dceddSDavid Howells /** 532718dceddSDavid Howells * DRM_VMW_CLAIM_STREAM - Claim a single stream. 533718dceddSDavid Howells */ 534718dceddSDavid Howells 535718dceddSDavid Howells /** 536718dceddSDavid Howells * struct drm_vmw_context_arg 537718dceddSDavid Howells * 538718dceddSDavid Howells * @stream_id: Device unique context ID. 539718dceddSDavid Howells * 540718dceddSDavid Howells * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. 541718dceddSDavid Howells * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. 542718dceddSDavid Howells */ 543718dceddSDavid Howells 544718dceddSDavid Howells struct drm_vmw_stream_arg { 545718dceddSDavid Howells uint32_t stream_id; 546718dceddSDavid Howells uint32_t pad64; 547718dceddSDavid Howells }; 548718dceddSDavid Howells 549718dceddSDavid Howells /*************************************************************************/ 550718dceddSDavid Howells /** 551718dceddSDavid Howells * DRM_VMW_UNREF_STREAM - Unclaim a stream. 552718dceddSDavid Howells * 553718dceddSDavid Howells * Return a single stream that was claimed by this process. Also makes 554718dceddSDavid Howells * sure that the stream has been stopped. 555718dceddSDavid Howells */ 556718dceddSDavid Howells 557718dceddSDavid Howells /*************************************************************************/ 558718dceddSDavid Howells /** 559718dceddSDavid Howells * DRM_VMW_GET_3D_CAP 560718dceddSDavid Howells * 561718dceddSDavid Howells * Read 3D capabilities from the FIFO 562718dceddSDavid Howells * 563718dceddSDavid Howells */ 564718dceddSDavid Howells 565718dceddSDavid Howells /** 566718dceddSDavid Howells * struct drm_vmw_get_3d_cap_arg 567718dceddSDavid Howells * 568718dceddSDavid Howells * @buffer: Pointer to a buffer for capability data, cast to an uint64_t 569718dceddSDavid Howells * @size: Max size to copy 570718dceddSDavid Howells * 571718dceddSDavid Howells * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL 572718dceddSDavid Howells * ioctls. 573718dceddSDavid Howells */ 574718dceddSDavid Howells 575718dceddSDavid Howells struct drm_vmw_get_3d_cap_arg { 576718dceddSDavid Howells uint64_t buffer; 577718dceddSDavid Howells uint32_t max_size; 578718dceddSDavid Howells uint32_t pad64; 579718dceddSDavid Howells }; 580718dceddSDavid Howells 581718dceddSDavid Howells /*************************************************************************/ 582718dceddSDavid Howells /** 583718dceddSDavid Howells * DRM_VMW_FENCE_WAIT 584718dceddSDavid Howells * 585718dceddSDavid Howells * Waits for a fence object to signal. The wait is interruptible, so that 586718dceddSDavid Howells * signals may be delivered during the interrupt. The wait may timeout, 587718dceddSDavid Howells * in which case the calls returns -EBUSY. If the wait is restarted, 588718dceddSDavid Howells * that is restarting without resetting @cookie_valid to zero, 589718dceddSDavid Howells * the timeout is computed from the first call. 590718dceddSDavid Howells * 591718dceddSDavid Howells * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait 592718dceddSDavid Howells * on: 593718dceddSDavid Howells * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command 594718dceddSDavid Howells * stream 595718dceddSDavid Howells * have executed. 596718dceddSDavid Howells * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish 597718dceddSDavid Howells * commands 598718dceddSDavid Howells * in the buffer given to the EXECBUF ioctl returning the fence object handle 599718dceddSDavid Howells * are available to user-space. 600718dceddSDavid Howells * 601718dceddSDavid Howells * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the 602718dceddSDavid Howells * fenc wait ioctl returns 0, the fence object has been unreferenced after 603718dceddSDavid Howells * the wait. 604718dceddSDavid Howells */ 605718dceddSDavid Howells 606718dceddSDavid Howells #define DRM_VMW_FENCE_FLAG_EXEC (1 << 0) 607718dceddSDavid Howells #define DRM_VMW_FENCE_FLAG_QUERY (1 << 1) 608718dceddSDavid Howells 609718dceddSDavid Howells #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0) 610718dceddSDavid Howells 611718dceddSDavid Howells /** 612718dceddSDavid Howells * struct drm_vmw_fence_wait_arg 613718dceddSDavid Howells * 614718dceddSDavid Howells * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 615718dceddSDavid Howells * @cookie_valid: Must be reset to 0 on first call. Left alone on restart. 616718dceddSDavid Howells * @kernel_cookie: Set to 0 on first call. Left alone on restart. 617718dceddSDavid Howells * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout. 618718dceddSDavid Howells * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick 619718dceddSDavid Howells * before returning. 620718dceddSDavid Howells * @flags: Fence flags to wait on. 621718dceddSDavid Howells * @wait_options: Options that control the behaviour of the wait ioctl. 622718dceddSDavid Howells * 623718dceddSDavid Howells * Input argument to the DRM_VMW_FENCE_WAIT ioctl. 624718dceddSDavid Howells */ 625718dceddSDavid Howells 626718dceddSDavid Howells struct drm_vmw_fence_wait_arg { 627718dceddSDavid Howells uint32_t handle; 628718dceddSDavid Howells int32_t cookie_valid; 629718dceddSDavid Howells uint64_t kernel_cookie; 630718dceddSDavid Howells uint64_t timeout_us; 631718dceddSDavid Howells int32_t lazy; 632718dceddSDavid Howells int32_t flags; 633718dceddSDavid Howells int32_t wait_options; 634718dceddSDavid Howells int32_t pad64; 635718dceddSDavid Howells }; 636718dceddSDavid Howells 637718dceddSDavid Howells /*************************************************************************/ 638718dceddSDavid Howells /** 639718dceddSDavid Howells * DRM_VMW_FENCE_SIGNALED 640718dceddSDavid Howells * 641718dceddSDavid Howells * Checks if a fence object is signaled.. 642718dceddSDavid Howells */ 643718dceddSDavid Howells 644718dceddSDavid Howells /** 645718dceddSDavid Howells * struct drm_vmw_fence_signaled_arg 646718dceddSDavid Howells * 647718dceddSDavid Howells * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 648718dceddSDavid Howells * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl 649718dceddSDavid Howells * @signaled: Out: Flags signaled. 650718dceddSDavid Howells * @sequence: Out: Highest sequence passed so far. Can be used to signal the 651718dceddSDavid Howells * EXEC flag of user-space fence objects. 652718dceddSDavid Howells * 653718dceddSDavid Howells * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF 654718dceddSDavid Howells * ioctls. 655718dceddSDavid Howells */ 656718dceddSDavid Howells 657718dceddSDavid Howells struct drm_vmw_fence_signaled_arg { 658718dceddSDavid Howells uint32_t handle; 659718dceddSDavid Howells uint32_t flags; 660718dceddSDavid Howells int32_t signaled; 661718dceddSDavid Howells uint32_t passed_seqno; 662718dceddSDavid Howells uint32_t signaled_flags; 663718dceddSDavid Howells uint32_t pad64; 664718dceddSDavid Howells }; 665718dceddSDavid Howells 666718dceddSDavid Howells /*************************************************************************/ 667718dceddSDavid Howells /** 668718dceddSDavid Howells * DRM_VMW_FENCE_UNREF 669718dceddSDavid Howells * 670718dceddSDavid Howells * Unreferences a fence object, and causes it to be destroyed if there are no 671718dceddSDavid Howells * other references to it. 672718dceddSDavid Howells * 673718dceddSDavid Howells */ 674718dceddSDavid Howells 675718dceddSDavid Howells /** 676718dceddSDavid Howells * struct drm_vmw_fence_arg 677718dceddSDavid Howells * 678718dceddSDavid Howells * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 679718dceddSDavid Howells * 680718dceddSDavid Howells * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl.. 681718dceddSDavid Howells */ 682718dceddSDavid Howells 683718dceddSDavid Howells struct drm_vmw_fence_arg { 684718dceddSDavid Howells uint32_t handle; 685718dceddSDavid Howells uint32_t pad64; 686718dceddSDavid Howells }; 687718dceddSDavid Howells 688718dceddSDavid Howells 689718dceddSDavid Howells /*************************************************************************/ 690718dceddSDavid Howells /** 691718dceddSDavid Howells * DRM_VMW_FENCE_EVENT 692718dceddSDavid Howells * 693718dceddSDavid Howells * Queues an event on a fence to be delivered on the drm character device 694718dceddSDavid Howells * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag. 695718dceddSDavid Howells * Optionally the approximate time when the fence signaled is 696718dceddSDavid Howells * given by the event. 697718dceddSDavid Howells */ 698718dceddSDavid Howells 699718dceddSDavid Howells /* 700718dceddSDavid Howells * The event type 701718dceddSDavid Howells */ 702718dceddSDavid Howells #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000 703718dceddSDavid Howells 704718dceddSDavid Howells struct drm_vmw_event_fence { 705718dceddSDavid Howells struct drm_event base; 706718dceddSDavid Howells uint64_t user_data; 707718dceddSDavid Howells uint32_t tv_sec; 708718dceddSDavid Howells uint32_t tv_usec; 709718dceddSDavid Howells }; 710718dceddSDavid Howells 711718dceddSDavid Howells /* 712718dceddSDavid Howells * Flags that may be given to the command. 713718dceddSDavid Howells */ 714718dceddSDavid Howells /* Request fence signaled time on the event. */ 715718dceddSDavid Howells #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0) 716718dceddSDavid Howells 717718dceddSDavid Howells /** 718718dceddSDavid Howells * struct drm_vmw_fence_event_arg 719718dceddSDavid Howells * 720718dceddSDavid Howells * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if 721718dceddSDavid Howells * the fence is not supposed to be referenced by user-space. 722718dceddSDavid Howells * @user_info: Info to be delivered with the event. 723718dceddSDavid Howells * @handle: Attach the event to this fence only. 724718dceddSDavid Howells * @flags: A set of flags as defined above. 725718dceddSDavid Howells */ 726718dceddSDavid Howells struct drm_vmw_fence_event_arg { 727718dceddSDavid Howells uint64_t fence_rep; 728718dceddSDavid Howells uint64_t user_data; 729718dceddSDavid Howells uint32_t handle; 730718dceddSDavid Howells uint32_t flags; 731718dceddSDavid Howells }; 732718dceddSDavid Howells 733718dceddSDavid Howells 734718dceddSDavid Howells /*************************************************************************/ 735718dceddSDavid Howells /** 736718dceddSDavid Howells * DRM_VMW_PRESENT 737718dceddSDavid Howells * 738718dceddSDavid Howells * Executes an SVGA present on a given fb for a given surface. The surface 739718dceddSDavid Howells * is placed on the framebuffer. Cliprects are given relative to the given 740718dceddSDavid Howells * point (the point disignated by dest_{x|y}). 741718dceddSDavid Howells * 742718dceddSDavid Howells */ 743718dceddSDavid Howells 744718dceddSDavid Howells /** 745718dceddSDavid Howells * struct drm_vmw_present_arg 746718dceddSDavid Howells * @fb_id: framebuffer id to present / read back from. 747718dceddSDavid Howells * @sid: Surface id to present from. 748718dceddSDavid Howells * @dest_x: X placement coordinate for surface. 749718dceddSDavid Howells * @dest_y: Y placement coordinate for surface. 750718dceddSDavid Howells * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t. 751718dceddSDavid Howells * @num_clips: Number of cliprects given relative to the framebuffer origin, 752718dceddSDavid Howells * in the same coordinate space as the frame buffer. 753718dceddSDavid Howells * @pad64: Unused 64-bit padding. 754718dceddSDavid Howells * 755718dceddSDavid Howells * Input argument to the DRM_VMW_PRESENT ioctl. 756718dceddSDavid Howells */ 757718dceddSDavid Howells 758718dceddSDavid Howells struct drm_vmw_present_arg { 759718dceddSDavid Howells uint32_t fb_id; 760718dceddSDavid Howells uint32_t sid; 761718dceddSDavid Howells int32_t dest_x; 762718dceddSDavid Howells int32_t dest_y; 763718dceddSDavid Howells uint64_t clips_ptr; 764718dceddSDavid Howells uint32_t num_clips; 765718dceddSDavid Howells uint32_t pad64; 766718dceddSDavid Howells }; 767718dceddSDavid Howells 768718dceddSDavid Howells 769718dceddSDavid Howells /*************************************************************************/ 770718dceddSDavid Howells /** 771718dceddSDavid Howells * DRM_VMW_PRESENT_READBACK 772718dceddSDavid Howells * 773718dceddSDavid Howells * Executes an SVGA present readback from a given fb to the dma buffer 774718dceddSDavid Howells * currently bound as the fb. If there is no dma buffer bound to the fb, 775718dceddSDavid Howells * an error will be returned. 776718dceddSDavid Howells * 777718dceddSDavid Howells */ 778718dceddSDavid Howells 779718dceddSDavid Howells /** 780718dceddSDavid Howells * struct drm_vmw_present_arg 781718dceddSDavid Howells * @fb_id: fb_id to present / read back from. 782718dceddSDavid Howells * @num_clips: Number of cliprects. 783718dceddSDavid Howells * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t. 784718dceddSDavid Howells * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t. 785718dceddSDavid Howells * If this member is NULL, then the ioctl should not return a fence. 786718dceddSDavid Howells */ 787718dceddSDavid Howells 788718dceddSDavid Howells struct drm_vmw_present_readback_arg { 789718dceddSDavid Howells uint32_t fb_id; 790718dceddSDavid Howells uint32_t num_clips; 791718dceddSDavid Howells uint64_t clips_ptr; 792718dceddSDavid Howells uint64_t fence_rep; 793718dceddSDavid Howells }; 794718dceddSDavid Howells 795718dceddSDavid Howells /*************************************************************************/ 796718dceddSDavid Howells /** 797718dceddSDavid Howells * DRM_VMW_UPDATE_LAYOUT - Update layout 798718dceddSDavid Howells * 799718dceddSDavid Howells * Updates the preferred modes and connection status for connectors. The 800718dceddSDavid Howells * command consists of one drm_vmw_update_layout_arg pointing to an array 801718dceddSDavid Howells * of num_outputs drm_vmw_rect's. 802718dceddSDavid Howells */ 803718dceddSDavid Howells 804718dceddSDavid Howells /** 805718dceddSDavid Howells * struct drm_vmw_update_layout_arg 806718dceddSDavid Howells * 807718dceddSDavid Howells * @num_outputs: number of active connectors 808718dceddSDavid Howells * @rects: pointer to array of drm_vmw_rect cast to an uint64_t 809718dceddSDavid Howells * 810718dceddSDavid Howells * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl. 811718dceddSDavid Howells */ 812718dceddSDavid Howells struct drm_vmw_update_layout_arg { 813718dceddSDavid Howells uint32_t num_outputs; 814718dceddSDavid Howells uint32_t pad64; 815718dceddSDavid Howells uint64_t rects; 816718dceddSDavid Howells }; 817718dceddSDavid Howells 818cfe4d53eSThomas Hellstrom 819cfe4d53eSThomas Hellstrom /*************************************************************************/ 820cfe4d53eSThomas Hellstrom /** 821cfe4d53eSThomas Hellstrom * DRM_VMW_CREATE_SHADER - Create shader 822cfe4d53eSThomas Hellstrom * 823cfe4d53eSThomas Hellstrom * Creates a shader and optionally binds it to a dma buffer containing 824cfe4d53eSThomas Hellstrom * the shader byte-code. 825cfe4d53eSThomas Hellstrom */ 826cfe4d53eSThomas Hellstrom 827cfe4d53eSThomas Hellstrom /** 828cfe4d53eSThomas Hellstrom * enum drm_vmw_shader_type - Shader types 829cfe4d53eSThomas Hellstrom */ 830cfe4d53eSThomas Hellstrom enum drm_vmw_shader_type { 831cfe4d53eSThomas Hellstrom drm_vmw_shader_type_vs = 0, 832cfe4d53eSThomas Hellstrom drm_vmw_shader_type_ps, 833cfe4d53eSThomas Hellstrom }; 834cfe4d53eSThomas Hellstrom 835cfe4d53eSThomas Hellstrom 836cfe4d53eSThomas Hellstrom /** 837cfe4d53eSThomas Hellstrom * struct drm_vmw_shader_create_arg 838cfe4d53eSThomas Hellstrom * 839cfe4d53eSThomas Hellstrom * @shader_type: Shader type of the shader to create. 840cfe4d53eSThomas Hellstrom * @size: Size of the byte-code in bytes. 841cfe4d53eSThomas Hellstrom * where the shader byte-code starts 842cfe4d53eSThomas Hellstrom * @buffer_handle: Buffer handle identifying the buffer containing the 843cfe4d53eSThomas Hellstrom * shader byte-code 844cfe4d53eSThomas Hellstrom * @shader_handle: On successful completion contains a handle that 845cfe4d53eSThomas Hellstrom * can be used to subsequently identify the shader. 846cfe4d53eSThomas Hellstrom * @offset: Offset in bytes into the buffer given by @buffer_handle, 847cfe4d53eSThomas Hellstrom * 848cfe4d53eSThomas Hellstrom * Input / Output argument to the DRM_VMW_CREATE_SHADER Ioctl. 849cfe4d53eSThomas Hellstrom */ 850cfe4d53eSThomas Hellstrom struct drm_vmw_shader_create_arg { 851cfe4d53eSThomas Hellstrom enum drm_vmw_shader_type shader_type; 852cfe4d53eSThomas Hellstrom uint32_t size; 853cfe4d53eSThomas Hellstrom uint32_t buffer_handle; 854cfe4d53eSThomas Hellstrom uint32_t shader_handle; 855cfe4d53eSThomas Hellstrom uint64_t offset; 856cfe4d53eSThomas Hellstrom }; 857cfe4d53eSThomas Hellstrom 858cfe4d53eSThomas Hellstrom /*************************************************************************/ 859cfe4d53eSThomas Hellstrom /** 860cfe4d53eSThomas Hellstrom * DRM_VMW_UNREF_SHADER - Unreferences a shader 861cfe4d53eSThomas Hellstrom * 862cfe4d53eSThomas Hellstrom * Destroys a user-space reference to a shader, optionally destroying 863cfe4d53eSThomas Hellstrom * it. 864cfe4d53eSThomas Hellstrom */ 865cfe4d53eSThomas Hellstrom 866cfe4d53eSThomas Hellstrom /** 867cfe4d53eSThomas Hellstrom * struct drm_vmw_shader_arg 868cfe4d53eSThomas Hellstrom * 869cfe4d53eSThomas Hellstrom * @handle: Handle identifying the shader to destroy. 870cfe4d53eSThomas Hellstrom * 871cfe4d53eSThomas Hellstrom * Input argument to the DRM_VMW_UNREF_SHADER ioctl. 872cfe4d53eSThomas Hellstrom */ 873cfe4d53eSThomas Hellstrom struct drm_vmw_shader_arg { 874cfe4d53eSThomas Hellstrom uint32_t handle; 875cfe4d53eSThomas Hellstrom uint32_t pad64; 876cfe4d53eSThomas Hellstrom }; 877cfe4d53eSThomas Hellstrom 878cfe4d53eSThomas Hellstrom /*************************************************************************/ 879cfe4d53eSThomas Hellstrom /** 880cfe4d53eSThomas Hellstrom * DRM_VMW_GB_SURFACE_CREATE - Create a host guest-backed surface. 881cfe4d53eSThomas Hellstrom * 882cfe4d53eSThomas Hellstrom * Allocates a surface handle and queues a create surface command 883cfe4d53eSThomas Hellstrom * for the host on the first use of the surface. The surface ID can 884cfe4d53eSThomas Hellstrom * be used as the surface ID in commands referencing the surface. 885cfe4d53eSThomas Hellstrom */ 886cfe4d53eSThomas Hellstrom 887cfe4d53eSThomas Hellstrom /** 888cfe4d53eSThomas Hellstrom * enum drm_vmw_surface_flags 889cfe4d53eSThomas Hellstrom * 890cfe4d53eSThomas Hellstrom * @drm_vmw_surface_flag_shareable: Whether the surface is shareable 891cfe4d53eSThomas Hellstrom * @drm_vmw_surface_flag_scanout: Whether the surface is a scanout 892cfe4d53eSThomas Hellstrom * surface. 893cfe4d53eSThomas Hellstrom * @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is 894cfe4d53eSThomas Hellstrom * given. 895cfe4d53eSThomas Hellstrom */ 896cfe4d53eSThomas Hellstrom enum drm_vmw_surface_flags { 897cfe4d53eSThomas Hellstrom drm_vmw_surface_flag_shareable = (1 << 0), 898cfe4d53eSThomas Hellstrom drm_vmw_surface_flag_scanout = (1 << 1), 899cfe4d53eSThomas Hellstrom drm_vmw_surface_flag_create_buffer = (1 << 2) 900cfe4d53eSThomas Hellstrom }; 901cfe4d53eSThomas Hellstrom 902cfe4d53eSThomas Hellstrom /** 903cfe4d53eSThomas Hellstrom * struct drm_vmw_gb_surface_create_req 904cfe4d53eSThomas Hellstrom * 905cfe4d53eSThomas Hellstrom * @svga3d_flags: SVGA3d surface flags for the device. 906cfe4d53eSThomas Hellstrom * @format: SVGA3d format. 907cfe4d53eSThomas Hellstrom * @mip_level: Number of mip levels for all faces. 908cfe4d53eSThomas Hellstrom * @drm_surface_flags Flags as described above. 90915c6f656SZack Rusin * @multisample_count Future use. Set to 0. 910cfe4d53eSThomas Hellstrom * @autogen_filter Future use. Set to 0. 911cfe4d53eSThomas Hellstrom * @buffer_handle Buffer handle of backup buffer. SVGA3D_INVALID_ID 912cfe4d53eSThomas Hellstrom * if none. 913cfe4d53eSThomas Hellstrom * @base_size Size of the base mip level for all faces. 914d80efd5cSThomas Hellstrom * @array_size Must be zero for non-DX hardware, and if non-zero 915d80efd5cSThomas Hellstrom * svga3d_flags must have proper bind flags setup. 916cfe4d53eSThomas Hellstrom * 917cfe4d53eSThomas Hellstrom * Input argument to the DRM_VMW_GB_SURFACE_CREATE Ioctl. 918cfe4d53eSThomas Hellstrom * Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl. 919cfe4d53eSThomas Hellstrom */ 920cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_create_req { 921cfe4d53eSThomas Hellstrom uint32_t svga3d_flags; 922cfe4d53eSThomas Hellstrom uint32_t format; 923cfe4d53eSThomas Hellstrom uint32_t mip_levels; 924cfe4d53eSThomas Hellstrom enum drm_vmw_surface_flags drm_surface_flags; 925cfe4d53eSThomas Hellstrom uint32_t multisample_count; 926cfe4d53eSThomas Hellstrom uint32_t autogen_filter; 927cfe4d53eSThomas Hellstrom uint32_t buffer_handle; 928d80efd5cSThomas Hellstrom uint32_t array_size; 929cfe4d53eSThomas Hellstrom struct drm_vmw_size base_size; 930cfe4d53eSThomas Hellstrom }; 931cfe4d53eSThomas Hellstrom 932cfe4d53eSThomas Hellstrom /** 933cfe4d53eSThomas Hellstrom * struct drm_vmw_gb_surface_create_rep 934cfe4d53eSThomas Hellstrom * 935cfe4d53eSThomas Hellstrom * @handle: Surface handle. 936cfe4d53eSThomas Hellstrom * @backup_size: Size of backup buffers for this surface. 937cfe4d53eSThomas Hellstrom * @buffer_handle: Handle of backup buffer. SVGA3D_INVALID_ID if none. 938cfe4d53eSThomas Hellstrom * @buffer_size: Actual size of the buffer identified by 939cfe4d53eSThomas Hellstrom * @buffer_handle 940cfe4d53eSThomas Hellstrom * @buffer_map_handle: Offset into device address space for the buffer 941cfe4d53eSThomas Hellstrom * identified by @buffer_handle. 942cfe4d53eSThomas Hellstrom * 943cfe4d53eSThomas Hellstrom * Part of output argument for the DRM_VMW_GB_SURFACE_REF ioctl. 944cfe4d53eSThomas Hellstrom * Output argument for the DRM_VMW_GB_SURFACE_CREATE ioctl. 945cfe4d53eSThomas Hellstrom */ 946cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_create_rep { 947cfe4d53eSThomas Hellstrom uint32_t handle; 948cfe4d53eSThomas Hellstrom uint32_t backup_size; 949cfe4d53eSThomas Hellstrom uint32_t buffer_handle; 950cfe4d53eSThomas Hellstrom uint32_t buffer_size; 951cfe4d53eSThomas Hellstrom uint64_t buffer_map_handle; 952cfe4d53eSThomas Hellstrom }; 953cfe4d53eSThomas Hellstrom 954cfe4d53eSThomas Hellstrom /** 955cfe4d53eSThomas Hellstrom * union drm_vmw_gb_surface_create_arg 956cfe4d53eSThomas Hellstrom * 957cfe4d53eSThomas Hellstrom * @req: Input argument as described above. 958cfe4d53eSThomas Hellstrom * @rep: Output argument as described above. 959cfe4d53eSThomas Hellstrom * 960cfe4d53eSThomas Hellstrom * Argument to the DRM_VMW_GB_SURFACE_CREATE ioctl. 961cfe4d53eSThomas Hellstrom */ 962cfe4d53eSThomas Hellstrom union drm_vmw_gb_surface_create_arg { 963cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_create_rep rep; 964cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_create_req req; 965cfe4d53eSThomas Hellstrom }; 966cfe4d53eSThomas Hellstrom 967cfe4d53eSThomas Hellstrom /*************************************************************************/ 968cfe4d53eSThomas Hellstrom /** 969cfe4d53eSThomas Hellstrom * DRM_VMW_GB_SURFACE_REF - Reference a host surface. 970cfe4d53eSThomas Hellstrom * 971cfe4d53eSThomas Hellstrom * Puts a reference on a host surface with a given handle, as previously 972cfe4d53eSThomas Hellstrom * returned by the DRM_VMW_GB_SURFACE_CREATE ioctl. 973cfe4d53eSThomas Hellstrom * A reference will make sure the surface isn't destroyed while we hold 974cfe4d53eSThomas Hellstrom * it and will allow the calling client to use the surface handle in 975cfe4d53eSThomas Hellstrom * the command stream. 976cfe4d53eSThomas Hellstrom * 977cfe4d53eSThomas Hellstrom * On successful return, the Ioctl returns the surface information given 978cfe4d53eSThomas Hellstrom * to and returned from the DRM_VMW_GB_SURFACE_CREATE ioctl. 979cfe4d53eSThomas Hellstrom */ 980cfe4d53eSThomas Hellstrom 981cfe4d53eSThomas Hellstrom /** 982cfe4d53eSThomas Hellstrom * struct drm_vmw_gb_surface_reference_arg 983cfe4d53eSThomas Hellstrom * 984cfe4d53eSThomas Hellstrom * @creq: The data used as input when the surface was created, as described 985cfe4d53eSThomas Hellstrom * above at "struct drm_vmw_gb_surface_create_req" 986cfe4d53eSThomas Hellstrom * @crep: Additional data output when the surface was created, as described 987cfe4d53eSThomas Hellstrom * above at "struct drm_vmw_gb_surface_create_rep" 988cfe4d53eSThomas Hellstrom * 989cfe4d53eSThomas Hellstrom * Output Argument to the DRM_VMW_GB_SURFACE_REF ioctl. 990cfe4d53eSThomas Hellstrom */ 991cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_ref_rep { 992cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_create_req creq; 993cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_create_rep crep; 994cfe4d53eSThomas Hellstrom }; 995cfe4d53eSThomas Hellstrom 996cfe4d53eSThomas Hellstrom /** 997cfe4d53eSThomas Hellstrom * union drm_vmw_gb_surface_reference_arg 998cfe4d53eSThomas Hellstrom * 999cfe4d53eSThomas Hellstrom * @req: Input data as described above at "struct drm_vmw_surface_arg" 1000cfe4d53eSThomas Hellstrom * @rep: Output data as described above at "struct drm_vmw_gb_surface_ref_rep" 1001cfe4d53eSThomas Hellstrom * 1002cfe4d53eSThomas Hellstrom * Argument to the DRM_VMW_GB_SURFACE_REF Ioctl. 1003cfe4d53eSThomas Hellstrom */ 1004cfe4d53eSThomas Hellstrom union drm_vmw_gb_surface_reference_arg { 1005cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_ref_rep rep; 1006cfe4d53eSThomas Hellstrom struct drm_vmw_surface_arg req; 1007cfe4d53eSThomas Hellstrom }; 1008cfe4d53eSThomas Hellstrom 1009cfe4d53eSThomas Hellstrom 10101d7a5cbfSThomas Hellstrom /*************************************************************************/ 10111d7a5cbfSThomas Hellstrom /** 10121d7a5cbfSThomas Hellstrom * DRM_VMW_SYNCCPU - Sync a DMA buffer / MOB for CPU access. 10131d7a5cbfSThomas Hellstrom * 10141d7a5cbfSThomas Hellstrom * Idles any previously submitted GPU operations on the buffer and 10151d7a5cbfSThomas Hellstrom * by default blocks command submissions that reference the buffer. 10161d7a5cbfSThomas Hellstrom * If the file descriptor used to grab a blocking CPU sync is closed, the 10171d7a5cbfSThomas Hellstrom * cpu sync is released. 10181d7a5cbfSThomas Hellstrom * The flags argument indicates how the grab / release operation should be 10191d7a5cbfSThomas Hellstrom * performed: 10201d7a5cbfSThomas Hellstrom */ 10211d7a5cbfSThomas Hellstrom 10221d7a5cbfSThomas Hellstrom /** 10231d7a5cbfSThomas Hellstrom * enum drm_vmw_synccpu_flags - Synccpu flags: 10241d7a5cbfSThomas Hellstrom * 10251d7a5cbfSThomas Hellstrom * @drm_vmw_synccpu_read: Sync for read. If sync is done for read only, it's a 10261d7a5cbfSThomas Hellstrom * hint to the kernel to allow command submissions that references the buffer 10271d7a5cbfSThomas Hellstrom * for read-only. 10281d7a5cbfSThomas Hellstrom * @drm_vmw_synccpu_write: Sync for write. Block all command submissions 10291d7a5cbfSThomas Hellstrom * referencing this buffer. 10301d7a5cbfSThomas Hellstrom * @drm_vmw_synccpu_dontblock: Dont wait for GPU idle, but rather return 10311d7a5cbfSThomas Hellstrom * -EBUSY should the buffer be busy. 10321d7a5cbfSThomas Hellstrom * @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer 10331d7a5cbfSThomas Hellstrom * while the buffer is synced for CPU. This is similar to the GEM bo idle 10341d7a5cbfSThomas Hellstrom * behavior. 10351d7a5cbfSThomas Hellstrom */ 10361d7a5cbfSThomas Hellstrom enum drm_vmw_synccpu_flags { 10371d7a5cbfSThomas Hellstrom drm_vmw_synccpu_read = (1 << 0), 10381d7a5cbfSThomas Hellstrom drm_vmw_synccpu_write = (1 << 1), 10391d7a5cbfSThomas Hellstrom drm_vmw_synccpu_dontblock = (1 << 2), 10401d7a5cbfSThomas Hellstrom drm_vmw_synccpu_allow_cs = (1 << 3) 10411d7a5cbfSThomas Hellstrom }; 10421d7a5cbfSThomas Hellstrom 10431d7a5cbfSThomas Hellstrom /** 10441d7a5cbfSThomas Hellstrom * enum drm_vmw_synccpu_op - Synccpu operations: 10451d7a5cbfSThomas Hellstrom * 10461d7a5cbfSThomas Hellstrom * @drm_vmw_synccpu_grab: Grab the buffer for CPU operations 10471d7a5cbfSThomas Hellstrom * @drm_vmw_synccpu_release: Release a previous grab. 10481d7a5cbfSThomas Hellstrom */ 10491d7a5cbfSThomas Hellstrom enum drm_vmw_synccpu_op { 10501d7a5cbfSThomas Hellstrom drm_vmw_synccpu_grab, 10511d7a5cbfSThomas Hellstrom drm_vmw_synccpu_release 10521d7a5cbfSThomas Hellstrom }; 10531d7a5cbfSThomas Hellstrom 10541d7a5cbfSThomas Hellstrom /** 10551d7a5cbfSThomas Hellstrom * struct drm_vmw_synccpu_arg 10561d7a5cbfSThomas Hellstrom * 10571d7a5cbfSThomas Hellstrom * @op: The synccpu operation as described above. 10581d7a5cbfSThomas Hellstrom * @handle: Handle identifying the buffer object. 10591d7a5cbfSThomas Hellstrom * @flags: Flags as described above. 10601d7a5cbfSThomas Hellstrom */ 10611d7a5cbfSThomas Hellstrom struct drm_vmw_synccpu_arg { 10621d7a5cbfSThomas Hellstrom enum drm_vmw_synccpu_op op; 10631d7a5cbfSThomas Hellstrom enum drm_vmw_synccpu_flags flags; 10641d7a5cbfSThomas Hellstrom uint32_t handle; 10651d7a5cbfSThomas Hellstrom uint32_t pad64; 10661d7a5cbfSThomas Hellstrom }; 1067cfe4d53eSThomas Hellstrom 1068d80efd5cSThomas Hellstrom /*************************************************************************/ 1069d80efd5cSThomas Hellstrom /** 1070d80efd5cSThomas Hellstrom * DRM_VMW_CREATE_EXTENDED_CONTEXT - Create a host context. 1071d80efd5cSThomas Hellstrom * 1072d80efd5cSThomas Hellstrom * Allocates a device unique context id, and queues a create context command 1073d80efd5cSThomas Hellstrom * for the host. Does not wait for host completion. 1074d80efd5cSThomas Hellstrom */ 1075d80efd5cSThomas Hellstrom enum drm_vmw_extended_context { 1076d80efd5cSThomas Hellstrom drm_vmw_context_legacy, 1077d80efd5cSThomas Hellstrom drm_vmw_context_dx 1078d80efd5cSThomas Hellstrom }; 1079d80efd5cSThomas Hellstrom 1080d80efd5cSThomas Hellstrom /** 1081d80efd5cSThomas Hellstrom * union drm_vmw_extended_context_arg 1082d80efd5cSThomas Hellstrom * 1083d80efd5cSThomas Hellstrom * @req: Context type. 1084d80efd5cSThomas Hellstrom * @rep: Context identifier. 1085d80efd5cSThomas Hellstrom * 1086d80efd5cSThomas Hellstrom * Argument to the DRM_VMW_CREATE_EXTENDED_CONTEXT Ioctl. 1087d80efd5cSThomas Hellstrom */ 1088d80efd5cSThomas Hellstrom union drm_vmw_extended_context_arg { 1089d80efd5cSThomas Hellstrom enum drm_vmw_extended_context req; 1090d80efd5cSThomas Hellstrom struct drm_vmw_context_arg rep; 1091d80efd5cSThomas Hellstrom }; 1092718dceddSDavid Howells #endif 1093