1718dceddSDavid Howells /************************************************************************** 2718dceddSDavid Howells * 3718dceddSDavid Howells * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA 4718dceddSDavid Howells * All Rights Reserved. 5718dceddSDavid Howells * 6718dceddSDavid Howells * Permission is hereby granted, free of charge, to any person obtaining a 7718dceddSDavid Howells * copy of this software and associated documentation files (the 8718dceddSDavid Howells * "Software"), to deal in the Software without restriction, including 9718dceddSDavid Howells * without limitation the rights to use, copy, modify, merge, publish, 10718dceddSDavid Howells * distribute, sub license, and/or sell copies of the Software, and to 11718dceddSDavid Howells * permit persons to whom the Software is furnished to do so, subject to 12718dceddSDavid Howells * the following conditions: 13718dceddSDavid Howells * 14718dceddSDavid Howells * The above copyright notice and this permission notice (including the 15718dceddSDavid Howells * next paragraph) shall be included in all copies or substantial portions 16718dceddSDavid Howells * of the Software. 17718dceddSDavid Howells * 18718dceddSDavid Howells * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19718dceddSDavid Howells * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20718dceddSDavid Howells * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 21718dceddSDavid Howells * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 22718dceddSDavid Howells * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 23718dceddSDavid Howells * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 24718dceddSDavid Howells * USE OR OTHER DEALINGS IN THE SOFTWARE. 25718dceddSDavid Howells * 26718dceddSDavid Howells **************************************************************************/ 27718dceddSDavid Howells 28718dceddSDavid Howells #ifndef __VMWGFX_DRM_H__ 29718dceddSDavid Howells #define __VMWGFX_DRM_H__ 30718dceddSDavid Howells 31718dceddSDavid Howells #define DRM_VMW_MAX_SURFACE_FACES 6 32718dceddSDavid Howells #define DRM_VMW_MAX_MIP_LEVELS 24 33718dceddSDavid Howells 34718dceddSDavid Howells 35718dceddSDavid Howells #define DRM_VMW_GET_PARAM 0 36718dceddSDavid Howells #define DRM_VMW_ALLOC_DMABUF 1 37718dceddSDavid Howells #define DRM_VMW_UNREF_DMABUF 2 38718dceddSDavid Howells #define DRM_VMW_CURSOR_BYPASS 3 39718dceddSDavid Howells /* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/ 40718dceddSDavid Howells #define DRM_VMW_CONTROL_STREAM 4 41718dceddSDavid Howells #define DRM_VMW_CLAIM_STREAM 5 42718dceddSDavid Howells #define DRM_VMW_UNREF_STREAM 6 43718dceddSDavid Howells /* guarded by DRM_VMW_PARAM_3D == 1 */ 44718dceddSDavid Howells #define DRM_VMW_CREATE_CONTEXT 7 45718dceddSDavid Howells #define DRM_VMW_UNREF_CONTEXT 8 46718dceddSDavid Howells #define DRM_VMW_CREATE_SURFACE 9 47718dceddSDavid Howells #define DRM_VMW_UNREF_SURFACE 10 48718dceddSDavid Howells #define DRM_VMW_REF_SURFACE 11 49718dceddSDavid Howells #define DRM_VMW_EXECBUF 12 50718dceddSDavid Howells #define DRM_VMW_GET_3D_CAP 13 51718dceddSDavid Howells #define DRM_VMW_FENCE_WAIT 14 52718dceddSDavid Howells #define DRM_VMW_FENCE_SIGNALED 15 53718dceddSDavid Howells #define DRM_VMW_FENCE_UNREF 16 54718dceddSDavid Howells #define DRM_VMW_FENCE_EVENT 17 55718dceddSDavid Howells #define DRM_VMW_PRESENT 18 56718dceddSDavid Howells #define DRM_VMW_PRESENT_READBACK 19 57718dceddSDavid Howells #define DRM_VMW_UPDATE_LAYOUT 20 58cfe4d53eSThomas Hellstrom #define DRM_VMW_CREATE_SHADER 21 59cfe4d53eSThomas Hellstrom #define DRM_VMW_UNREF_SHADER 22 60cfe4d53eSThomas Hellstrom #define DRM_VMW_GB_SURFACE_CREATE 23 61cfe4d53eSThomas Hellstrom #define DRM_VMW_GB_SURFACE_REF 24 62cfe4d53eSThomas Hellstrom 63718dceddSDavid Howells 64718dceddSDavid Howells /*************************************************************************/ 65718dceddSDavid Howells /** 66718dceddSDavid Howells * DRM_VMW_GET_PARAM - get device information. 67718dceddSDavid Howells * 68718dceddSDavid Howells * DRM_VMW_PARAM_FIFO_OFFSET: 69718dceddSDavid Howells * Offset to use to map the first page of the FIFO read-only. 70718dceddSDavid Howells * The fifo is mapped using the mmap() system call on the drm device. 71718dceddSDavid Howells * 72718dceddSDavid Howells * DRM_VMW_PARAM_OVERLAY_IOCTL: 73718dceddSDavid Howells * Does the driver support the overlay ioctl. 74718dceddSDavid Howells */ 75718dceddSDavid Howells 76718dceddSDavid Howells #define DRM_VMW_PARAM_NUM_STREAMS 0 77718dceddSDavid Howells #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1 78718dceddSDavid Howells #define DRM_VMW_PARAM_3D 2 79718dceddSDavid Howells #define DRM_VMW_PARAM_HW_CAPS 3 80718dceddSDavid Howells #define DRM_VMW_PARAM_FIFO_CAPS 4 81718dceddSDavid Howells #define DRM_VMW_PARAM_MAX_FB_SIZE 5 82718dceddSDavid Howells #define DRM_VMW_PARAM_FIFO_HW_VERSION 6 83cfe4d53eSThomas Hellstrom #define DRM_VMW_PARAM_MAX_SURF_MEMORY 7 84cfe4d53eSThomas Hellstrom #define DRM_VMW_PARAM_3D_CAPS_SIZE 8 85718dceddSDavid Howells 86718dceddSDavid Howells /** 87718dceddSDavid Howells * struct drm_vmw_getparam_arg 88718dceddSDavid Howells * 89718dceddSDavid Howells * @value: Returned value. //Out 90718dceddSDavid Howells * @param: Parameter to query. //In. 91718dceddSDavid Howells * 92718dceddSDavid Howells * Argument to the DRM_VMW_GET_PARAM Ioctl. 93718dceddSDavid Howells */ 94718dceddSDavid Howells 95718dceddSDavid Howells struct drm_vmw_getparam_arg { 96718dceddSDavid Howells uint64_t value; 97718dceddSDavid Howells uint32_t param; 98718dceddSDavid Howells uint32_t pad64; 99718dceddSDavid Howells }; 100718dceddSDavid Howells 101718dceddSDavid Howells /*************************************************************************/ 102718dceddSDavid Howells /** 103718dceddSDavid Howells * DRM_VMW_CREATE_CONTEXT - Create a host context. 104718dceddSDavid Howells * 105718dceddSDavid Howells * Allocates a device unique context id, and queues a create context command 106718dceddSDavid Howells * for the host. Does not wait for host completion. 107718dceddSDavid Howells */ 108718dceddSDavid Howells 109718dceddSDavid Howells /** 110718dceddSDavid Howells * struct drm_vmw_context_arg 111718dceddSDavid Howells * 112718dceddSDavid Howells * @cid: Device unique context ID. 113718dceddSDavid Howells * 114718dceddSDavid Howells * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. 115718dceddSDavid Howells * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. 116718dceddSDavid Howells */ 117718dceddSDavid Howells 118718dceddSDavid Howells struct drm_vmw_context_arg { 119718dceddSDavid Howells int32_t cid; 120718dceddSDavid Howells uint32_t pad64; 121718dceddSDavid Howells }; 122718dceddSDavid Howells 123718dceddSDavid Howells /*************************************************************************/ 124718dceddSDavid Howells /** 125718dceddSDavid Howells * DRM_VMW_UNREF_CONTEXT - Create a host context. 126718dceddSDavid Howells * 127718dceddSDavid Howells * Frees a global context id, and queues a destroy host command for the host. 128718dceddSDavid Howells * Does not wait for host completion. The context ID can be used directly 129718dceddSDavid Howells * in the command stream and shows up as the same context ID on the host. 130718dceddSDavid Howells */ 131718dceddSDavid Howells 132718dceddSDavid Howells /*************************************************************************/ 133718dceddSDavid Howells /** 134718dceddSDavid Howells * DRM_VMW_CREATE_SURFACE - Create a host suface. 135718dceddSDavid Howells * 136718dceddSDavid Howells * Allocates a device unique surface id, and queues a create surface command 137718dceddSDavid Howells * for the host. Does not wait for host completion. The surface ID can be 138718dceddSDavid Howells * used directly in the command stream and shows up as the same surface 139718dceddSDavid Howells * ID on the host. 140718dceddSDavid Howells */ 141718dceddSDavid Howells 142718dceddSDavid Howells /** 143718dceddSDavid Howells * struct drm_wmv_surface_create_req 144718dceddSDavid Howells * 145718dceddSDavid Howells * @flags: Surface flags as understood by the host. 146718dceddSDavid Howells * @format: Surface format as understood by the host. 147718dceddSDavid Howells * @mip_levels: Number of mip levels for each face. 148718dceddSDavid Howells * An unused face should have 0 encoded. 149718dceddSDavid Howells * @size_addr: Address of a user-space array of sruct drm_vmw_size 150718dceddSDavid Howells * cast to an uint64_t for 32-64 bit compatibility. 151718dceddSDavid Howells * The size of the array should equal the total number of mipmap levels. 152718dceddSDavid Howells * @shareable: Boolean whether other clients (as identified by file descriptors) 153718dceddSDavid Howells * may reference this surface. 154718dceddSDavid Howells * @scanout: Boolean whether the surface is intended to be used as a 155718dceddSDavid Howells * scanout. 156718dceddSDavid Howells * 157718dceddSDavid Howells * Input data to the DRM_VMW_CREATE_SURFACE Ioctl. 158718dceddSDavid Howells * Output data from the DRM_VMW_REF_SURFACE Ioctl. 159718dceddSDavid Howells */ 160718dceddSDavid Howells 161718dceddSDavid Howells struct drm_vmw_surface_create_req { 162718dceddSDavid Howells uint32_t flags; 163718dceddSDavid Howells uint32_t format; 164718dceddSDavid Howells uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES]; 165718dceddSDavid Howells uint64_t size_addr; 166718dceddSDavid Howells int32_t shareable; 167718dceddSDavid Howells int32_t scanout; 168718dceddSDavid Howells }; 169718dceddSDavid Howells 170718dceddSDavid Howells /** 171718dceddSDavid Howells * struct drm_wmv_surface_arg 172718dceddSDavid Howells * 173718dceddSDavid Howells * @sid: Surface id of created surface or surface to destroy or reference. 174718dceddSDavid Howells * 175718dceddSDavid Howells * Output data from the DRM_VMW_CREATE_SURFACE Ioctl. 176718dceddSDavid Howells * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl. 177718dceddSDavid Howells * Input argument to the DRM_VMW_REF_SURFACE Ioctl. 178718dceddSDavid Howells */ 179718dceddSDavid Howells 180718dceddSDavid Howells struct drm_vmw_surface_arg { 181718dceddSDavid Howells int32_t sid; 182718dceddSDavid Howells uint32_t pad64; 183718dceddSDavid Howells }; 184718dceddSDavid Howells 185718dceddSDavid Howells /** 186718dceddSDavid Howells * struct drm_vmw_size ioctl. 187718dceddSDavid Howells * 188718dceddSDavid Howells * @width - mip level width 189718dceddSDavid Howells * @height - mip level height 190718dceddSDavid Howells * @depth - mip level depth 191718dceddSDavid Howells * 192718dceddSDavid Howells * Description of a mip level. 193718dceddSDavid Howells * Input data to the DRM_WMW_CREATE_SURFACE Ioctl. 194718dceddSDavid Howells */ 195718dceddSDavid Howells 196718dceddSDavid Howells struct drm_vmw_size { 197718dceddSDavid Howells uint32_t width; 198718dceddSDavid Howells uint32_t height; 199718dceddSDavid Howells uint32_t depth; 200718dceddSDavid Howells uint32_t pad64; 201718dceddSDavid Howells }; 202718dceddSDavid Howells 203718dceddSDavid Howells /** 204718dceddSDavid Howells * union drm_vmw_surface_create_arg 205718dceddSDavid Howells * 206718dceddSDavid Howells * @rep: Output data as described above. 207718dceddSDavid Howells * @req: Input data as described above. 208718dceddSDavid Howells * 209718dceddSDavid Howells * Argument to the DRM_VMW_CREATE_SURFACE Ioctl. 210718dceddSDavid Howells */ 211718dceddSDavid Howells 212718dceddSDavid Howells union drm_vmw_surface_create_arg { 213718dceddSDavid Howells struct drm_vmw_surface_arg rep; 214718dceddSDavid Howells struct drm_vmw_surface_create_req req; 215718dceddSDavid Howells }; 216718dceddSDavid Howells 217718dceddSDavid Howells /*************************************************************************/ 218718dceddSDavid Howells /** 219718dceddSDavid Howells * DRM_VMW_REF_SURFACE - Reference a host surface. 220718dceddSDavid Howells * 221718dceddSDavid Howells * Puts a reference on a host surface with a give sid, as previously 222718dceddSDavid Howells * returned by the DRM_VMW_CREATE_SURFACE ioctl. 223718dceddSDavid Howells * A reference will make sure the surface isn't destroyed while we hold 224718dceddSDavid Howells * it and will allow the calling client to use the surface ID in the command 225718dceddSDavid Howells * stream. 226718dceddSDavid Howells * 227718dceddSDavid Howells * On successful return, the Ioctl returns the surface information given 228718dceddSDavid Howells * in the DRM_VMW_CREATE_SURFACE ioctl. 229718dceddSDavid Howells */ 230718dceddSDavid Howells 231718dceddSDavid Howells /** 232718dceddSDavid Howells * union drm_vmw_surface_reference_arg 233718dceddSDavid Howells * 234718dceddSDavid Howells * @rep: Output data as described above. 235718dceddSDavid Howells * @req: Input data as described above. 236718dceddSDavid Howells * 237718dceddSDavid Howells * Argument to the DRM_VMW_REF_SURFACE Ioctl. 238718dceddSDavid Howells */ 239718dceddSDavid Howells 240718dceddSDavid Howells union drm_vmw_surface_reference_arg { 241718dceddSDavid Howells struct drm_vmw_surface_create_req rep; 242718dceddSDavid Howells struct drm_vmw_surface_arg req; 243718dceddSDavid Howells }; 244718dceddSDavid Howells 245718dceddSDavid Howells /*************************************************************************/ 246718dceddSDavid Howells /** 247718dceddSDavid Howells * DRM_VMW_UNREF_SURFACE - Unreference a host surface. 248718dceddSDavid Howells * 249718dceddSDavid Howells * Clear a reference previously put on a host surface. 250718dceddSDavid Howells * When all references are gone, including the one implicitly placed 251718dceddSDavid Howells * on creation, 252718dceddSDavid Howells * a destroy surface command will be queued for the host. 253718dceddSDavid Howells * Does not wait for completion. 254718dceddSDavid Howells */ 255718dceddSDavid Howells 256718dceddSDavid Howells /*************************************************************************/ 257718dceddSDavid Howells /** 258718dceddSDavid Howells * DRM_VMW_EXECBUF 259718dceddSDavid Howells * 260718dceddSDavid Howells * Submit a command buffer for execution on the host, and return a 261718dceddSDavid Howells * fence seqno that when signaled, indicates that the command buffer has 262718dceddSDavid Howells * executed. 263718dceddSDavid Howells */ 264718dceddSDavid Howells 265718dceddSDavid Howells /** 266718dceddSDavid Howells * struct drm_vmw_execbuf_arg 267718dceddSDavid Howells * 268718dceddSDavid Howells * @commands: User-space address of a command buffer cast to an uint64_t. 269718dceddSDavid Howells * @command-size: Size in bytes of the command buffer. 270718dceddSDavid Howells * @throttle-us: Sleep until software is less than @throttle_us 271718dceddSDavid Howells * microseconds ahead of hardware. The driver may round this value 272718dceddSDavid Howells * to the nearest kernel tick. 273718dceddSDavid Howells * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an 274718dceddSDavid Howells * uint64_t. 275718dceddSDavid Howells * @version: Allows expanding the execbuf ioctl parameters without breaking 276718dceddSDavid Howells * backwards compatibility, since user-space will always tell the kernel 277718dceddSDavid Howells * which version it uses. 278718dceddSDavid Howells * @flags: Execbuf flags. None currently. 279718dceddSDavid Howells * 280718dceddSDavid Howells * Argument to the DRM_VMW_EXECBUF Ioctl. 281718dceddSDavid Howells */ 282718dceddSDavid Howells 283718dceddSDavid Howells #define DRM_VMW_EXECBUF_VERSION 1 284718dceddSDavid Howells 285718dceddSDavid Howells struct drm_vmw_execbuf_arg { 286718dceddSDavid Howells uint64_t commands; 287718dceddSDavid Howells uint32_t command_size; 288718dceddSDavid Howells uint32_t throttle_us; 289718dceddSDavid Howells uint64_t fence_rep; 290718dceddSDavid Howells uint32_t version; 291718dceddSDavid Howells uint32_t flags; 292718dceddSDavid Howells }; 293718dceddSDavid Howells 294718dceddSDavid Howells /** 295718dceddSDavid Howells * struct drm_vmw_fence_rep 296718dceddSDavid Howells * 297718dceddSDavid Howells * @handle: Fence object handle for fence associated with a command submission. 298718dceddSDavid Howells * @mask: Fence flags relevant for this fence object. 299718dceddSDavid Howells * @seqno: Fence sequence number in fifo. A fence object with a lower 300718dceddSDavid Howells * seqno will signal the EXEC flag before a fence object with a higher 301718dceddSDavid Howells * seqno. This can be used by user-space to avoid kernel calls to determine 302718dceddSDavid Howells * whether a fence has signaled the EXEC flag. Note that @seqno will 303718dceddSDavid Howells * wrap at 32-bit. 304718dceddSDavid Howells * @passed_seqno: The highest seqno number processed by the hardware 305718dceddSDavid Howells * so far. This can be used to mark user-space fence objects as signaled, and 306718dceddSDavid Howells * to determine whether a fence seqno might be stale. 307718dceddSDavid Howells * @error: This member should've been set to -EFAULT on submission. 308718dceddSDavid Howells * The following actions should be take on completion: 309718dceddSDavid Howells * error == -EFAULT: Fence communication failed. The host is synchronized. 310718dceddSDavid Howells * Use the last fence id read from the FIFO fence register. 311718dceddSDavid Howells * error != 0 && error != -EFAULT: 312718dceddSDavid Howells * Fence submission failed. The host is synchronized. Use the fence_seq member. 313718dceddSDavid Howells * error == 0: All is OK, The host may not be synchronized. 314718dceddSDavid Howells * Use the fence_seq member. 315718dceddSDavid Howells * 316718dceddSDavid Howells * Input / Output data to the DRM_VMW_EXECBUF Ioctl. 317718dceddSDavid Howells */ 318718dceddSDavid Howells 319718dceddSDavid Howells struct drm_vmw_fence_rep { 320718dceddSDavid Howells uint32_t handle; 321718dceddSDavid Howells uint32_t mask; 322718dceddSDavid Howells uint32_t seqno; 323718dceddSDavid Howells uint32_t passed_seqno; 324718dceddSDavid Howells uint32_t pad64; 325718dceddSDavid Howells int32_t error; 326718dceddSDavid Howells }; 327718dceddSDavid Howells 328718dceddSDavid Howells /*************************************************************************/ 329718dceddSDavid Howells /** 330718dceddSDavid Howells * DRM_VMW_ALLOC_DMABUF 331718dceddSDavid Howells * 332718dceddSDavid Howells * Allocate a DMA buffer that is visible also to the host. 333718dceddSDavid Howells * NOTE: The buffer is 334718dceddSDavid Howells * identified by a handle and an offset, which are private to the guest, but 335718dceddSDavid Howells * useable in the command stream. The guest kernel may translate these 336718dceddSDavid Howells * and patch up the command stream accordingly. In the future, the offset may 337718dceddSDavid Howells * be zero at all times, or it may disappear from the interface before it is 338718dceddSDavid Howells * fixed. 339718dceddSDavid Howells * 340718dceddSDavid Howells * The DMA buffer may stay user-space mapped in the guest at all times, 341718dceddSDavid Howells * and is thus suitable for sub-allocation. 342718dceddSDavid Howells * 343718dceddSDavid Howells * DMA buffers are mapped using the mmap() syscall on the drm device. 344718dceddSDavid Howells */ 345718dceddSDavid Howells 346718dceddSDavid Howells /** 347718dceddSDavid Howells * struct drm_vmw_alloc_dmabuf_req 348718dceddSDavid Howells * 349718dceddSDavid Howells * @size: Required minimum size of the buffer. 350718dceddSDavid Howells * 351718dceddSDavid Howells * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl. 352718dceddSDavid Howells */ 353718dceddSDavid Howells 354718dceddSDavid Howells struct drm_vmw_alloc_dmabuf_req { 355718dceddSDavid Howells uint32_t size; 356718dceddSDavid Howells uint32_t pad64; 357718dceddSDavid Howells }; 358718dceddSDavid Howells 359718dceddSDavid Howells /** 360718dceddSDavid Howells * struct drm_vmw_dmabuf_rep 361718dceddSDavid Howells * 362718dceddSDavid Howells * @map_handle: Offset to use in the mmap() call used to map the buffer. 363718dceddSDavid Howells * @handle: Handle unique to this buffer. Used for unreferencing. 364718dceddSDavid Howells * @cur_gmr_id: GMR id to use in the command stream when this buffer is 365718dceddSDavid Howells * referenced. See not above. 366718dceddSDavid Howells * @cur_gmr_offset: Offset to use in the command stream when this buffer is 367718dceddSDavid Howells * referenced. See note above. 368718dceddSDavid Howells * 369718dceddSDavid Howells * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl. 370718dceddSDavid Howells */ 371718dceddSDavid Howells 372718dceddSDavid Howells struct drm_vmw_dmabuf_rep { 373718dceddSDavid Howells uint64_t map_handle; 374718dceddSDavid Howells uint32_t handle; 375718dceddSDavid Howells uint32_t cur_gmr_id; 376718dceddSDavid Howells uint32_t cur_gmr_offset; 377718dceddSDavid Howells uint32_t pad64; 378718dceddSDavid Howells }; 379718dceddSDavid Howells 380718dceddSDavid Howells /** 381718dceddSDavid Howells * union drm_vmw_dmabuf_arg 382718dceddSDavid Howells * 383718dceddSDavid Howells * @req: Input data as described above. 384718dceddSDavid Howells * @rep: Output data as described above. 385718dceddSDavid Howells * 386718dceddSDavid Howells * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl. 387718dceddSDavid Howells */ 388718dceddSDavid Howells 389718dceddSDavid Howells union drm_vmw_alloc_dmabuf_arg { 390718dceddSDavid Howells struct drm_vmw_alloc_dmabuf_req req; 391718dceddSDavid Howells struct drm_vmw_dmabuf_rep rep; 392718dceddSDavid Howells }; 393718dceddSDavid Howells 394718dceddSDavid Howells /*************************************************************************/ 395718dceddSDavid Howells /** 396718dceddSDavid Howells * DRM_VMW_UNREF_DMABUF - Free a DMA buffer. 397718dceddSDavid Howells * 398718dceddSDavid Howells */ 399718dceddSDavid Howells 400718dceddSDavid Howells /** 401718dceddSDavid Howells * struct drm_vmw_unref_dmabuf_arg 402718dceddSDavid Howells * 403718dceddSDavid Howells * @handle: Handle indicating what buffer to free. Obtained from the 404718dceddSDavid Howells * DRM_VMW_ALLOC_DMABUF Ioctl. 405718dceddSDavid Howells * 406718dceddSDavid Howells * Argument to the DRM_VMW_UNREF_DMABUF Ioctl. 407718dceddSDavid Howells */ 408718dceddSDavid Howells 409718dceddSDavid Howells struct drm_vmw_unref_dmabuf_arg { 410718dceddSDavid Howells uint32_t handle; 411718dceddSDavid Howells uint32_t pad64; 412718dceddSDavid Howells }; 413718dceddSDavid Howells 414718dceddSDavid Howells /*************************************************************************/ 415718dceddSDavid Howells /** 416718dceddSDavid Howells * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams. 417718dceddSDavid Howells * 418718dceddSDavid Howells * This IOCTL controls the overlay units of the svga device. 419718dceddSDavid Howells * The SVGA overlay units does not work like regular hardware units in 420718dceddSDavid Howells * that they do not automaticaly read back the contents of the given dma 421718dceddSDavid Howells * buffer. But instead only read back for each call to this ioctl, and 422718dceddSDavid Howells * at any point between this call being made and a following call that 423718dceddSDavid Howells * either changes the buffer or disables the stream. 424718dceddSDavid Howells */ 425718dceddSDavid Howells 426718dceddSDavid Howells /** 427718dceddSDavid Howells * struct drm_vmw_rect 428718dceddSDavid Howells * 429718dceddSDavid Howells * Defines a rectangle. Used in the overlay ioctl to define 430718dceddSDavid Howells * source and destination rectangle. 431718dceddSDavid Howells */ 432718dceddSDavid Howells 433718dceddSDavid Howells struct drm_vmw_rect { 434718dceddSDavid Howells int32_t x; 435718dceddSDavid Howells int32_t y; 436718dceddSDavid Howells uint32_t w; 437718dceddSDavid Howells uint32_t h; 438718dceddSDavid Howells }; 439718dceddSDavid Howells 440718dceddSDavid Howells /** 441718dceddSDavid Howells * struct drm_vmw_control_stream_arg 442718dceddSDavid Howells * 443718dceddSDavid Howells * @stream_id: Stearm to control 444718dceddSDavid Howells * @enabled: If false all following arguments are ignored. 445718dceddSDavid Howells * @handle: Handle to buffer for getting data from. 446718dceddSDavid Howells * @format: Format of the overlay as understood by the host. 447718dceddSDavid Howells * @width: Width of the overlay. 448718dceddSDavid Howells * @height: Height of the overlay. 449718dceddSDavid Howells * @size: Size of the overlay in bytes. 450718dceddSDavid Howells * @pitch: Array of pitches, the two last are only used for YUV12 formats. 451718dceddSDavid Howells * @offset: Offset from start of dma buffer to overlay. 452718dceddSDavid Howells * @src: Source rect, must be within the defined area above. 453718dceddSDavid Howells * @dst: Destination rect, x and y may be negative. 454718dceddSDavid Howells * 455718dceddSDavid Howells * Argument to the DRM_VMW_CONTROL_STREAM Ioctl. 456718dceddSDavid Howells */ 457718dceddSDavid Howells 458718dceddSDavid Howells struct drm_vmw_control_stream_arg { 459718dceddSDavid Howells uint32_t stream_id; 460718dceddSDavid Howells uint32_t enabled; 461718dceddSDavid Howells 462718dceddSDavid Howells uint32_t flags; 463718dceddSDavid Howells uint32_t color_key; 464718dceddSDavid Howells 465718dceddSDavid Howells uint32_t handle; 466718dceddSDavid Howells uint32_t offset; 467718dceddSDavid Howells int32_t format; 468718dceddSDavid Howells uint32_t size; 469718dceddSDavid Howells uint32_t width; 470718dceddSDavid Howells uint32_t height; 471718dceddSDavid Howells uint32_t pitch[3]; 472718dceddSDavid Howells 473718dceddSDavid Howells uint32_t pad64; 474718dceddSDavid Howells struct drm_vmw_rect src; 475718dceddSDavid Howells struct drm_vmw_rect dst; 476718dceddSDavid Howells }; 477718dceddSDavid Howells 478718dceddSDavid Howells /*************************************************************************/ 479718dceddSDavid Howells /** 480718dceddSDavid Howells * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass. 481718dceddSDavid Howells * 482718dceddSDavid Howells */ 483718dceddSDavid Howells 484718dceddSDavid Howells #define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0) 485718dceddSDavid Howells #define DRM_VMW_CURSOR_BYPASS_FLAGS (1) 486718dceddSDavid Howells 487718dceddSDavid Howells /** 488718dceddSDavid Howells * struct drm_vmw_cursor_bypass_arg 489718dceddSDavid Howells * 490718dceddSDavid Howells * @flags: Flags. 491718dceddSDavid Howells * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed. 492718dceddSDavid Howells * @xpos: X position of cursor. 493718dceddSDavid Howells * @ypos: Y position of cursor. 494718dceddSDavid Howells * @xhot: X hotspot. 495718dceddSDavid Howells * @yhot: Y hotspot. 496718dceddSDavid Howells * 497718dceddSDavid Howells * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl. 498718dceddSDavid Howells */ 499718dceddSDavid Howells 500718dceddSDavid Howells struct drm_vmw_cursor_bypass_arg { 501718dceddSDavid Howells uint32_t flags; 502718dceddSDavid Howells uint32_t crtc_id; 503718dceddSDavid Howells int32_t xpos; 504718dceddSDavid Howells int32_t ypos; 505718dceddSDavid Howells int32_t xhot; 506718dceddSDavid Howells int32_t yhot; 507718dceddSDavid Howells }; 508718dceddSDavid Howells 509718dceddSDavid Howells /*************************************************************************/ 510718dceddSDavid Howells /** 511718dceddSDavid Howells * DRM_VMW_CLAIM_STREAM - Claim a single stream. 512718dceddSDavid Howells */ 513718dceddSDavid Howells 514718dceddSDavid Howells /** 515718dceddSDavid Howells * struct drm_vmw_context_arg 516718dceddSDavid Howells * 517718dceddSDavid Howells * @stream_id: Device unique context ID. 518718dceddSDavid Howells * 519718dceddSDavid Howells * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. 520718dceddSDavid Howells * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. 521718dceddSDavid Howells */ 522718dceddSDavid Howells 523718dceddSDavid Howells struct drm_vmw_stream_arg { 524718dceddSDavid Howells uint32_t stream_id; 525718dceddSDavid Howells uint32_t pad64; 526718dceddSDavid Howells }; 527718dceddSDavid Howells 528718dceddSDavid Howells /*************************************************************************/ 529718dceddSDavid Howells /** 530718dceddSDavid Howells * DRM_VMW_UNREF_STREAM - Unclaim a stream. 531718dceddSDavid Howells * 532718dceddSDavid Howells * Return a single stream that was claimed by this process. Also makes 533718dceddSDavid Howells * sure that the stream has been stopped. 534718dceddSDavid Howells */ 535718dceddSDavid Howells 536718dceddSDavid Howells /*************************************************************************/ 537718dceddSDavid Howells /** 538718dceddSDavid Howells * DRM_VMW_GET_3D_CAP 539718dceddSDavid Howells * 540718dceddSDavid Howells * Read 3D capabilities from the FIFO 541718dceddSDavid Howells * 542718dceddSDavid Howells */ 543718dceddSDavid Howells 544718dceddSDavid Howells /** 545718dceddSDavid Howells * struct drm_vmw_get_3d_cap_arg 546718dceddSDavid Howells * 547718dceddSDavid Howells * @buffer: Pointer to a buffer for capability data, cast to an uint64_t 548718dceddSDavid Howells * @size: Max size to copy 549718dceddSDavid Howells * 550718dceddSDavid Howells * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL 551718dceddSDavid Howells * ioctls. 552718dceddSDavid Howells */ 553718dceddSDavid Howells 554718dceddSDavid Howells struct drm_vmw_get_3d_cap_arg { 555718dceddSDavid Howells uint64_t buffer; 556718dceddSDavid Howells uint32_t max_size; 557718dceddSDavid Howells uint32_t pad64; 558718dceddSDavid Howells }; 559718dceddSDavid Howells 560718dceddSDavid Howells /*************************************************************************/ 561718dceddSDavid Howells /** 562718dceddSDavid Howells * DRM_VMW_FENCE_WAIT 563718dceddSDavid Howells * 564718dceddSDavid Howells * Waits for a fence object to signal. The wait is interruptible, so that 565718dceddSDavid Howells * signals may be delivered during the interrupt. The wait may timeout, 566718dceddSDavid Howells * in which case the calls returns -EBUSY. If the wait is restarted, 567718dceddSDavid Howells * that is restarting without resetting @cookie_valid to zero, 568718dceddSDavid Howells * the timeout is computed from the first call. 569718dceddSDavid Howells * 570718dceddSDavid Howells * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait 571718dceddSDavid Howells * on: 572718dceddSDavid Howells * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command 573718dceddSDavid Howells * stream 574718dceddSDavid Howells * have executed. 575718dceddSDavid Howells * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish 576718dceddSDavid Howells * commands 577718dceddSDavid Howells * in the buffer given to the EXECBUF ioctl returning the fence object handle 578718dceddSDavid Howells * are available to user-space. 579718dceddSDavid Howells * 580718dceddSDavid Howells * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the 581718dceddSDavid Howells * fenc wait ioctl returns 0, the fence object has been unreferenced after 582718dceddSDavid Howells * the wait. 583718dceddSDavid Howells */ 584718dceddSDavid Howells 585718dceddSDavid Howells #define DRM_VMW_FENCE_FLAG_EXEC (1 << 0) 586718dceddSDavid Howells #define DRM_VMW_FENCE_FLAG_QUERY (1 << 1) 587718dceddSDavid Howells 588718dceddSDavid Howells #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0) 589718dceddSDavid Howells 590718dceddSDavid Howells /** 591718dceddSDavid Howells * struct drm_vmw_fence_wait_arg 592718dceddSDavid Howells * 593718dceddSDavid Howells * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 594718dceddSDavid Howells * @cookie_valid: Must be reset to 0 on first call. Left alone on restart. 595718dceddSDavid Howells * @kernel_cookie: Set to 0 on first call. Left alone on restart. 596718dceddSDavid Howells * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout. 597718dceddSDavid Howells * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick 598718dceddSDavid Howells * before returning. 599718dceddSDavid Howells * @flags: Fence flags to wait on. 600718dceddSDavid Howells * @wait_options: Options that control the behaviour of the wait ioctl. 601718dceddSDavid Howells * 602718dceddSDavid Howells * Input argument to the DRM_VMW_FENCE_WAIT ioctl. 603718dceddSDavid Howells */ 604718dceddSDavid Howells 605718dceddSDavid Howells struct drm_vmw_fence_wait_arg { 606718dceddSDavid Howells uint32_t handle; 607718dceddSDavid Howells int32_t cookie_valid; 608718dceddSDavid Howells uint64_t kernel_cookie; 609718dceddSDavid Howells uint64_t timeout_us; 610718dceddSDavid Howells int32_t lazy; 611718dceddSDavid Howells int32_t flags; 612718dceddSDavid Howells int32_t wait_options; 613718dceddSDavid Howells int32_t pad64; 614718dceddSDavid Howells }; 615718dceddSDavid Howells 616718dceddSDavid Howells /*************************************************************************/ 617718dceddSDavid Howells /** 618718dceddSDavid Howells * DRM_VMW_FENCE_SIGNALED 619718dceddSDavid Howells * 620718dceddSDavid Howells * Checks if a fence object is signaled.. 621718dceddSDavid Howells */ 622718dceddSDavid Howells 623718dceddSDavid Howells /** 624718dceddSDavid Howells * struct drm_vmw_fence_signaled_arg 625718dceddSDavid Howells * 626718dceddSDavid Howells * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 627718dceddSDavid Howells * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl 628718dceddSDavid Howells * @signaled: Out: Flags signaled. 629718dceddSDavid Howells * @sequence: Out: Highest sequence passed so far. Can be used to signal the 630718dceddSDavid Howells * EXEC flag of user-space fence objects. 631718dceddSDavid Howells * 632718dceddSDavid Howells * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF 633718dceddSDavid Howells * ioctls. 634718dceddSDavid Howells */ 635718dceddSDavid Howells 636718dceddSDavid Howells struct drm_vmw_fence_signaled_arg { 637718dceddSDavid Howells uint32_t handle; 638718dceddSDavid Howells uint32_t flags; 639718dceddSDavid Howells int32_t signaled; 640718dceddSDavid Howells uint32_t passed_seqno; 641718dceddSDavid Howells uint32_t signaled_flags; 642718dceddSDavid Howells uint32_t pad64; 643718dceddSDavid Howells }; 644718dceddSDavid Howells 645718dceddSDavid Howells /*************************************************************************/ 646718dceddSDavid Howells /** 647718dceddSDavid Howells * DRM_VMW_FENCE_UNREF 648718dceddSDavid Howells * 649718dceddSDavid Howells * Unreferences a fence object, and causes it to be destroyed if there are no 650718dceddSDavid Howells * other references to it. 651718dceddSDavid Howells * 652718dceddSDavid Howells */ 653718dceddSDavid Howells 654718dceddSDavid Howells /** 655718dceddSDavid Howells * struct drm_vmw_fence_arg 656718dceddSDavid Howells * 657718dceddSDavid Howells * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 658718dceddSDavid Howells * 659718dceddSDavid Howells * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl.. 660718dceddSDavid Howells */ 661718dceddSDavid Howells 662718dceddSDavid Howells struct drm_vmw_fence_arg { 663718dceddSDavid Howells uint32_t handle; 664718dceddSDavid Howells uint32_t pad64; 665718dceddSDavid Howells }; 666718dceddSDavid Howells 667718dceddSDavid Howells 668718dceddSDavid Howells /*************************************************************************/ 669718dceddSDavid Howells /** 670718dceddSDavid Howells * DRM_VMW_FENCE_EVENT 671718dceddSDavid Howells * 672718dceddSDavid Howells * Queues an event on a fence to be delivered on the drm character device 673718dceddSDavid Howells * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag. 674718dceddSDavid Howells * Optionally the approximate time when the fence signaled is 675718dceddSDavid Howells * given by the event. 676718dceddSDavid Howells */ 677718dceddSDavid Howells 678718dceddSDavid Howells /* 679718dceddSDavid Howells * The event type 680718dceddSDavid Howells */ 681718dceddSDavid Howells #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000 682718dceddSDavid Howells 683718dceddSDavid Howells struct drm_vmw_event_fence { 684718dceddSDavid Howells struct drm_event base; 685718dceddSDavid Howells uint64_t user_data; 686718dceddSDavid Howells uint32_t tv_sec; 687718dceddSDavid Howells uint32_t tv_usec; 688718dceddSDavid Howells }; 689718dceddSDavid Howells 690718dceddSDavid Howells /* 691718dceddSDavid Howells * Flags that may be given to the command. 692718dceddSDavid Howells */ 693718dceddSDavid Howells /* Request fence signaled time on the event. */ 694718dceddSDavid Howells #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0) 695718dceddSDavid Howells 696718dceddSDavid Howells /** 697718dceddSDavid Howells * struct drm_vmw_fence_event_arg 698718dceddSDavid Howells * 699718dceddSDavid Howells * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if 700718dceddSDavid Howells * the fence is not supposed to be referenced by user-space. 701718dceddSDavid Howells * @user_info: Info to be delivered with the event. 702718dceddSDavid Howells * @handle: Attach the event to this fence only. 703718dceddSDavid Howells * @flags: A set of flags as defined above. 704718dceddSDavid Howells */ 705718dceddSDavid Howells struct drm_vmw_fence_event_arg { 706718dceddSDavid Howells uint64_t fence_rep; 707718dceddSDavid Howells uint64_t user_data; 708718dceddSDavid Howells uint32_t handle; 709718dceddSDavid Howells uint32_t flags; 710718dceddSDavid Howells }; 711718dceddSDavid Howells 712718dceddSDavid Howells 713718dceddSDavid Howells /*************************************************************************/ 714718dceddSDavid Howells /** 715718dceddSDavid Howells * DRM_VMW_PRESENT 716718dceddSDavid Howells * 717718dceddSDavid Howells * Executes an SVGA present on a given fb for a given surface. The surface 718718dceddSDavid Howells * is placed on the framebuffer. Cliprects are given relative to the given 719718dceddSDavid Howells * point (the point disignated by dest_{x|y}). 720718dceddSDavid Howells * 721718dceddSDavid Howells */ 722718dceddSDavid Howells 723718dceddSDavid Howells /** 724718dceddSDavid Howells * struct drm_vmw_present_arg 725718dceddSDavid Howells * @fb_id: framebuffer id to present / read back from. 726718dceddSDavid Howells * @sid: Surface id to present from. 727718dceddSDavid Howells * @dest_x: X placement coordinate for surface. 728718dceddSDavid Howells * @dest_y: Y placement coordinate for surface. 729718dceddSDavid Howells * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t. 730718dceddSDavid Howells * @num_clips: Number of cliprects given relative to the framebuffer origin, 731718dceddSDavid Howells * in the same coordinate space as the frame buffer. 732718dceddSDavid Howells * @pad64: Unused 64-bit padding. 733718dceddSDavid Howells * 734718dceddSDavid Howells * Input argument to the DRM_VMW_PRESENT ioctl. 735718dceddSDavid Howells */ 736718dceddSDavid Howells 737718dceddSDavid Howells struct drm_vmw_present_arg { 738718dceddSDavid Howells uint32_t fb_id; 739718dceddSDavid Howells uint32_t sid; 740718dceddSDavid Howells int32_t dest_x; 741718dceddSDavid Howells int32_t dest_y; 742718dceddSDavid Howells uint64_t clips_ptr; 743718dceddSDavid Howells uint32_t num_clips; 744718dceddSDavid Howells uint32_t pad64; 745718dceddSDavid Howells }; 746718dceddSDavid Howells 747718dceddSDavid Howells 748718dceddSDavid Howells /*************************************************************************/ 749718dceddSDavid Howells /** 750718dceddSDavid Howells * DRM_VMW_PRESENT_READBACK 751718dceddSDavid Howells * 752718dceddSDavid Howells * Executes an SVGA present readback from a given fb to the dma buffer 753718dceddSDavid Howells * currently bound as the fb. If there is no dma buffer bound to the fb, 754718dceddSDavid Howells * an error will be returned. 755718dceddSDavid Howells * 756718dceddSDavid Howells */ 757718dceddSDavid Howells 758718dceddSDavid Howells /** 759718dceddSDavid Howells * struct drm_vmw_present_arg 760718dceddSDavid Howells * @fb_id: fb_id to present / read back from. 761718dceddSDavid Howells * @num_clips: Number of cliprects. 762718dceddSDavid Howells * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t. 763718dceddSDavid Howells * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t. 764718dceddSDavid Howells * If this member is NULL, then the ioctl should not return a fence. 765718dceddSDavid Howells */ 766718dceddSDavid Howells 767718dceddSDavid Howells struct drm_vmw_present_readback_arg { 768718dceddSDavid Howells uint32_t fb_id; 769718dceddSDavid Howells uint32_t num_clips; 770718dceddSDavid Howells uint64_t clips_ptr; 771718dceddSDavid Howells uint64_t fence_rep; 772718dceddSDavid Howells }; 773718dceddSDavid Howells 774718dceddSDavid Howells /*************************************************************************/ 775718dceddSDavid Howells /** 776718dceddSDavid Howells * DRM_VMW_UPDATE_LAYOUT - Update layout 777718dceddSDavid Howells * 778718dceddSDavid Howells * Updates the preferred modes and connection status for connectors. The 779718dceddSDavid Howells * command consists of one drm_vmw_update_layout_arg pointing to an array 780718dceddSDavid Howells * of num_outputs drm_vmw_rect's. 781718dceddSDavid Howells */ 782718dceddSDavid Howells 783718dceddSDavid Howells /** 784718dceddSDavid Howells * struct drm_vmw_update_layout_arg 785718dceddSDavid Howells * 786718dceddSDavid Howells * @num_outputs: number of active connectors 787718dceddSDavid Howells * @rects: pointer to array of drm_vmw_rect cast to an uint64_t 788718dceddSDavid Howells * 789718dceddSDavid Howells * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl. 790718dceddSDavid Howells */ 791718dceddSDavid Howells struct drm_vmw_update_layout_arg { 792718dceddSDavid Howells uint32_t num_outputs; 793718dceddSDavid Howells uint32_t pad64; 794718dceddSDavid Howells uint64_t rects; 795718dceddSDavid Howells }; 796718dceddSDavid Howells 797cfe4d53eSThomas Hellstrom 798cfe4d53eSThomas Hellstrom /*************************************************************************/ 799cfe4d53eSThomas Hellstrom /** 800cfe4d53eSThomas Hellstrom * DRM_VMW_CREATE_SHADER - Create shader 801cfe4d53eSThomas Hellstrom * 802cfe4d53eSThomas Hellstrom * Creates a shader and optionally binds it to a dma buffer containing 803cfe4d53eSThomas Hellstrom * the shader byte-code. 804cfe4d53eSThomas Hellstrom */ 805cfe4d53eSThomas Hellstrom 806cfe4d53eSThomas Hellstrom /** 807cfe4d53eSThomas Hellstrom * enum drm_vmw_shader_type - Shader types 808cfe4d53eSThomas Hellstrom */ 809cfe4d53eSThomas Hellstrom enum drm_vmw_shader_type { 810cfe4d53eSThomas Hellstrom drm_vmw_shader_type_vs = 0, 811cfe4d53eSThomas Hellstrom drm_vmw_shader_type_ps, 812cfe4d53eSThomas Hellstrom drm_vmw_shader_type_gs 813cfe4d53eSThomas Hellstrom }; 814cfe4d53eSThomas Hellstrom 815cfe4d53eSThomas Hellstrom 816cfe4d53eSThomas Hellstrom /** 817cfe4d53eSThomas Hellstrom * struct drm_vmw_shader_create_arg 818cfe4d53eSThomas Hellstrom * 819cfe4d53eSThomas Hellstrom * @shader_type: Shader type of the shader to create. 820cfe4d53eSThomas Hellstrom * @size: Size of the byte-code in bytes. 821cfe4d53eSThomas Hellstrom * where the shader byte-code starts 822cfe4d53eSThomas Hellstrom * @buffer_handle: Buffer handle identifying the buffer containing the 823cfe4d53eSThomas Hellstrom * shader byte-code 824cfe4d53eSThomas Hellstrom * @shader_handle: On successful completion contains a handle that 825cfe4d53eSThomas Hellstrom * can be used to subsequently identify the shader. 826cfe4d53eSThomas Hellstrom * @offset: Offset in bytes into the buffer given by @buffer_handle, 827cfe4d53eSThomas Hellstrom * 828cfe4d53eSThomas Hellstrom * Input / Output argument to the DRM_VMW_CREATE_SHADER Ioctl. 829cfe4d53eSThomas Hellstrom */ 830cfe4d53eSThomas Hellstrom struct drm_vmw_shader_create_arg { 831cfe4d53eSThomas Hellstrom enum drm_vmw_shader_type shader_type; 832cfe4d53eSThomas Hellstrom uint32_t size; 833cfe4d53eSThomas Hellstrom uint32_t buffer_handle; 834cfe4d53eSThomas Hellstrom uint32_t shader_handle; 835cfe4d53eSThomas Hellstrom uint64_t offset; 836cfe4d53eSThomas Hellstrom }; 837cfe4d53eSThomas Hellstrom 838cfe4d53eSThomas Hellstrom /*************************************************************************/ 839cfe4d53eSThomas Hellstrom /** 840cfe4d53eSThomas Hellstrom * DRM_VMW_UNREF_SHADER - Unreferences a shader 841cfe4d53eSThomas Hellstrom * 842cfe4d53eSThomas Hellstrom * Destroys a user-space reference to a shader, optionally destroying 843cfe4d53eSThomas Hellstrom * it. 844cfe4d53eSThomas Hellstrom */ 845cfe4d53eSThomas Hellstrom 846cfe4d53eSThomas Hellstrom /** 847cfe4d53eSThomas Hellstrom * struct drm_vmw_shader_arg 848cfe4d53eSThomas Hellstrom * 849cfe4d53eSThomas Hellstrom * @handle: Handle identifying the shader to destroy. 850cfe4d53eSThomas Hellstrom * 851cfe4d53eSThomas Hellstrom * Input argument to the DRM_VMW_UNREF_SHADER ioctl. 852cfe4d53eSThomas Hellstrom */ 853cfe4d53eSThomas Hellstrom struct drm_vmw_shader_arg { 854cfe4d53eSThomas Hellstrom uint32_t handle; 855cfe4d53eSThomas Hellstrom uint32_t pad64; 856cfe4d53eSThomas Hellstrom }; 857cfe4d53eSThomas Hellstrom 858cfe4d53eSThomas Hellstrom /*************************************************************************/ 859cfe4d53eSThomas Hellstrom /** 860cfe4d53eSThomas Hellstrom * DRM_VMW_GB_SURFACE_CREATE - Create a host guest-backed surface. 861cfe4d53eSThomas Hellstrom * 862cfe4d53eSThomas Hellstrom * Allocates a surface handle and queues a create surface command 863cfe4d53eSThomas Hellstrom * for the host on the first use of the surface. The surface ID can 864cfe4d53eSThomas Hellstrom * be used as the surface ID in commands referencing the surface. 865cfe4d53eSThomas Hellstrom */ 866cfe4d53eSThomas Hellstrom 867cfe4d53eSThomas Hellstrom /** 868cfe4d53eSThomas Hellstrom * enum drm_vmw_surface_flags 869cfe4d53eSThomas Hellstrom * 870cfe4d53eSThomas Hellstrom * @drm_vmw_surface_flag_shareable: Whether the surface is shareable 871cfe4d53eSThomas Hellstrom * @drm_vmw_surface_flag_scanout: Whether the surface is a scanout 872cfe4d53eSThomas Hellstrom * surface. 873cfe4d53eSThomas Hellstrom * @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is 874cfe4d53eSThomas Hellstrom * given. 875cfe4d53eSThomas Hellstrom */ 876cfe4d53eSThomas Hellstrom enum drm_vmw_surface_flags { 877cfe4d53eSThomas Hellstrom drm_vmw_surface_flag_shareable = (1 << 0), 878cfe4d53eSThomas Hellstrom drm_vmw_surface_flag_scanout = (1 << 1), 879cfe4d53eSThomas Hellstrom drm_vmw_surface_flag_create_buffer = (1 << 2) 880cfe4d53eSThomas Hellstrom }; 881cfe4d53eSThomas Hellstrom 882cfe4d53eSThomas Hellstrom /** 883cfe4d53eSThomas Hellstrom * struct drm_vmw_gb_surface_create_req 884cfe4d53eSThomas Hellstrom * 885cfe4d53eSThomas Hellstrom * @svga3d_flags: SVGA3d surface flags for the device. 886cfe4d53eSThomas Hellstrom * @format: SVGA3d format. 887cfe4d53eSThomas Hellstrom * @mip_level: Number of mip levels for all faces. 888cfe4d53eSThomas Hellstrom * @drm_surface_flags Flags as described above. 88915c6f656SZack Rusin * @multisample_count Future use. Set to 0. 890cfe4d53eSThomas Hellstrom * @autogen_filter Future use. Set to 0. 891cfe4d53eSThomas Hellstrom * @buffer_handle Buffer handle of backup buffer. SVGA3D_INVALID_ID 892cfe4d53eSThomas Hellstrom * if none. 893cfe4d53eSThomas Hellstrom * @base_size Size of the base mip level for all faces. 894cfe4d53eSThomas Hellstrom * 895cfe4d53eSThomas Hellstrom * Input argument to the DRM_VMW_GB_SURFACE_CREATE Ioctl. 896cfe4d53eSThomas Hellstrom * Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl. 897cfe4d53eSThomas Hellstrom */ 898cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_create_req { 899cfe4d53eSThomas Hellstrom uint32_t svga3d_flags; 900cfe4d53eSThomas Hellstrom uint32_t format; 901cfe4d53eSThomas Hellstrom uint32_t mip_levels; 902cfe4d53eSThomas Hellstrom enum drm_vmw_surface_flags drm_surface_flags; 903cfe4d53eSThomas Hellstrom uint32_t multisample_count; 904cfe4d53eSThomas Hellstrom uint32_t autogen_filter; 905cfe4d53eSThomas Hellstrom uint32_t buffer_handle; 906cfe4d53eSThomas Hellstrom uint32_t pad64; 907cfe4d53eSThomas Hellstrom struct drm_vmw_size base_size; 908cfe4d53eSThomas Hellstrom }; 909cfe4d53eSThomas Hellstrom 910cfe4d53eSThomas Hellstrom /** 911cfe4d53eSThomas Hellstrom * struct drm_vmw_gb_surface_create_rep 912cfe4d53eSThomas Hellstrom * 913cfe4d53eSThomas Hellstrom * @handle: Surface handle. 914cfe4d53eSThomas Hellstrom * @backup_size: Size of backup buffers for this surface. 915cfe4d53eSThomas Hellstrom * @buffer_handle: Handle of backup buffer. SVGA3D_INVALID_ID if none. 916cfe4d53eSThomas Hellstrom * @buffer_size: Actual size of the buffer identified by 917cfe4d53eSThomas Hellstrom * @buffer_handle 918cfe4d53eSThomas Hellstrom * @buffer_map_handle: Offset into device address space for the buffer 919cfe4d53eSThomas Hellstrom * identified by @buffer_handle. 920cfe4d53eSThomas Hellstrom * 921cfe4d53eSThomas Hellstrom * Part of output argument for the DRM_VMW_GB_SURFACE_REF ioctl. 922cfe4d53eSThomas Hellstrom * Output argument for the DRM_VMW_GB_SURFACE_CREATE ioctl. 923cfe4d53eSThomas Hellstrom */ 924cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_create_rep { 925cfe4d53eSThomas Hellstrom uint32_t handle; 926cfe4d53eSThomas Hellstrom uint32_t backup_size; 927cfe4d53eSThomas Hellstrom uint32_t buffer_handle; 928cfe4d53eSThomas Hellstrom uint32_t buffer_size; 929cfe4d53eSThomas Hellstrom uint64_t buffer_map_handle; 930cfe4d53eSThomas Hellstrom }; 931cfe4d53eSThomas Hellstrom 932cfe4d53eSThomas Hellstrom /** 933cfe4d53eSThomas Hellstrom * union drm_vmw_gb_surface_create_arg 934cfe4d53eSThomas Hellstrom * 935cfe4d53eSThomas Hellstrom * @req: Input argument as described above. 936cfe4d53eSThomas Hellstrom * @rep: Output argument as described above. 937cfe4d53eSThomas Hellstrom * 938cfe4d53eSThomas Hellstrom * Argument to the DRM_VMW_GB_SURFACE_CREATE ioctl. 939cfe4d53eSThomas Hellstrom */ 940cfe4d53eSThomas Hellstrom union drm_vmw_gb_surface_create_arg { 941cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_create_rep rep; 942cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_create_req req; 943cfe4d53eSThomas Hellstrom }; 944cfe4d53eSThomas Hellstrom 945cfe4d53eSThomas Hellstrom /*************************************************************************/ 946cfe4d53eSThomas Hellstrom /** 947cfe4d53eSThomas Hellstrom * DRM_VMW_GB_SURFACE_REF - Reference a host surface. 948cfe4d53eSThomas Hellstrom * 949cfe4d53eSThomas Hellstrom * Puts a reference on a host surface with a given handle, as previously 950cfe4d53eSThomas Hellstrom * returned by the DRM_VMW_GB_SURFACE_CREATE ioctl. 951cfe4d53eSThomas Hellstrom * A reference will make sure the surface isn't destroyed while we hold 952cfe4d53eSThomas Hellstrom * it and will allow the calling client to use the surface handle in 953cfe4d53eSThomas Hellstrom * the command stream. 954cfe4d53eSThomas Hellstrom * 955cfe4d53eSThomas Hellstrom * On successful return, the Ioctl returns the surface information given 956cfe4d53eSThomas Hellstrom * to and returned from the DRM_VMW_GB_SURFACE_CREATE ioctl. 957cfe4d53eSThomas Hellstrom */ 958cfe4d53eSThomas Hellstrom 959cfe4d53eSThomas Hellstrom /** 960cfe4d53eSThomas Hellstrom * struct drm_vmw_gb_surface_reference_arg 961cfe4d53eSThomas Hellstrom * 962cfe4d53eSThomas Hellstrom * @creq: The data used as input when the surface was created, as described 963cfe4d53eSThomas Hellstrom * above at "struct drm_vmw_gb_surface_create_req" 964cfe4d53eSThomas Hellstrom * @crep: Additional data output when the surface was created, as described 965cfe4d53eSThomas Hellstrom * above at "struct drm_vmw_gb_surface_create_rep" 966cfe4d53eSThomas Hellstrom * 967cfe4d53eSThomas Hellstrom * Output Argument to the DRM_VMW_GB_SURFACE_REF ioctl. 968cfe4d53eSThomas Hellstrom */ 969cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_ref_rep { 970cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_create_req creq; 971cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_create_rep crep; 972cfe4d53eSThomas Hellstrom }; 973cfe4d53eSThomas Hellstrom 974cfe4d53eSThomas Hellstrom /** 975cfe4d53eSThomas Hellstrom * union drm_vmw_gb_surface_reference_arg 976cfe4d53eSThomas Hellstrom * 977cfe4d53eSThomas Hellstrom * @req: Input data as described above at "struct drm_vmw_surface_arg" 978cfe4d53eSThomas Hellstrom * @rep: Output data as described above at "struct drm_vmw_gb_surface_ref_rep" 979cfe4d53eSThomas Hellstrom * 980cfe4d53eSThomas Hellstrom * Argument to the DRM_VMW_GB_SURFACE_REF Ioctl. 981cfe4d53eSThomas Hellstrom */ 982cfe4d53eSThomas Hellstrom union drm_vmw_gb_surface_reference_arg { 983cfe4d53eSThomas Hellstrom struct drm_vmw_gb_surface_ref_rep rep; 984cfe4d53eSThomas Hellstrom struct drm_vmw_surface_arg req; 985cfe4d53eSThomas Hellstrom }; 986cfe4d53eSThomas Hellstrom 987cfe4d53eSThomas Hellstrom 988cfe4d53eSThomas Hellstrom 989718dceddSDavid Howells #endif 990