1f5fbb83fSMauro Carvalho Chehab // SPDX-License-Identifier: GPL-2.0 2ad85094bSMauro Carvalho Chehab /* 3ad85094bSMauro Carvalho Chehab * Support for GalaxyCore GC0310 VGA camera sensor. 4ad85094bSMauro Carvalho Chehab * 5ad85094bSMauro Carvalho Chehab * Copyright (c) 2013 Intel Corporation. All Rights Reserved. 62ec5bfe0SHans de Goede * Copyright (c) 2023 Hans de Goede <hdegoede@redhat.com> 7ad85094bSMauro Carvalho Chehab * 8ad85094bSMauro Carvalho Chehab * This program is free software; you can redistribute it and/or 9ad85094bSMauro Carvalho Chehab * modify it under the terms of the GNU General Public License version 10ad85094bSMauro Carvalho Chehab * 2 as published by the Free Software Foundation. 11ad85094bSMauro Carvalho Chehab * 12ad85094bSMauro Carvalho Chehab * This program is distributed in the hope that it will be useful, 13ad85094bSMauro Carvalho Chehab * but WITHOUT ANY WARRANTY; without even the implied warranty of 14ad85094bSMauro Carvalho Chehab * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15ad85094bSMauro Carvalho Chehab * GNU General Public License for more details. 16ad85094bSMauro Carvalho Chehab * 17ad85094bSMauro Carvalho Chehab */ 18ad85094bSMauro Carvalho Chehab 19ad85094bSMauro Carvalho Chehab #include <linux/delay.h> 2063558464SHans de Goede #include <linux/errno.h> 212ec5bfe0SHans de Goede #include <linux/gpio/consumer.h> 22ad85094bSMauro Carvalho Chehab #include <linux/i2c.h> 2363558464SHans de Goede #include <linux/kernel.h> 2463558464SHans de Goede #include <linux/module.h> 252726c899SHans de Goede #include <linux/pm_runtime.h> 2663558464SHans de Goede #include <linux/string.h> 2763558464SHans de Goede #include <linux/types.h> 28ad85094bSMauro Carvalho Chehab 29*1bb2a551SHans de Goede #include <media/v4l2-ctrls.h> 3063558464SHans de Goede #include <media/v4l2-device.h> 3163558464SHans de Goede 3263558464SHans de Goede #include "../include/linux/atomisp_gmin_platform.h" 33*1bb2a551SHans de Goede 34*1bb2a551SHans de Goede #define GC0310_NATIVE_WIDTH 656 35*1bb2a551SHans de Goede #define GC0310_NATIVE_HEIGHT 496 36*1bb2a551SHans de Goede 37*1bb2a551SHans de Goede #define GC0310_FPS 30 38*1bb2a551SHans de Goede #define GC0310_SKIP_FRAMES 3 39*1bb2a551SHans de Goede 40*1bb2a551SHans de Goede #define GC0310_FOCAL_LENGTH_NUM 278 /* 2.78mm */ 41*1bb2a551SHans de Goede 42*1bb2a551SHans de Goede #define GC0310_ID 0xa310 43*1bb2a551SHans de Goede 44*1bb2a551SHans de Goede #define GC0310_RESET_RELATED 0xFE 45*1bb2a551SHans de Goede #define GC0310_REGISTER_PAGE_0 0x0 46*1bb2a551SHans de Goede #define GC0310_REGISTER_PAGE_3 0x3 47*1bb2a551SHans de Goede 48*1bb2a551SHans de Goede /* 49*1bb2a551SHans de Goede * GC0310 System control registers 50*1bb2a551SHans de Goede */ 51*1bb2a551SHans de Goede #define GC0310_SW_STREAM 0x10 52*1bb2a551SHans de Goede 53*1bb2a551SHans de Goede #define GC0310_SC_CMMN_CHIP_ID_H 0xf0 54*1bb2a551SHans de Goede #define GC0310_SC_CMMN_CHIP_ID_L 0xf1 55*1bb2a551SHans de Goede 56*1bb2a551SHans de Goede #define GC0310_AEC_PK_EXPO_H 0x03 57*1bb2a551SHans de Goede #define GC0310_AEC_PK_EXPO_L 0x04 58*1bb2a551SHans de Goede #define GC0310_AGC_ADJ 0x48 59*1bb2a551SHans de Goede #define GC0310_DGC_ADJ 0x71 60*1bb2a551SHans de Goede #define GC0310_GROUP_ACCESS 0x3208 61*1bb2a551SHans de Goede 62*1bb2a551SHans de Goede #define GC0310_H_CROP_START_H 0x09 63*1bb2a551SHans de Goede #define GC0310_H_CROP_START_L 0x0A 64*1bb2a551SHans de Goede #define GC0310_V_CROP_START_H 0x0B 65*1bb2a551SHans de Goede #define GC0310_V_CROP_START_L 0x0C 66*1bb2a551SHans de Goede #define GC0310_H_OUTSIZE_H 0x0F 67*1bb2a551SHans de Goede #define GC0310_H_OUTSIZE_L 0x10 68*1bb2a551SHans de Goede #define GC0310_V_OUTSIZE_H 0x0D 69*1bb2a551SHans de Goede #define GC0310_V_OUTSIZE_L 0x0E 70*1bb2a551SHans de Goede #define GC0310_H_BLANKING_H 0x05 71*1bb2a551SHans de Goede #define GC0310_H_BLANKING_L 0x06 72*1bb2a551SHans de Goede #define GC0310_V_BLANKING_H 0x07 73*1bb2a551SHans de Goede #define GC0310_V_BLANKING_L 0x08 74*1bb2a551SHans de Goede #define GC0310_SH_DELAY 0x11 75*1bb2a551SHans de Goede 76*1bb2a551SHans de Goede #define GC0310_START_STREAMING 0x94 /* 8-bit enable */ 77*1bb2a551SHans de Goede #define GC0310_STOP_STREAMING 0x0 /* 8-bit disable */ 78*1bb2a551SHans de Goede 79*1bb2a551SHans de Goede #define to_gc0310_sensor(x) container_of(x, struct gc0310_device, sd) 80*1bb2a551SHans de Goede 81*1bb2a551SHans de Goede struct gc0310_device { 82*1bb2a551SHans de Goede struct v4l2_subdev sd; 83*1bb2a551SHans de Goede struct media_pad pad; 84*1bb2a551SHans de Goede /* Protect against concurrent changes to controls */ 85*1bb2a551SHans de Goede struct mutex input_lock; 86*1bb2a551SHans de Goede bool is_streaming; 87*1bb2a551SHans de Goede 88*1bb2a551SHans de Goede struct gpio_desc *reset; 89*1bb2a551SHans de Goede struct gpio_desc *powerdown; 90*1bb2a551SHans de Goede 91*1bb2a551SHans de Goede struct gc0310_mode { 92*1bb2a551SHans de Goede struct v4l2_mbus_framefmt fmt; 93*1bb2a551SHans de Goede } mode; 94*1bb2a551SHans de Goede 95*1bb2a551SHans de Goede struct gc0310_ctrls { 96*1bb2a551SHans de Goede struct v4l2_ctrl_handler handler; 97*1bb2a551SHans de Goede struct v4l2_ctrl *exposure; 98*1bb2a551SHans de Goede struct v4l2_ctrl *gain; 99*1bb2a551SHans de Goede } ctrls; 100*1bb2a551SHans de Goede }; 101*1bb2a551SHans de Goede 102*1bb2a551SHans de Goede struct gc0310_reg { 103*1bb2a551SHans de Goede u8 reg; 104*1bb2a551SHans de Goede u8 val; 105*1bb2a551SHans de Goede }; 106*1bb2a551SHans de Goede 107*1bb2a551SHans de Goede static const struct gc0310_reg gc0310_reset_register[] = { 108*1bb2a551SHans de Goede /* System registers */ 109*1bb2a551SHans de Goede { 0xfe, 0xf0 }, 110*1bb2a551SHans de Goede { 0xfe, 0xf0 }, 111*1bb2a551SHans de Goede { 0xfe, 0x00 }, 112*1bb2a551SHans de Goede 113*1bb2a551SHans de Goede { 0xfc, 0x0e }, /* 4e */ 114*1bb2a551SHans de Goede { 0xfc, 0x0e }, /* 16//4e // [0]apwd [6]regf_clk_gate */ 115*1bb2a551SHans de Goede { 0xf2, 0x80 }, /* sync output */ 116*1bb2a551SHans de Goede { 0xf3, 0x00 }, /* 1f//01 data output */ 117*1bb2a551SHans de Goede { 0xf7, 0x33 }, /* f9 */ 118*1bb2a551SHans de Goede { 0xf8, 0x05 }, /* 00 */ 119*1bb2a551SHans de Goede { 0xf9, 0x0e }, /* 0x8e //0f */ 120*1bb2a551SHans de Goede { 0xfa, 0x11 }, 121*1bb2a551SHans de Goede 122*1bb2a551SHans de Goede /* MIPI */ 123*1bb2a551SHans de Goede { 0xfe, 0x03 }, 124*1bb2a551SHans de Goede { 0x01, 0x03 }, /* mipi 1lane */ 125*1bb2a551SHans de Goede { 0x02, 0x22 }, /* 0x33 */ 126*1bb2a551SHans de Goede { 0x03, 0x94 }, 127*1bb2a551SHans de Goede { 0x04, 0x01 }, /* fifo_prog */ 128*1bb2a551SHans de Goede { 0x05, 0x00 }, /* fifo_prog */ 129*1bb2a551SHans de Goede { 0x06, 0x80 }, /* b0 //YUV ISP data */ 130*1bb2a551SHans de Goede { 0x11, 0x2a }, /* 1e //LDI set YUV422 */ 131*1bb2a551SHans de Goede { 0x12, 0x90 }, /* 00 //04 //00 //04//00 //LWC[7:0] */ 132*1bb2a551SHans de Goede { 0x13, 0x02 }, /* 05 //05 //LWC[15:8] */ 133*1bb2a551SHans de Goede { 0x15, 0x12 }, /* 0x10 //DPHYY_MODE read_ready */ 134*1bb2a551SHans de Goede { 0x17, 0x01 }, 135*1bb2a551SHans de Goede { 0x40, 0x08 }, 136*1bb2a551SHans de Goede { 0x41, 0x00 }, 137*1bb2a551SHans de Goede { 0x42, 0x00 }, 138*1bb2a551SHans de Goede { 0x43, 0x00 }, 139*1bb2a551SHans de Goede { 0x21, 0x02 }, /* 0x01 */ 140*1bb2a551SHans de Goede { 0x22, 0x02 }, /* 0x01 */ 141*1bb2a551SHans de Goede { 0x23, 0x01 }, /* 0x05 //Nor:0x05 DOU:0x06 */ 142*1bb2a551SHans de Goede { 0x29, 0x00 }, 143*1bb2a551SHans de Goede { 0x2A, 0x25 }, /* 0x05 //data zero 0x7a de */ 144*1bb2a551SHans de Goede { 0x2B, 0x02 }, 145*1bb2a551SHans de Goede 146*1bb2a551SHans de Goede { 0xfe, 0x00 }, 147*1bb2a551SHans de Goede 148*1bb2a551SHans de Goede /* CISCTL */ 149*1bb2a551SHans de Goede { 0x00, 0x2f }, /* 2f//0f//02//01 */ 150*1bb2a551SHans de Goede { 0x01, 0x0f }, /* 06 */ 151*1bb2a551SHans de Goede { 0x02, 0x04 }, 152*1bb2a551SHans de Goede { 0x4f, 0x00 }, /* AEC 0FF */ 153*1bb2a551SHans de Goede { 0x03, 0x01 }, /* 0x03 //04 */ 154*1bb2a551SHans de Goede { 0x04, 0xc0 }, /* 0xe8 //58 */ 155*1bb2a551SHans de Goede { 0x05, 0x00 }, 156*1bb2a551SHans de Goede { 0x06, 0xb2 }, /* 0x0a //HB */ 157*1bb2a551SHans de Goede { 0x07, 0x00 }, 158*1bb2a551SHans de Goede { 0x08, 0x0c }, /* 0x89 //VB */ 159*1bb2a551SHans de Goede { 0x09, 0x00 }, /* row start */ 160*1bb2a551SHans de Goede { 0x0a, 0x00 }, 161*1bb2a551SHans de Goede { 0x0b, 0x00 }, /* col start */ 162*1bb2a551SHans de Goede { 0x0c, 0x00 }, 163*1bb2a551SHans de Goede { 0x0d, 0x01 }, /* height */ 164*1bb2a551SHans de Goede { 0x0e, 0xf2 }, /* 0xf7 //height */ 165*1bb2a551SHans de Goede { 0x0f, 0x02 }, /* width */ 166*1bb2a551SHans de Goede { 0x10, 0x94 }, /* 0xa0 //height */ 167*1bb2a551SHans de Goede { 0x17, 0x14 }, 168*1bb2a551SHans de Goede { 0x18, 0x1a }, /* 0a//[4]double reset */ 169*1bb2a551SHans de Goede { 0x19, 0x14 }, /* AD pipeline */ 170*1bb2a551SHans de Goede { 0x1b, 0x48 }, 171*1bb2a551SHans de Goede { 0x1e, 0x6b }, /* 3b//col bias */ 172*1bb2a551SHans de Goede { 0x1f, 0x28 }, /* 20//00//08//txlow */ 173*1bb2a551SHans de Goede { 0x20, 0x89 }, /* 88//0c//[3:2]DA15 */ 174*1bb2a551SHans de Goede { 0x21, 0x49 }, /* 48//[3] txhigh */ 175*1bb2a551SHans de Goede { 0x22, 0xb0 }, 176*1bb2a551SHans de Goede { 0x23, 0x04 }, /* [1:0]vcm_r */ 177*1bb2a551SHans de Goede { 0x24, 0x16 }, /* 15 */ 178*1bb2a551SHans de Goede { 0x34, 0x20 }, /* [6:4] rsg high//range */ 179*1bb2a551SHans de Goede 180*1bb2a551SHans de Goede /* BLK */ 181*1bb2a551SHans de Goede { 0x26, 0x23 }, /* [1]dark_current_en [0]offset_en */ 182*1bb2a551SHans de Goede { 0x28, 0xff }, /* BLK_limie_value */ 183*1bb2a551SHans de Goede { 0x29, 0x00 }, /* global offset */ 184*1bb2a551SHans de Goede { 0x33, 0x18 }, /* offset_ratio */ 185*1bb2a551SHans de Goede { 0x37, 0x20 }, /* dark_current_ratio */ 186*1bb2a551SHans de Goede { 0x2a, 0x00 }, 187*1bb2a551SHans de Goede { 0x2b, 0x00 }, 188*1bb2a551SHans de Goede { 0x2c, 0x00 }, 189*1bb2a551SHans de Goede { 0x2d, 0x00 }, 190*1bb2a551SHans de Goede { 0x2e, 0x00 }, 191*1bb2a551SHans de Goede { 0x2f, 0x00 }, 192*1bb2a551SHans de Goede { 0x30, 0x00 }, 193*1bb2a551SHans de Goede { 0x31, 0x00 }, 194*1bb2a551SHans de Goede { 0x47, 0x80 }, /* a7 */ 195*1bb2a551SHans de Goede { 0x4e, 0x66 }, /* select_row */ 196*1bb2a551SHans de Goede { 0xa8, 0x02 }, /* win_width_dark, same with crop_win_width */ 197*1bb2a551SHans de Goede { 0xa9, 0x80 }, 198*1bb2a551SHans de Goede 199*1bb2a551SHans de Goede /* ISP */ 200*1bb2a551SHans de Goede { 0x40, 0x06 }, /* 0xff //ff //48 */ 201*1bb2a551SHans de Goede { 0x41, 0x00 }, /* 0x21 //00//[0]curve_en */ 202*1bb2a551SHans de Goede { 0x42, 0x04 }, /* 0xcf //0a//[1]awn_en */ 203*1bb2a551SHans de Goede { 0x44, 0x18 }, /* 0x18 //02 */ 204*1bb2a551SHans de Goede { 0x46, 0x02 }, /* 0x03 //sync */ 205*1bb2a551SHans de Goede { 0x49, 0x03 }, 206*1bb2a551SHans de Goede { 0x4c, 0x20 }, /* 00[5]pretect exp */ 207*1bb2a551SHans de Goede { 0x50, 0x01 }, /* crop enable */ 208*1bb2a551SHans de Goede { 0x51, 0x00 }, 209*1bb2a551SHans de Goede { 0x52, 0x00 }, 210*1bb2a551SHans de Goede { 0x53, 0x00 }, 211*1bb2a551SHans de Goede { 0x54, 0x01 }, 212*1bb2a551SHans de Goede { 0x55, 0x01 }, /* crop window height */ 213*1bb2a551SHans de Goede { 0x56, 0xf0 }, 214*1bb2a551SHans de Goede { 0x57, 0x02 }, /* crop window width */ 215*1bb2a551SHans de Goede { 0x58, 0x90 }, 216*1bb2a551SHans de Goede 217*1bb2a551SHans de Goede /* Gain */ 218*1bb2a551SHans de Goede { 0x70, 0x70 }, /* 70 //80//global gain */ 219*1bb2a551SHans de Goede { 0x71, 0x20 }, /* pregain gain */ 220*1bb2a551SHans de Goede { 0x72, 0x40 }, /* post gain */ 221*1bb2a551SHans de Goede { 0x5a, 0x84 }, /* 84//analog gain 0 */ 222*1bb2a551SHans de Goede { 0x5b, 0xc9 }, /* c9 */ 223*1bb2a551SHans de Goede { 0x5c, 0xed }, /* ed//not use pga gain highest level */ 224*1bb2a551SHans de Goede { 0x77, 0x40 }, /* R gain 0x74 //awb gain */ 225*1bb2a551SHans de Goede { 0x78, 0x40 }, /* G gain */ 226*1bb2a551SHans de Goede { 0x79, 0x40 }, /* B gain 0x5f */ 227*1bb2a551SHans de Goede 228*1bb2a551SHans de Goede { 0x48, 0x00 }, 229*1bb2a551SHans de Goede { 0xfe, 0x01 }, 230*1bb2a551SHans de Goede { 0x0a, 0x45 }, /* [7]col gain mode */ 231*1bb2a551SHans de Goede 232*1bb2a551SHans de Goede { 0x3e, 0x40 }, 233*1bb2a551SHans de Goede { 0x3f, 0x5c }, 234*1bb2a551SHans de Goede { 0x40, 0x7b }, 235*1bb2a551SHans de Goede { 0x41, 0xbd }, 236*1bb2a551SHans de Goede { 0x42, 0xf6 }, 237*1bb2a551SHans de Goede { 0x43, 0x63 }, 238*1bb2a551SHans de Goede { 0x03, 0x60 }, 239*1bb2a551SHans de Goede { 0x44, 0x03 }, 240*1bb2a551SHans de Goede 241*1bb2a551SHans de Goede /* Dark / Sun mode related */ 242*1bb2a551SHans de Goede { 0xfe, 0x01 }, 243*1bb2a551SHans de Goede { 0x45, 0xa4 }, /* 0xf7 */ 244*1bb2a551SHans de Goede { 0x46, 0xf0 }, /* 0xff //f0//sun value th */ 245*1bb2a551SHans de Goede { 0x48, 0x03 }, /* sun mode */ 246*1bb2a551SHans de Goede { 0x4f, 0x60 }, /* sun_clamp */ 247*1bb2a551SHans de Goede { 0xfe, 0x00 }, 248*1bb2a551SHans de Goede }; 249*1bb2a551SHans de Goede 250*1bb2a551SHans de Goede static const struct gc0310_reg gc0310_VGA_30fps[] = { 251*1bb2a551SHans de Goede { 0xfe, 0x00 }, 252*1bb2a551SHans de Goede { 0x0d, 0x01 }, /* height */ 253*1bb2a551SHans de Goede { 0x0e, 0xf2 }, /* 0xf7 //height */ 254*1bb2a551SHans de Goede { 0x0f, 0x02 }, /* width */ 255*1bb2a551SHans de Goede { 0x10, 0x94 }, /* 0xa0 //height */ 256*1bb2a551SHans de Goede 257*1bb2a551SHans de Goede { 0x50, 0x01 }, /* crop enable */ 258*1bb2a551SHans de Goede { 0x51, 0x00 }, 259*1bb2a551SHans de Goede { 0x52, 0x00 }, 260*1bb2a551SHans de Goede { 0x53, 0x00 }, 261*1bb2a551SHans de Goede { 0x54, 0x01 }, 262*1bb2a551SHans de Goede { 0x55, 0x01 }, /* crop window height */ 263*1bb2a551SHans de Goede { 0x56, 0xf0 }, 264*1bb2a551SHans de Goede { 0x57, 0x02 }, /* crop window width */ 265*1bb2a551SHans de Goede { 0x58, 0x90 }, 266*1bb2a551SHans de Goede 267*1bb2a551SHans de Goede { 0xfe, 0x03 }, 268*1bb2a551SHans de Goede { 0x12, 0x90 }, /* 00 //04 //00 //04//00 //LWC[7:0] */ 269*1bb2a551SHans de Goede { 0x13, 0x02 }, /* 05 //05 //LWC[15:8] */ 270*1bb2a551SHans de Goede 271*1bb2a551SHans de Goede { 0xfe, 0x00 }, 272*1bb2a551SHans de Goede }; 273ad85094bSMauro Carvalho Chehab 274ad85094bSMauro Carvalho Chehab /* 275ad85094bSMauro Carvalho Chehab * gc0310_write_reg_array - Initializes a list of GC0310 registers 276ad85094bSMauro Carvalho Chehab * @client: i2c driver client structure 277ad85094bSMauro Carvalho Chehab * @reglist: list of registers to be written 278bfe06aeeSHans de Goede * @count: number of register, value pairs in the list 279ad85094bSMauro Carvalho Chehab */ 280ad85094bSMauro Carvalho Chehab static int gc0310_write_reg_array(struct i2c_client *client, 281bfe06aeeSHans de Goede const struct gc0310_reg *reglist, int count) 282ad85094bSMauro Carvalho Chehab { 283bfe06aeeSHans de Goede int i, err; 284ad85094bSMauro Carvalho Chehab 285bfe06aeeSHans de Goede for (i = 0; i < count; i++) { 28665e5ef2fSHans de Goede err = i2c_smbus_write_byte_data(client, reglist[i].reg, reglist[i].val); 28765e5ef2fSHans de Goede if (err) { 28865e5ef2fSHans de Goede dev_err(&client->dev, "write error: wrote 0x%x to offset 0x%x error %d", 28965e5ef2fSHans de Goede reglist[i].val, reglist[i].reg, err); 290ad85094bSMauro Carvalho Chehab return err; 291ad85094bSMauro Carvalho Chehab } 29265e5ef2fSHans de Goede } 293ad85094bSMauro Carvalho Chehab 294e1a4b3a7SHans de Goede return 0; 295ad85094bSMauro Carvalho Chehab } 296bdfe0bebSMauro Carvalho Chehab 297ef5fb5d4SHans de Goede static int gc0310_exposure_set(struct gc0310_device *dev, u32 exp) 298ef5fb5d4SHans de Goede { 299ef5fb5d4SHans de Goede struct i2c_client *client = v4l2_get_subdevdata(&dev->sd); 300ef5fb5d4SHans de Goede 301ef5fb5d4SHans de Goede return i2c_smbus_write_word_swapped(client, GC0310_AEC_PK_EXPO_H, exp); 302ef5fb5d4SHans de Goede } 303ef5fb5d4SHans de Goede 304ef5fb5d4SHans de Goede static int gc0310_gain_set(struct gc0310_device *dev, u32 gain) 305ef5fb5d4SHans de Goede { 306ef5fb5d4SHans de Goede struct i2c_client *client = v4l2_get_subdevdata(&dev->sd); 307ef5fb5d4SHans de Goede u8 again, dgain; 308ef5fb5d4SHans de Goede int ret; 309ef5fb5d4SHans de Goede 310ef5fb5d4SHans de Goede /* Taken from original driver, this never sets dgain lower then 32? */ 311ef5fb5d4SHans de Goede 312ef5fb5d4SHans de Goede /* Change 0 - 95 to 32 - 127 */ 313ef5fb5d4SHans de Goede gain += 32; 314ef5fb5d4SHans de Goede 315ef5fb5d4SHans de Goede if (gain < 64) { 316ef5fb5d4SHans de Goede again = 0x0; /* sqrt(2) */ 317ef5fb5d4SHans de Goede dgain = gain; 318ef5fb5d4SHans de Goede } else { 319ef5fb5d4SHans de Goede again = 0x2; /* 2 * sqrt(2) */ 320ef5fb5d4SHans de Goede dgain = gain / 2; 321ef5fb5d4SHans de Goede } 322ef5fb5d4SHans de Goede 323ef5fb5d4SHans de Goede ret = i2c_smbus_write_byte_data(client, GC0310_AGC_ADJ, again); 324ef5fb5d4SHans de Goede if (ret) 325ef5fb5d4SHans de Goede return ret; 326ef5fb5d4SHans de Goede 327ef5fb5d4SHans de Goede return i2c_smbus_write_byte_data(client, GC0310_DGC_ADJ, dgain); 328ef5fb5d4SHans de Goede } 329ef5fb5d4SHans de Goede 330ad85094bSMauro Carvalho Chehab static int gc0310_s_ctrl(struct v4l2_ctrl *ctrl) 331ad85094bSMauro Carvalho Chehab { 332ef5fb5d4SHans de Goede struct gc0310_device *dev = 333ef5fb5d4SHans de Goede container_of(ctrl->handler, struct gc0310_device, ctrls.handler); 334ef5fb5d4SHans de Goede int ret; 335ef5fb5d4SHans de Goede 3362726c899SHans de Goede /* Only apply changes to the controls if the device is powered up */ 3372726c899SHans de Goede if (!pm_runtime_get_if_in_use(dev->sd.dev)) 338ef5fb5d4SHans de Goede return 0; 339ad85094bSMauro Carvalho Chehab 340ad85094bSMauro Carvalho Chehab switch (ctrl->id) { 341ef5fb5d4SHans de Goede case V4L2_CID_EXPOSURE: 342ef5fb5d4SHans de Goede ret = gc0310_exposure_set(dev, ctrl->val); 343ef5fb5d4SHans de Goede break; 344ef5fb5d4SHans de Goede case V4L2_CID_GAIN: 345ef5fb5d4SHans de Goede ret = gc0310_gain_set(dev, ctrl->val); 346ef5fb5d4SHans de Goede break; 347ad85094bSMauro Carvalho Chehab default: 348ad85094bSMauro Carvalho Chehab ret = -EINVAL; 349ef5fb5d4SHans de Goede break; 350ad85094bSMauro Carvalho Chehab } 351ef5fb5d4SHans de Goede 3522726c899SHans de Goede pm_runtime_put(dev->sd.dev); 353ad85094bSMauro Carvalho Chehab return ret; 354ad85094bSMauro Carvalho Chehab } 355ad85094bSMauro Carvalho Chehab 356ad85094bSMauro Carvalho Chehab static const struct v4l2_ctrl_ops ctrl_ops = { 357ad85094bSMauro Carvalho Chehab .s_ctrl = gc0310_s_ctrl, 358ad85094bSMauro Carvalho Chehab }; 359ad85094bSMauro Carvalho Chehab 3609783b96aSHans de Goede static struct v4l2_mbus_framefmt * 3619783b96aSHans de Goede gc0310_get_pad_format(struct gc0310_device *dev, 3629783b96aSHans de Goede struct v4l2_subdev_state *state, 3639783b96aSHans de Goede unsigned int pad, enum v4l2_subdev_format_whence which) 364ad85094bSMauro Carvalho Chehab { 3659783b96aSHans de Goede if (which == V4L2_SUBDEV_FORMAT_TRY) 3669783b96aSHans de Goede return v4l2_subdev_get_try_format(&dev->sd, state, pad); 367ad85094bSMauro Carvalho Chehab 3689783b96aSHans de Goede return &dev->mode.fmt; 369ad85094bSMauro Carvalho Chehab } 370ad85094bSMauro Carvalho Chehab 3719783b96aSHans de Goede /* The GC0310 currently only supports 1 fixed fmt */ 3729783b96aSHans de Goede static void gc0310_fill_format(struct v4l2_mbus_framefmt *fmt) 3739783b96aSHans de Goede { 3749783b96aSHans de Goede memset(fmt, 0, sizeof(*fmt)); 3759783b96aSHans de Goede fmt->width = GC0310_NATIVE_WIDTH; 3769783b96aSHans de Goede fmt->height = GC0310_NATIVE_HEIGHT; 3779783b96aSHans de Goede fmt->field = V4L2_FIELD_NONE; 3789783b96aSHans de Goede fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8; 379ad85094bSMauro Carvalho Chehab } 380ad85094bSMauro Carvalho Chehab 381ad85094bSMauro Carvalho Chehab static int gc0310_set_fmt(struct v4l2_subdev *sd, 3820d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 383ad85094bSMauro Carvalho Chehab struct v4l2_subdev_format *format) 384ad85094bSMauro Carvalho Chehab { 3859783b96aSHans de Goede struct gc0310_device *dev = to_gc0310_sensor(sd); 3869783b96aSHans de Goede struct v4l2_mbus_framefmt *fmt; 387bdfe0bebSMauro Carvalho Chehab 3889783b96aSHans de Goede fmt = gc0310_get_pad_format(dev, sd_state, format->pad, format->which); 3899783b96aSHans de Goede gc0310_fill_format(fmt); 390ad85094bSMauro Carvalho Chehab 3919783b96aSHans de Goede format->format = *fmt; 3929783b96aSHans de Goede return 0; 393ad85094bSMauro Carvalho Chehab } 394ad85094bSMauro Carvalho Chehab 395ad85094bSMauro Carvalho Chehab static int gc0310_get_fmt(struct v4l2_subdev *sd, 3960d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 397ad85094bSMauro Carvalho Chehab struct v4l2_subdev_format *format) 398ad85094bSMauro Carvalho Chehab { 399ad85094bSMauro Carvalho Chehab struct gc0310_device *dev = to_gc0310_sensor(sd); 4009783b96aSHans de Goede struct v4l2_mbus_framefmt *fmt; 401ad85094bSMauro Carvalho Chehab 4029783b96aSHans de Goede fmt = gc0310_get_pad_format(dev, sd_state, format->pad, format->which); 4039783b96aSHans de Goede format->format = *fmt; 404ad85094bSMauro Carvalho Chehab return 0; 405ad85094bSMauro Carvalho Chehab } 406ad85094bSMauro Carvalho Chehab 407ad85094bSMauro Carvalho Chehab static int gc0310_detect(struct i2c_client *client) 408ad85094bSMauro Carvalho Chehab { 409ad85094bSMauro Carvalho Chehab struct i2c_adapter *adapter = client->adapter; 410ad85094bSMauro Carvalho Chehab int ret; 411ad85094bSMauro Carvalho Chehab 412ad85094bSMauro Carvalho Chehab if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) 413ad85094bSMauro Carvalho Chehab return -ENODEV; 414ad85094bSMauro Carvalho Chehab 415f5e381ffSHans de Goede ret = pm_runtime_get_sync(&client->dev); 416f5e381ffSHans de Goede if (ret >= 0) 41765e5ef2fSHans de Goede ret = i2c_smbus_read_word_swapped(client, GC0310_SC_CMMN_CHIP_ID_H); 418f5e381ffSHans de Goede pm_runtime_put(&client->dev); 41965e5ef2fSHans de Goede if (ret < 0) { 42065e5ef2fSHans de Goede dev_err(&client->dev, "read sensor_id failed: %d\n", ret); 421ad85094bSMauro Carvalho Chehab return -ENODEV; 422ad85094bSMauro Carvalho Chehab } 423ad85094bSMauro Carvalho Chehab 42465e5ef2fSHans de Goede dev_dbg(&client->dev, "sensor ID = 0x%x\n", ret); 42565e5ef2fSHans de Goede 42665e5ef2fSHans de Goede if (ret != GC0310_ID) { 42765e5ef2fSHans de Goede dev_err(&client->dev, "sensor ID error, read id = 0x%x, target id = 0x%x\n", 42865e5ef2fSHans de Goede ret, GC0310_ID); 429ad85094bSMauro Carvalho Chehab return -ENODEV; 430ad85094bSMauro Carvalho Chehab } 431ad85094bSMauro Carvalho Chehab 432ad85094bSMauro Carvalho Chehab dev_dbg(&client->dev, "detect gc0310 success\n"); 433ad85094bSMauro Carvalho Chehab 434ad85094bSMauro Carvalho Chehab return 0; 435ad85094bSMauro Carvalho Chehab } 436ad85094bSMauro Carvalho Chehab 437ad85094bSMauro Carvalho Chehab static int gc0310_s_stream(struct v4l2_subdev *sd, int enable) 438ad85094bSMauro Carvalho Chehab { 439ad85094bSMauro Carvalho Chehab struct gc0310_device *dev = to_gc0310_sensor(sd); 440ad85094bSMauro Carvalho Chehab struct i2c_client *client = v4l2_get_subdevdata(sd); 4412726c899SHans de Goede int ret = 0; 442ad85094bSMauro Carvalho Chehab 4432dfc978aSDeepak R Varma dev_dbg(&client->dev, "%s S enable=%d\n", __func__, enable); 444ad85094bSMauro Carvalho Chehab mutex_lock(&dev->input_lock); 445ad85094bSMauro Carvalho Chehab 4462726c899SHans de Goede if (dev->is_streaming == enable) { 4472726c899SHans de Goede dev_warn(&client->dev, "stream already %s\n", enable ? "started" : "stopped"); 448b6763b22SHans de Goede goto error_unlock; 4492726c899SHans de Goede } 4502726c899SHans de Goede 4512726c899SHans de Goede if (enable) { 4522726c899SHans de Goede ret = pm_runtime_get_sync(&client->dev); 4532726c899SHans de Goede if (ret < 0) 4542726c899SHans de Goede goto error_power_down; 455b6763b22SHans de Goede 4562ec5bfe0SHans de Goede msleep(100); 4572ec5bfe0SHans de Goede 458b6763b22SHans de Goede ret = gc0310_write_reg_array(client, gc0310_reset_register, 459b6763b22SHans de Goede ARRAY_SIZE(gc0310_reset_register)); 460b6763b22SHans de Goede if (ret) 461b6763b22SHans de Goede goto error_power_down; 462b6763b22SHans de Goede 463b6763b22SHans de Goede ret = gc0310_write_reg_array(client, gc0310_VGA_30fps, 464b6763b22SHans de Goede ARRAY_SIZE(gc0310_VGA_30fps)); 465b6763b22SHans de Goede if (ret) 466b6763b22SHans de Goede goto error_power_down; 467b6763b22SHans de Goede 468b6763b22SHans de Goede /* restore value of all ctrls */ 469b6763b22SHans de Goede ret = __v4l2_ctrl_handler_setup(&dev->ctrls.handler); 470b6763b22SHans de Goede if (ret) 471b6763b22SHans de Goede goto error_power_down; 472b6763b22SHans de Goede 473ad85094bSMauro Carvalho Chehab /* enable per frame MIPI and sensor ctrl reset */ 47465e5ef2fSHans de Goede ret = i2c_smbus_write_byte_data(client, 0xFE, 0x30); 4752b2297b1SHans de Goede if (ret) 476b6763b22SHans de Goede goto error_power_down; 477ad85094bSMauro Carvalho Chehab } 478ad85094bSMauro Carvalho Chehab 47965e5ef2fSHans de Goede ret = i2c_smbus_write_byte_data(client, GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_3); 4802b2297b1SHans de Goede if (ret) 481b6763b22SHans de Goede goto error_power_down; 482ad85094bSMauro Carvalho Chehab 48365e5ef2fSHans de Goede ret = i2c_smbus_write_byte_data(client, GC0310_SW_STREAM, 48465e5ef2fSHans de Goede enable ? GC0310_START_STREAMING : GC0310_STOP_STREAMING); 4852b2297b1SHans de Goede if (ret) 486b6763b22SHans de Goede goto error_power_down; 487ad85094bSMauro Carvalho Chehab 48865e5ef2fSHans de Goede ret = i2c_smbus_write_byte_data(client, GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_0); 4892b2297b1SHans de Goede if (ret) 490b6763b22SHans de Goede goto error_power_down; 491b6763b22SHans de Goede 492b6763b22SHans de Goede if (!enable) 4932726c899SHans de Goede pm_runtime_put(&client->dev); 494ad85094bSMauro Carvalho Chehab 4952726c899SHans de Goede dev->is_streaming = enable; 496ad85094bSMauro Carvalho Chehab mutex_unlock(&dev->input_lock); 4972b2297b1SHans de Goede return 0; 4982b2297b1SHans de Goede 499b6763b22SHans de Goede error_power_down: 5002726c899SHans de Goede pm_runtime_put(&client->dev); 5012726c899SHans de Goede dev->is_streaming = false; 5022b2297b1SHans de Goede error_unlock: 5032b2297b1SHans de Goede mutex_unlock(&dev->input_lock); 504ad85094bSMauro Carvalho Chehab return ret; 505ad85094bSMauro Carvalho Chehab } 506ad85094bSMauro Carvalho Chehab 507ad85094bSMauro Carvalho Chehab static int gc0310_g_frame_interval(struct v4l2_subdev *sd, 508ad85094bSMauro Carvalho Chehab struct v4l2_subdev_frame_interval *interval) 509ad85094bSMauro Carvalho Chehab { 510ad85094bSMauro Carvalho Chehab interval->interval.numerator = 1; 5119783b96aSHans de Goede interval->interval.denominator = GC0310_FPS; 512ad85094bSMauro Carvalho Chehab 513ad85094bSMauro Carvalho Chehab return 0; 514ad85094bSMauro Carvalho Chehab } 515ad85094bSMauro Carvalho Chehab 516ad85094bSMauro Carvalho Chehab static int gc0310_enum_mbus_code(struct v4l2_subdev *sd, 5170d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 518ad85094bSMauro Carvalho Chehab struct v4l2_subdev_mbus_code_enum *code) 519ad85094bSMauro Carvalho Chehab { 5209783b96aSHans de Goede /* We support only a single format */ 5219783b96aSHans de Goede if (code->index) 522ad85094bSMauro Carvalho Chehab return -EINVAL; 523ad85094bSMauro Carvalho Chehab 524ad85094bSMauro Carvalho Chehab code->code = MEDIA_BUS_FMT_SGRBG8_1X8; 525ad85094bSMauro Carvalho Chehab return 0; 526ad85094bSMauro Carvalho Chehab } 527ad85094bSMauro Carvalho Chehab 528ad85094bSMauro Carvalho Chehab static int gc0310_enum_frame_size(struct v4l2_subdev *sd, 5290d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 530ad85094bSMauro Carvalho Chehab struct v4l2_subdev_frame_size_enum *fse) 531ad85094bSMauro Carvalho Chehab { 5329783b96aSHans de Goede /* We support only a single resolution */ 5339783b96aSHans de Goede if (fse->index) 534ad85094bSMauro Carvalho Chehab return -EINVAL; 535ad85094bSMauro Carvalho Chehab 5369783b96aSHans de Goede fse->min_width = GC0310_NATIVE_WIDTH; 5379783b96aSHans de Goede fse->max_width = GC0310_NATIVE_WIDTH; 5389783b96aSHans de Goede fse->min_height = GC0310_NATIVE_HEIGHT; 5399783b96aSHans de Goede fse->max_height = GC0310_NATIVE_HEIGHT; 540ad85094bSMauro Carvalho Chehab 541ad85094bSMauro Carvalho Chehab return 0; 542ad85094bSMauro Carvalho Chehab } 543ad85094bSMauro Carvalho Chehab 544ad85094bSMauro Carvalho Chehab static int gc0310_g_skip_frames(struct v4l2_subdev *sd, u32 *frames) 545ad85094bSMauro Carvalho Chehab { 5469783b96aSHans de Goede *frames = GC0310_SKIP_FRAMES; 547ad85094bSMauro Carvalho Chehab return 0; 548ad85094bSMauro Carvalho Chehab } 549ad85094bSMauro Carvalho Chehab 550ad85094bSMauro Carvalho Chehab static const struct v4l2_subdev_sensor_ops gc0310_sensor_ops = { 551ad85094bSMauro Carvalho Chehab .g_skip_frames = gc0310_g_skip_frames, 552ad85094bSMauro Carvalho Chehab }; 553ad85094bSMauro Carvalho Chehab 554ad85094bSMauro Carvalho Chehab static const struct v4l2_subdev_video_ops gc0310_video_ops = { 555ad85094bSMauro Carvalho Chehab .s_stream = gc0310_s_stream, 556ad85094bSMauro Carvalho Chehab .g_frame_interval = gc0310_g_frame_interval, 557ad85094bSMauro Carvalho Chehab }; 558ad85094bSMauro Carvalho Chehab 559ad85094bSMauro Carvalho Chehab static const struct v4l2_subdev_pad_ops gc0310_pad_ops = { 560ad85094bSMauro Carvalho Chehab .enum_mbus_code = gc0310_enum_mbus_code, 561ad85094bSMauro Carvalho Chehab .enum_frame_size = gc0310_enum_frame_size, 562ad85094bSMauro Carvalho Chehab .get_fmt = gc0310_get_fmt, 563ad85094bSMauro Carvalho Chehab .set_fmt = gc0310_set_fmt, 564ad85094bSMauro Carvalho Chehab }; 565ad85094bSMauro Carvalho Chehab 566ad85094bSMauro Carvalho Chehab static const struct v4l2_subdev_ops gc0310_ops = { 567ad85094bSMauro Carvalho Chehab .video = &gc0310_video_ops, 568ad85094bSMauro Carvalho Chehab .pad = &gc0310_pad_ops, 569ad85094bSMauro Carvalho Chehab .sensor = &gc0310_sensor_ops, 570ad85094bSMauro Carvalho Chehab }; 571ad85094bSMauro Carvalho Chehab 572ef5fb5d4SHans de Goede static int gc0310_init_controls(struct gc0310_device *dev) 573ef5fb5d4SHans de Goede { 574ef5fb5d4SHans de Goede struct v4l2_ctrl_handler *hdl = &dev->ctrls.handler; 575ef5fb5d4SHans de Goede 576ef5fb5d4SHans de Goede v4l2_ctrl_handler_init(hdl, 2); 577ef5fb5d4SHans de Goede 578ef5fb5d4SHans de Goede /* Use the same lock for controls as for everything else */ 579ef5fb5d4SHans de Goede hdl->lock = &dev->input_lock; 580ef5fb5d4SHans de Goede dev->sd.ctrl_handler = hdl; 581ef5fb5d4SHans de Goede 582ef5fb5d4SHans de Goede dev->ctrls.exposure = 583ef5fb5d4SHans de Goede v4l2_ctrl_new_std(hdl, &ctrl_ops, V4L2_CID_EXPOSURE, 0, 4095, 1, 1023); 584ef5fb5d4SHans de Goede 585ef5fb5d4SHans de Goede /* 32 steps at base gain 1 + 64 half steps at base gain 2 */ 586ef5fb5d4SHans de Goede dev->ctrls.gain = 587ef5fb5d4SHans de Goede v4l2_ctrl_new_std(hdl, &ctrl_ops, V4L2_CID_GAIN, 0, 95, 1, 31); 588ef5fb5d4SHans de Goede 589ef5fb5d4SHans de Goede return hdl->error; 590ef5fb5d4SHans de Goede } 591ef5fb5d4SHans de Goede 592ed5c2f5fSUwe Kleine-König static void gc0310_remove(struct i2c_client *client) 593ad85094bSMauro Carvalho Chehab { 594ad85094bSMauro Carvalho Chehab struct v4l2_subdev *sd = i2c_get_clientdata(client); 595ad85094bSMauro Carvalho Chehab struct gc0310_device *dev = to_gc0310_sensor(sd); 596bdfe0bebSMauro Carvalho Chehab 597ad85094bSMauro Carvalho Chehab dev_dbg(&client->dev, "gc0310_remove...\n"); 598ad85094bSMauro Carvalho Chehab 5992ec5bfe0SHans de Goede atomisp_unregister_subdev(sd); 600ad85094bSMauro Carvalho Chehab v4l2_device_unregister_subdev(sd); 601ad85094bSMauro Carvalho Chehab media_entity_cleanup(&dev->sd.entity); 602ef5fb5d4SHans de Goede v4l2_ctrl_handler_free(&dev->ctrls.handler); 6032746a966SHans de Goede mutex_destroy(&dev->input_lock); 6042726c899SHans de Goede pm_runtime_disable(&client->dev); 605ad85094bSMauro Carvalho Chehab } 606ad85094bSMauro Carvalho Chehab 607ad85094bSMauro Carvalho Chehab static int gc0310_probe(struct i2c_client *client) 608ad85094bSMauro Carvalho Chehab { 609ad85094bSMauro Carvalho Chehab struct gc0310_device *dev; 610ad85094bSMauro Carvalho Chehab int ret; 611c03496b3SMauro Carvalho Chehab 612340b4dd6SHans de Goede dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL); 613ad85094bSMauro Carvalho Chehab if (!dev) 614ad85094bSMauro Carvalho Chehab return -ENOMEM; 615ad85094bSMauro Carvalho Chehab 6162ec5bfe0SHans de Goede ret = v4l2_get_acpi_sensor_info(&client->dev, NULL); 6172ec5bfe0SHans de Goede if (ret) 6182ec5bfe0SHans de Goede return ret; 6192ec5bfe0SHans de Goede 6202ec5bfe0SHans de Goede dev->reset = devm_gpiod_get(&client->dev, "reset", GPIOD_OUT_HIGH); 6212ec5bfe0SHans de Goede if (IS_ERR(dev->reset)) 6222ec5bfe0SHans de Goede return dev_err_probe(&client->dev, PTR_ERR(dev->reset), 6232ec5bfe0SHans de Goede "getting reset GPIO\n"); 6242ec5bfe0SHans de Goede 6252ec5bfe0SHans de Goede dev->powerdown = devm_gpiod_get(&client->dev, "powerdown", GPIOD_OUT_HIGH); 6262ec5bfe0SHans de Goede if (IS_ERR(dev->powerdown)) 6272ec5bfe0SHans de Goede return dev_err_probe(&client->dev, PTR_ERR(dev->powerdown), 6282ec5bfe0SHans de Goede "getting powerdown GPIO\n"); 6292ec5bfe0SHans de Goede 630ad85094bSMauro Carvalho Chehab mutex_init(&dev->input_lock); 631bdfe0bebSMauro Carvalho Chehab v4l2_i2c_subdev_init(&dev->sd, client, &gc0310_ops); 6329783b96aSHans de Goede gc0310_fill_format(&dev->mode.fmt); 633ad85094bSMauro Carvalho Chehab 6342726c899SHans de Goede pm_runtime_set_suspended(&client->dev); 6352726c899SHans de Goede pm_runtime_enable(&client->dev); 6362726c899SHans de Goede pm_runtime_set_autosuspend_delay(&client->dev, 1000); 6372726c899SHans de Goede pm_runtime_use_autosuspend(&client->dev); 6382726c899SHans de Goede 639f5e381ffSHans de Goede ret = gc0310_detect(client); 6402726c899SHans de Goede if (ret) { 6412726c899SHans de Goede gc0310_remove(client); 6422726c899SHans de Goede return ret; 6432726c899SHans de Goede } 644ad85094bSMauro Carvalho Chehab 645ad85094bSMauro Carvalho Chehab dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 646ad85094bSMauro Carvalho Chehab dev->pad.flags = MEDIA_PAD_FL_SOURCE; 647ad85094bSMauro Carvalho Chehab dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 648ef5fb5d4SHans de Goede 649ef5fb5d4SHans de Goede ret = gc0310_init_controls(dev); 650ad85094bSMauro Carvalho Chehab if (ret) { 651ad85094bSMauro Carvalho Chehab gc0310_remove(client); 652ad85094bSMauro Carvalho Chehab return ret; 653ad85094bSMauro Carvalho Chehab } 654ad85094bSMauro Carvalho Chehab 655ad85094bSMauro Carvalho Chehab ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); 6562ec5bfe0SHans de Goede if (ret) { 657ad85094bSMauro Carvalho Chehab gc0310_remove(client); 658ad85094bSMauro Carvalho Chehab return ret; 659ad85094bSMauro Carvalho Chehab } 660ad85094bSMauro Carvalho Chehab 6612ec5bfe0SHans de Goede ret = atomisp_register_sensor_no_gmin(&dev->sd, 1, ATOMISP_INPUT_FORMAT_RAW_8, 6622ec5bfe0SHans de Goede atomisp_bayer_order_grbg); 6632ec5bfe0SHans de Goede if (ret) { 6642ec5bfe0SHans de Goede gc0310_remove(client); 6652ec5bfe0SHans de Goede return ret; 6662ec5bfe0SHans de Goede } 6672ec5bfe0SHans de Goede 6682ec5bfe0SHans de Goede return 0; 6692ec5bfe0SHans de Goede } 6702ec5bfe0SHans de Goede 6712726c899SHans de Goede static int gc0310_suspend(struct device *dev) 6722726c899SHans de Goede { 6732726c899SHans de Goede struct v4l2_subdev *sd = dev_get_drvdata(dev); 6742ec5bfe0SHans de Goede struct gc0310_device *gc0310_dev = to_gc0310_sensor(sd); 6752726c899SHans de Goede 6762ec5bfe0SHans de Goede gpiod_set_value_cansleep(gc0310_dev->powerdown, 1); 6772ec5bfe0SHans de Goede gpiod_set_value_cansleep(gc0310_dev->reset, 1); 6782ec5bfe0SHans de Goede return 0; 6792726c899SHans de Goede } 6802726c899SHans de Goede 6812726c899SHans de Goede static int gc0310_resume(struct device *dev) 6822726c899SHans de Goede { 6832726c899SHans de Goede struct v4l2_subdev *sd = dev_get_drvdata(dev); 6842ec5bfe0SHans de Goede struct gc0310_device *gc0310_dev = to_gc0310_sensor(sd); 6852726c899SHans de Goede 6862ec5bfe0SHans de Goede usleep_range(10000, 15000); 6872ec5bfe0SHans de Goede gpiod_set_value_cansleep(gc0310_dev->reset, 0); 6882ec5bfe0SHans de Goede usleep_range(10000, 15000); 6892ec5bfe0SHans de Goede gpiod_set_value_cansleep(gc0310_dev->powerdown, 0); 6902ec5bfe0SHans de Goede 6912ec5bfe0SHans de Goede return 0; 6922726c899SHans de Goede } 6932726c899SHans de Goede 6942726c899SHans de Goede static DEFINE_RUNTIME_DEV_PM_OPS(gc0310_pm_ops, gc0310_suspend, gc0310_resume, NULL); 6952726c899SHans de Goede 696ad85094bSMauro Carvalho Chehab static const struct acpi_device_id gc0310_acpi_match[] = { 697ad85094bSMauro Carvalho Chehab {"INT0310"}, 698ad85094bSMauro Carvalho Chehab {}, 699ad85094bSMauro Carvalho Chehab }; 700ad85094bSMauro Carvalho Chehab MODULE_DEVICE_TABLE(acpi, gc0310_acpi_match); 701ad85094bSMauro Carvalho Chehab 702ad85094bSMauro Carvalho Chehab static struct i2c_driver gc0310_driver = { 703ad85094bSMauro Carvalho Chehab .driver = { 704ad85094bSMauro Carvalho Chehab .name = "gc0310", 7052726c899SHans de Goede .pm = pm_sleep_ptr(&gc0310_pm_ops), 706ad85094bSMauro Carvalho Chehab .acpi_match_table = gc0310_acpi_match, 707ad85094bSMauro Carvalho Chehab }, 708ad85094bSMauro Carvalho Chehab .probe_new = gc0310_probe, 709ad85094bSMauro Carvalho Chehab .remove = gc0310_remove, 710ad85094bSMauro Carvalho Chehab }; 711ad85094bSMauro Carvalho Chehab module_i2c_driver(gc0310_driver); 712ad85094bSMauro Carvalho Chehab 713ad85094bSMauro Carvalho Chehab MODULE_AUTHOR("Lai, Angie <angie.lai@intel.com>"); 714ad85094bSMauro Carvalho Chehab MODULE_DESCRIPTION("A low-level driver for GalaxyCore GC0310 sensors"); 715ad85094bSMauro Carvalho Chehab MODULE_LICENSE("GPL"); 716