1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * FB driver for the HX8353D LCD Controller
4 *
5 * Copyright (c) 2014 Petr Olivka
6 * Copyright (c) 2013 Noralf Tronnes
7 */
8
9 #include <linux/module.h>
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <video/mipi_display.h>
14
15 #include "fbtft.h"
16
17 #define DRVNAME "fb_hx8353d"
18 #define DEFAULT_GAMMA "50 77 40 08 BF 00 03 0F 00 01 73 00 72 03 B0 0F 08 00 0F"
19
init_display(struct fbtft_par * par)20 static int init_display(struct fbtft_par *par)
21 {
22 par->fbtftops.reset(par);
23 mdelay(150);
24
25 /* SETEXTC */
26 write_reg(par, 0xB9, 0xFF, 0x83, 0x53);
27
28 /* RADJ */
29 write_reg(par, 0xB0, 0x3C, 0x01);
30
31 /* VCOM */
32 write_reg(par, 0xB6, 0x94, 0x6C, 0x50);
33
34 /* PWR */
35 write_reg(par, 0xB1, 0x00, 0x01, 0x1B, 0x03, 0x01, 0x08, 0x77, 0x89);
36
37 /* COLMOD */
38 write_reg(par, 0x3A, 0x05);
39
40 /* MEM ACCESS */
41 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0xC0);
42
43 /* SLPOUT - Sleep out & booster on */
44 write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE);
45 mdelay(150);
46
47 /* DISPON - Display On */
48 write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
49
50 /* RGBSET */
51 write_reg(par, MIPI_DCS_WRITE_LUT,
52 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30,
53 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62,
54 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
55 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
56 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
57 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
58 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30,
59 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62);
60
61 return 0;
62 };
63
set_addr_win(struct fbtft_par * par,int xs,int ys,int xe,int ye)64 static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
65 {
66 /* column address */
67 write_reg(par, 0x2a, xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
68
69 /* Row address */
70 write_reg(par, 0x2b, ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
71
72 /* memory write */
73 write_reg(par, 0x2c);
74 }
75
76 #define my BIT(7)
77 #define mx BIT(6)
78 #define mv BIT(5)
set_var(struct fbtft_par * par)79 static int set_var(struct fbtft_par *par)
80 {
81 /*
82 * madctl - memory data access control
83 * rgb/bgr:
84 * 1. mode selection pin srgb
85 * rgb h/w pin for color filter setting: 0=rgb, 1=bgr
86 * 2. madctl rgb bit
87 * rgb-bgr order color filter panel: 0=rgb, 1=bgr
88 */
89 switch (par->info->var.rotate) {
90 case 0:
91 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
92 mx | my | (par->bgr << 3));
93 break;
94 case 270:
95 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
96 my | mv | (par->bgr << 3));
97 break;
98 case 180:
99 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
100 par->bgr << 3);
101 break;
102 case 90:
103 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
104 mx | mv | (par->bgr << 3));
105 break;
106 }
107
108 return 0;
109 }
110
111 /* gamma string format: */
set_gamma(struct fbtft_par * par,u32 * curves)112 static int set_gamma(struct fbtft_par *par, u32 *curves)
113 {
114 write_reg(par, 0xE0,
115 curves[0], curves[1], curves[2], curves[3],
116 curves[4], curves[5], curves[6], curves[7],
117 curves[8], curves[9], curves[10], curves[11],
118 curves[12], curves[13], curves[14], curves[15],
119 curves[16], curves[17], curves[18]);
120
121 return 0;
122 }
123
124 static struct fbtft_display display = {
125 .regwidth = 8,
126 .width = 128,
127 .height = 160,
128 .gamma_num = 1,
129 .gamma_len = 19,
130 .gamma = DEFAULT_GAMMA,
131 .fbtftops = {
132 .init_display = init_display,
133 .set_addr_win = set_addr_win,
134 .set_var = set_var,
135 .set_gamma = set_gamma,
136 },
137 };
138
139 FBTFT_REGISTER_DRIVER(DRVNAME, "himax,hx8353d", &display);
140
141 MODULE_ALIAS("spi:" DRVNAME);
142 MODULE_ALIAS("platform:" DRVNAME);
143 MODULE_ALIAS("spi:hx8353d");
144 MODULE_ALIAS("platform:hx8353d");
145
146 MODULE_DESCRIPTION("FB driver for the HX8353D LCD Controller");
147 MODULE_AUTHOR("Petr Olivka");
148 MODULE_LICENSE("GPL");
149