1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2022 Richtek Technology Corp.
4  *
5  * Author: ChiYuan Huang <cy_huang@richtek.com>
6  *         ChiaEn Wu <chiaen_wu@richtek.com>
7  */
8 
9 #include <linux/bits.h>
10 #include <linux/bitfield.h>
11 #include <linux/completion.h>
12 #include <linux/delay.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/i2c.h>
15 #include <linux/interrupt.h>
16 #include <linux/kernel.h>
17 #include <linux/kstrtox.h>
18 #include <linux/linear_range.h>
19 #include <linux/module.h>
20 #include <linux/mod_devicetable.h>
21 #include <linux/mutex.h>
22 #include <linux/of.h>
23 #include <linux/power_supply.h>
24 #include <linux/regmap.h>
25 #include <linux/regulator/driver.h>
26 #include <linux/units.h>
27 #include <linux/sysfs.h>
28 
29 #define RT9467_REG_CORE_CTRL0		0x00
30 #define RT9467_REG_CHG_CTRL1		0x01
31 #define RT9467_REG_CHG_CTRL2		0x02
32 #define RT9467_REG_CHG_CTRL3		0x03
33 #define RT9467_REG_CHG_CTRL4		0x04
34 #define RT9467_REG_CHG_CTRL5		0x05
35 #define RT9467_REG_CHG_CTRL6		0x06
36 #define RT9467_REG_CHG_CTRL7		0x07
37 #define RT9467_REG_CHG_CTRL8		0x08
38 #define RT9467_REG_CHG_CTRL9		0x09
39 #define RT9467_REG_CHG_CTRL10		0x0A
40 #define RT9467_REG_CHG_CTRL12		0x0C
41 #define RT9467_REG_CHG_CTRL13		0x0D
42 #define RT9467_REG_CHG_CTRL14		0x0E
43 #define RT9467_REG_CHG_ADC		0x11
44 #define RT9467_REG_CHG_DPDM1		0x12
45 #define RT9467_REG_CHG_DPDM2		0x13
46 #define RT9467_REG_DEVICE_ID		0x40
47 #define RT9467_REG_CHG_STAT		0x42
48 #define RT9467_REG_ADC_DATA_H		0x44
49 #define RT9467_REG_CHG_STATC		0x50
50 #define RT9467_REG_CHG_IRQ1		0x53
51 #define RT9467_REG_CHG_STATC_CTRL	0x60
52 #define RT9467_REG_CHG_IRQ1_CTRL	0x63
53 
54 #define RT9467_MASK_PWR_RDY		BIT(7)
55 #define RT9467_MASK_MIVR_STAT		BIT(6)
56 #define RT9467_MASK_OTG_CSEL		GENMASK(2, 0)
57 #define RT9467_MASK_OTG_VSEL		GENMASK(7, 2)
58 #define RT9467_MASK_OTG_EN		BIT(0)
59 #define RT9467_MASK_ADC_IN_SEL		GENMASK(7, 4)
60 #define RT9467_MASK_ADC_START		BIT(0)
61 
62 #define RT9467_NUM_IRQ_REGS		4
63 #define RT9467_ICHG_MIN_uA		100000
64 #define RT9467_ICHG_MAX_uA		5000000
65 #define RT9467_CV_MAX_uV		4710000
66 #define RT9467_OTG_MIN_uV		4425000
67 #define RT9467_OTG_MAX_uV		5825000
68 #define RT9467_OTG_STEP_uV		25000
69 #define RT9467_NUM_VOTG			(RT9467_OTG_MAX_uV - RT9467_OTG_MIN_uV + 1)
70 #define RT9467_AICLVTH_GAP_uV		200000
71 #define RT9467_ADCCONV_TIME_MS		35
72 
73 #define RT9466_VID			0x8
74 #define RT9467_VID			0x9
75 
76 /* IRQ number */
77 #define RT9467_IRQ_TS_STATC	0
78 #define RT9467_IRQ_CHG_FAULT	1
79 #define RT9467_IRQ_CHG_STATC	2
80 #define RT9467_IRQ_CHG_TMR	3
81 #define RT9467_IRQ_CHG_BATABS	4
82 #define RT9467_IRQ_CHG_ADPBAD	5
83 #define RT9467_IRQ_CHG_RVP	6
84 #define RT9467_IRQ_OTP		7
85 
86 #define RT9467_IRQ_CHG_AICLM	8
87 #define RT9467_IRQ_CHG_ICHGM	9
88 #define RT9467_IRQ_WDTMR	11
89 #define RT9467_IRQ_SSFINISH	12
90 #define RT9467_IRQ_CHG_RECHG	13
91 #define RT9467_IRQ_CHG_TERM	14
92 #define RT9467_IRQ_CHG_IEOC	15
93 
94 #define RT9467_IRQ_ADC_DONE	16
95 #define RT9467_IRQ_PUMPX_DONE	17
96 #define RT9467_IRQ_BST_BATUV	21
97 #define RT9467_IRQ_BST_MIDOV	22
98 #define RT9467_IRQ_BST_OLP	23
99 
100 #define RT9467_IRQ_ATTACH	24
101 #define RT9467_IRQ_DETACH	25
102 #define RT9467_IRQ_HVDCP_DET	29
103 #define RT9467_IRQ_CHGDET	30
104 #define RT9467_IRQ_DCDT		31
105 
106 enum rt9467_fields {
107 	/* RT9467_REG_CORE_CTRL0 */
108 	F_RST = 0,
109 	/* RT9467_REG_CHG_CTRL1 */
110 	F_HZ, F_OTG_PIN_EN, F_OPA_MODE,
111 	/* RT9467_REG_CHG_CTRL2 */
112 	F_SHIP_MODE, F_TE, F_IINLMTSEL, F_CFO_EN, F_CHG_EN,
113 	/* RT9467_REG_CHG_CTRL3 */
114 	F_IAICR, F_ILIM_EN,
115 	/* RT9467_REG_CHG_CTRL4 */
116 	F_VOREG,
117 	/* RT9467_REG_CHG_CTRL6 */
118 	F_VMIVR,
119 	/* RT9467_REG_CHG_CTRL7 */
120 	F_ICHG,
121 	/* RT9467_REG_CHG_CTRL8 */
122 	F_IPREC,
123 	/* RT9467_REG_CHG_CTRL9 */
124 	F_IEOC,
125 	/* RT9467_REG_CHG_CTRL12 */
126 	F_WT_FC,
127 	/* RT9467_REG_CHG_CTRL13 */
128 	F_OCP,
129 	/* RT9467_REG_CHG_CTRL14 */
130 	F_AICL_MEAS, F_AICL_VTH,
131 	/* RT9467_REG_CHG_DPDM1 */
132 	F_USBCHGEN,
133 	/* RT9467_REG_CHG_DPDM2 */
134 	F_USB_STATUS,
135 	/* RT9467_REG_DEVICE_ID */
136 	F_VENDOR,
137 	/* RT9467_REG_CHG_STAT */
138 	F_CHG_STAT,
139 	/* RT9467_REG_CHG_STATC */
140 	F_PWR_RDY, F_CHG_MIVR,
141 	F_MAX_FIELDS
142 };
143 
144 static const struct regmap_irq rt9467_irqs[] = {
145 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_TS_STATC, 8),
146 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_FAULT, 8),
147 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_STATC, 8),
148 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_TMR, 8),
149 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_BATABS, 8),
150 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_ADPBAD, 8),
151 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_RVP, 8),
152 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_OTP, 8),
153 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_AICLM, 8),
154 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_ICHGM, 8),
155 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_WDTMR, 8),
156 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_SSFINISH, 8),
157 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_RECHG, 8),
158 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_TERM, 8),
159 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_IEOC, 8),
160 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_ADC_DONE, 8),
161 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_PUMPX_DONE, 8),
162 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_BST_BATUV, 8),
163 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_BST_MIDOV, 8),
164 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_BST_OLP, 8),
165 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_ATTACH, 8),
166 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_DETACH, 8),
167 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_HVDCP_DET, 8),
168 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHGDET, 8),
169 	REGMAP_IRQ_REG_LINE(RT9467_IRQ_DCDT, 8)
170 };
171 
172 static const struct regmap_irq_chip rt9467_irq_chip = {
173 	.name = "rt9467-irqs",
174 	.status_base = RT9467_REG_CHG_IRQ1,
175 	.mask_base = RT9467_REG_CHG_IRQ1_CTRL,
176 	.num_regs = RT9467_NUM_IRQ_REGS,
177 	.irqs = rt9467_irqs,
178 	.num_irqs = ARRAY_SIZE(rt9467_irqs),
179 };
180 
181 enum rt9467_ranges {
182 	RT9467_RANGE_IAICR = 0,
183 	RT9467_RANGE_VOREG,
184 	RT9467_RANGE_VMIVR,
185 	RT9467_RANGE_ICHG,
186 	RT9467_RANGE_IPREC,
187 	RT9467_RANGE_IEOC,
188 	RT9467_RANGE_AICL_VTH,
189 	RT9467_RANGES_MAX
190 };
191 
192 static const struct linear_range rt9467_ranges[RT9467_RANGES_MAX] = {
193 	LINEAR_RANGE_IDX(RT9467_RANGE_IAICR, 100000, 0x0, 0x3F, 50000),
194 	LINEAR_RANGE_IDX(RT9467_RANGE_VOREG, 3900000, 0x0, 0x51, 10000),
195 	LINEAR_RANGE_IDX(RT9467_RANGE_VMIVR, 3900000, 0x0, 0x5F, 100000),
196 	LINEAR_RANGE_IDX(RT9467_RANGE_ICHG, 900000, 0x08, 0x31, 100000),
197 	LINEAR_RANGE_IDX(RT9467_RANGE_IPREC, 100000, 0x0, 0x0F, 50000),
198 	LINEAR_RANGE_IDX(RT9467_RANGE_IEOC, 100000, 0x0, 0x0F, 50000),
199 	LINEAR_RANGE_IDX(RT9467_RANGE_AICL_VTH, 4100000, 0x0, 0x7, 100000),
200 };
201 
202 static const struct reg_field rt9467_chg_fields[] = {
203 	[F_RST]			= REG_FIELD(RT9467_REG_CORE_CTRL0, 7, 7),
204 	[F_HZ]			= REG_FIELD(RT9467_REG_CHG_CTRL1, 2, 2),
205 	[F_OTG_PIN_EN]		= REG_FIELD(RT9467_REG_CHG_CTRL1, 1, 1),
206 	[F_OPA_MODE]		= REG_FIELD(RT9467_REG_CHG_CTRL1, 0, 0),
207 	[F_SHIP_MODE]		= REG_FIELD(RT9467_REG_CHG_CTRL2, 7, 7),
208 	[F_TE]			= REG_FIELD(RT9467_REG_CHG_CTRL2, 4, 4),
209 	[F_IINLMTSEL]		= REG_FIELD(RT9467_REG_CHG_CTRL2, 2, 3),
210 	[F_CFO_EN]		= REG_FIELD(RT9467_REG_CHG_CTRL2, 1, 1),
211 	[F_CHG_EN]		= REG_FIELD(RT9467_REG_CHG_CTRL2, 0, 0),
212 	[F_IAICR]		= REG_FIELD(RT9467_REG_CHG_CTRL3, 2, 7),
213 	[F_ILIM_EN]		= REG_FIELD(RT9467_REG_CHG_CTRL3, 0, 0),
214 	[F_VOREG]		= REG_FIELD(RT9467_REG_CHG_CTRL4, 1, 7),
215 	[F_VMIVR]		= REG_FIELD(RT9467_REG_CHG_CTRL6, 1, 7),
216 	[F_ICHG]		= REG_FIELD(RT9467_REG_CHG_CTRL7, 2, 7),
217 	[F_IPREC]		= REG_FIELD(RT9467_REG_CHG_CTRL8, 0, 3),
218 	[F_IEOC]		= REG_FIELD(RT9467_REG_CHG_CTRL9, 4, 7),
219 	[F_WT_FC]		= REG_FIELD(RT9467_REG_CHG_CTRL12, 5, 7),
220 	[F_OCP]			= REG_FIELD(RT9467_REG_CHG_CTRL13, 2, 2),
221 	[F_AICL_MEAS]		= REG_FIELD(RT9467_REG_CHG_CTRL14, 7, 7),
222 	[F_AICL_VTH]		= REG_FIELD(RT9467_REG_CHG_CTRL14, 0, 2),
223 	[F_USBCHGEN]		= REG_FIELD(RT9467_REG_CHG_DPDM1, 7, 7),
224 	[F_USB_STATUS]		= REG_FIELD(RT9467_REG_CHG_DPDM2, 0, 2),
225 	[F_VENDOR]		= REG_FIELD(RT9467_REG_DEVICE_ID, 4, 7),
226 	[F_CHG_STAT]		= REG_FIELD(RT9467_REG_CHG_STAT, 6, 7),
227 	[F_PWR_RDY]		= REG_FIELD(RT9467_REG_CHG_STATC, 7, 7),
228 	[F_CHG_MIVR]		= REG_FIELD(RT9467_REG_CHG_STATC, 6, 6),
229 };
230 
231 enum {
232 	RT9467_STAT_READY = 0,
233 	RT9467_STAT_PROGRESS,
234 	RT9467_STAT_CHARGE_DONE,
235 	RT9467_STAT_FAULT
236 };
237 
238 enum rt9467_adc_chan {
239 	RT9467_ADC_VBUS_DIV5 = 0,
240 	RT9467_ADC_VBUS_DIV2,
241 	RT9467_ADC_VSYS,
242 	RT9467_ADC_VBAT,
243 	RT9467_ADC_TS_BAT,
244 	RT9467_ADC_IBUS,
245 	RT9467_ADC_IBAT,
246 	RT9467_ADC_REGN,
247 	RT9467_ADC_TEMP_JC
248 };
249 
250 enum rt9467_chg_type {
251 	RT9467_CHG_TYPE_NOVBUS = 0,
252 	RT9467_CHG_TYPE_UNDER_GOING,
253 	RT9467_CHG_TYPE_SDP,
254 	RT9467_CHG_TYPE_SDPNSTD,
255 	RT9467_CHG_TYPE_DCP,
256 	RT9467_CHG_TYPE_CDP,
257 	RT9467_CHG_TYPE_MAX
258 };
259 
260 enum rt9467_iin_limit_sel {
261 	RT9467_IINLMTSEL_3_2A = 0,
262 	RT9467_IINLMTSEL_CHG_TYP,
263 	RT9467_IINLMTSEL_AICR,
264 	RT9467_IINLMTSEL_LOWER_LEVEL, /* lower of above three */
265 };
266 
267 struct rt9467_chg_data {
268 	struct device *dev;
269 	struct regmap *regmap;
270 	struct regmap_field *rm_field[F_MAX_FIELDS];
271 	struct regmap_irq_chip_data *irq_chip_data;
272 	struct power_supply *psy;
273 	struct mutex adc_lock;
274 	struct mutex attach_lock;
275 	struct mutex ichg_ieoc_lock;
276 	struct regulator_dev *rdev;
277 	struct completion aicl_done;
278 	enum power_supply_usb_type psy_usb_type;
279 	unsigned int old_stat;
280 	unsigned int vid;
281 	int ichg_ua;
282 	int ieoc_ua;
283 };
284 
rt9467_otg_of_parse_cb(struct device_node * of,const struct regulator_desc * desc,struct regulator_config * cfg)285 static int rt9467_otg_of_parse_cb(struct device_node *of,
286 				  const struct regulator_desc *desc,
287 				  struct regulator_config *cfg)
288 {
289 	struct rt9467_chg_data *data = cfg->driver_data;
290 
291 	cfg->ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(of),
292 						"enable", 0, GPIOD_OUT_LOW |
293 						GPIOD_FLAGS_BIT_NONEXCLUSIVE,
294 						desc->name);
295 	if (IS_ERR(cfg->ena_gpiod)) {
296 		cfg->ena_gpiod = NULL;
297 		return 0;
298 	}
299 
300 	return regmap_field_write(data->rm_field[F_OTG_PIN_EN], 1);
301 }
302 
303 static const struct regulator_ops rt9467_otg_regulator_ops = {
304 	.enable = regulator_enable_regmap,
305 	.disable = regulator_disable_regmap,
306 	.is_enabled = regulator_is_enabled_regmap,
307 	.list_voltage = regulator_list_voltage_linear,
308 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
309 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
310 	.set_current_limit = regulator_set_current_limit_regmap,
311 	.get_current_limit = regulator_get_current_limit_regmap,
312 };
313 
314 static const u32 rt9467_otg_microamp[] = {
315 	500000, 700000, 1100000, 1300000, 1800000, 2100000, 2400000, 3000000
316 };
317 
318 static const struct regulator_desc rt9467_otg_desc = {
319 	.name = "rt9476-usb-otg-vbus",
320 	.of_match = "usb-otg-vbus-regulator",
321 	.of_parse_cb = rt9467_otg_of_parse_cb,
322 	.type = REGULATOR_VOLTAGE,
323 	.owner = THIS_MODULE,
324 	.min_uV = RT9467_OTG_MIN_uV,
325 	.uV_step = RT9467_OTG_STEP_uV,
326 	.n_voltages = RT9467_NUM_VOTG,
327 	.curr_table = rt9467_otg_microamp,
328 	.n_current_limits = ARRAY_SIZE(rt9467_otg_microamp),
329 	.csel_reg = RT9467_REG_CHG_CTRL10,
330 	.csel_mask = RT9467_MASK_OTG_CSEL,
331 	.vsel_reg = RT9467_REG_CHG_CTRL5,
332 	.vsel_mask = RT9467_MASK_OTG_VSEL,
333 	.enable_reg = RT9467_REG_CHG_CTRL1,
334 	.enable_mask = RT9467_MASK_OTG_EN,
335 	.ops = &rt9467_otg_regulator_ops,
336 };
337 
rt9467_register_otg_regulator(struct rt9467_chg_data * data)338 static int rt9467_register_otg_regulator(struct rt9467_chg_data *data)
339 {
340 	struct regulator_config cfg = {
341 		.dev = data->dev,
342 		.regmap = data->regmap,
343 		.driver_data = data,
344 	};
345 
346 	data->rdev = devm_regulator_register(data->dev, &rt9467_otg_desc, &cfg);
347 	return PTR_ERR_OR_ZERO(data->rdev);
348 }
349 
rt9467_get_value_from_ranges(struct rt9467_chg_data * data,enum rt9467_fields field,enum rt9467_ranges rsel,int * value)350 static int rt9467_get_value_from_ranges(struct rt9467_chg_data *data,
351 					enum rt9467_fields field,
352 					enum rt9467_ranges rsel,
353 					int *value)
354 {
355 	const struct linear_range *range = rt9467_ranges + rsel;
356 	unsigned int sel;
357 	int ret;
358 
359 	ret = regmap_field_read(data->rm_field[field], &sel);
360 	if (ret)
361 		return ret;
362 
363 	return linear_range_get_value(range, sel, value);
364 }
365 
rt9467_set_value_from_ranges(struct rt9467_chg_data * data,enum rt9467_fields field,enum rt9467_ranges rsel,int value)366 static int rt9467_set_value_from_ranges(struct rt9467_chg_data *data,
367 					enum rt9467_fields field,
368 					enum rt9467_ranges rsel,
369 					int value)
370 {
371 	const struct linear_range *range = rt9467_ranges + rsel;
372 	unsigned int sel;
373 	bool found;
374 	int ret;
375 
376 	if (rsel == RT9467_RANGE_VMIVR) {
377 		ret = linear_range_get_selector_high(range, value, &sel, &found);
378 		if (ret)
379 			value = range->max_sel;
380 	} else {
381 		linear_range_get_selector_within(range, value, &sel);
382 	}
383 
384 	return regmap_field_write(data->rm_field[field], sel);
385 }
386 
rt9467_get_adc_sel(enum rt9467_adc_chan chan,int * sel)387 static int rt9467_get_adc_sel(enum rt9467_adc_chan chan, int *sel)
388 {
389 	switch (chan) {
390 	case RT9467_ADC_VBUS_DIV5:
391 	case RT9467_ADC_VBUS_DIV2:
392 	case RT9467_ADC_VSYS:
393 	case RT9467_ADC_VBAT:
394 		*sel = chan + 1;
395 		return 0;
396 	case RT9467_ADC_TS_BAT:
397 		*sel = chan + 2;
398 		return 0;
399 	case RT9467_ADC_IBUS:
400 	case RT9467_ADC_IBAT:
401 		*sel = chan + 3;
402 		return 0;
403 	case RT9467_ADC_REGN:
404 	case RT9467_ADC_TEMP_JC:
405 		*sel = chan + 4;
406 		return 0;
407 	default:
408 		return -EINVAL;
409 	}
410 }
411 
rt9467_get_adc_raw_data(struct rt9467_chg_data * data,enum rt9467_adc_chan chan,int * val)412 static int rt9467_get_adc_raw_data(struct rt9467_chg_data *data,
413 				   enum rt9467_adc_chan chan, int *val)
414 {
415 	unsigned int adc_stat, reg_val, adc_sel;
416 	__be16 chan_raw_data;
417 	int ret;
418 
419 	mutex_lock(&data->adc_lock);
420 
421 	ret = rt9467_get_adc_sel(chan, &adc_sel);
422 	if (ret)
423 		goto adc_unlock;
424 
425 	ret = regmap_write(data->regmap, RT9467_REG_CHG_ADC, 0);
426 	if (ret) {
427 		dev_err(data->dev, "Failed to clear ADC enable\n");
428 		goto adc_unlock;
429 	}
430 
431 	reg_val = RT9467_MASK_ADC_START | FIELD_PREP(RT9467_MASK_ADC_IN_SEL, adc_sel);
432 	ret = regmap_write(data->regmap, RT9467_REG_CHG_ADC, reg_val);
433 	if (ret)
434 		goto adc_unlock;
435 
436 	/* Minimum wait time for one channel processing */
437 	msleep(RT9467_ADCCONV_TIME_MS);
438 
439 	ret = regmap_read_poll_timeout(data->regmap, RT9467_REG_CHG_ADC,
440 				       adc_stat,
441 				       !(adc_stat & RT9467_MASK_ADC_START),
442 				       MILLI, RT9467_ADCCONV_TIME_MS * MILLI);
443 	if (ret) {
444 		dev_err(data->dev, "Failed to wait ADC conversion, chan = %d\n", chan);
445 		goto adc_unlock;
446 	}
447 
448 	ret = regmap_raw_read(data->regmap, RT9467_REG_ADC_DATA_H,
449 			      &chan_raw_data, sizeof(chan_raw_data));
450 	if (ret)
451 		goto adc_unlock;
452 
453 	*val = be16_to_cpu(chan_raw_data);
454 
455 adc_unlock:
456 	mutex_unlock(&data->adc_lock);
457 	return ret;
458 }
459 
rt9467_get_adc(struct rt9467_chg_data * data,enum rt9467_adc_chan chan,int * val)460 static int rt9467_get_adc(struct rt9467_chg_data *data,
461 			  enum rt9467_adc_chan chan, int *val)
462 {
463 	unsigned int aicr_ua, ichg_ua;
464 	int ret;
465 
466 	ret = rt9467_get_adc_raw_data(data, chan, val);
467 	if (ret)
468 		return ret;
469 
470 	switch (chan) {
471 	case RT9467_ADC_VBUS_DIV5:
472 		*val *= 25000;
473 		return 0;
474 	case RT9467_ADC_VBUS_DIV2:
475 		*val *= 10000;
476 		return 0;
477 	case RT9467_ADC_VBAT:
478 	case RT9467_ADC_VSYS:
479 	case RT9467_ADC_REGN:
480 		*val *= 5000;
481 		return 0;
482 	case RT9467_ADC_TS_BAT:
483 		*val /= 400;
484 		return 0;
485 	case RT9467_ADC_IBUS:
486 		/* UUG MOS turn-on ratio will affect the IBUS adc scale */
487 		ret = rt9467_get_value_from_ranges(data, F_IAICR,
488 						   RT9467_RANGE_IAICR, &aicr_ua);
489 		if (ret)
490 			return ret;
491 
492 		*val *= aicr_ua < 400000 ? 29480 : 50000;
493 		return 0;
494 	case RT9467_ADC_IBAT:
495 		/* PP MOS turn-on ratio will affect the ICHG adc scale */
496 		ret = rt9467_get_value_from_ranges(data, F_ICHG,
497 						   RT9467_RANGE_ICHG, &ichg_ua);
498 		if (ret)
499 			return ret;
500 
501 		*val *= ichg_ua <= 400000 ? 28500 :
502 			ichg_ua <= 800000 ? 31500 : 500000;
503 		return 0;
504 	case RT9467_ADC_TEMP_JC:
505 		*val = ((*val * 2) - 40) * 10;
506 		return 0;
507 	default:
508 		return -EINVAL;
509 	}
510 }
511 
rt9467_psy_get_status(struct rt9467_chg_data * data,int * state)512 static int rt9467_psy_get_status(struct rt9467_chg_data *data, int *state)
513 {
514 	unsigned int status;
515 	int ret;
516 
517 	ret = regmap_field_read(data->rm_field[F_CHG_STAT], &status);
518 	if (ret)
519 		return ret;
520 
521 	switch (status) {
522 	case RT9467_STAT_READY:
523 		*state = POWER_SUPPLY_STATUS_NOT_CHARGING;
524 		return 0;
525 	case RT9467_STAT_PROGRESS:
526 		*state = POWER_SUPPLY_STATUS_CHARGING;
527 		return 0;
528 	case RT9467_STAT_CHARGE_DONE:
529 		*state = POWER_SUPPLY_STATUS_FULL;
530 		return 0;
531 	default:
532 		*state = POWER_SUPPLY_STATUS_UNKNOWN;
533 		return 0;
534 	}
535 }
536 
rt9467_psy_set_ichg(struct rt9467_chg_data * data,int microamp)537 static int rt9467_psy_set_ichg(struct rt9467_chg_data *data, int microamp)
538 {
539 	int ret;
540 
541 	mutex_lock(&data->ichg_ieoc_lock);
542 
543 	if (microamp < 500000) {
544 		dev_err(data->dev, "Minimum value must be 500mA\n");
545 		microamp = 500000;
546 	}
547 
548 	ret = rt9467_set_value_from_ranges(data, F_ICHG, RT9467_RANGE_ICHG, microamp);
549 	if (ret)
550 		goto out;
551 
552 	ret = rt9467_get_value_from_ranges(data, F_ICHG, RT9467_RANGE_ICHG,
553 					   &data->ichg_ua);
554 	if (ret)
555 		goto out;
556 
557 out:
558 	mutex_unlock(&data->ichg_ieoc_lock);
559 	return ret;
560 }
561 
rt9467_run_aicl(struct rt9467_chg_data * data)562 static int rt9467_run_aicl(struct rt9467_chg_data *data)
563 {
564 	unsigned int statc, aicl_vth;
565 	int mivr_vth, aicr_get;
566 	int ret = 0;
567 
568 
569 	ret = regmap_read(data->regmap, RT9467_REG_CHG_STATC, &statc);
570 	if (ret) {
571 		dev_err(data->dev, "Failed to read status\n");
572 		return ret;
573 	}
574 
575 	if (!(statc & RT9467_MASK_PWR_RDY) || !(statc & RT9467_MASK_MIVR_STAT)) {
576 		dev_info(data->dev, "Condition not matched %d\n", statc);
577 		return 0;
578 	}
579 
580 	ret = rt9467_get_value_from_ranges(data, F_VMIVR, RT9467_RANGE_VMIVR,
581 					   &mivr_vth);
582 	if (ret) {
583 		dev_err(data->dev, "Failed to get mivr\n");
584 		return ret;
585 	}
586 
587 	/* AICL_VTH = MIVR_VTH + 200mV */
588 	aicl_vth = mivr_vth + RT9467_AICLVTH_GAP_uV;
589 	ret = rt9467_set_value_from_ranges(data, F_AICL_VTH,
590 					   RT9467_RANGE_AICL_VTH, aicl_vth);
591 
592 	/* Trigger AICL function */
593 	ret = regmap_field_write(data->rm_field[F_AICL_MEAS], 1);
594 	if (ret) {
595 		dev_err(data->dev, "Failed to set aicl measurement\n");
596 		return ret;
597 	}
598 
599 	reinit_completion(&data->aicl_done);
600 	ret = wait_for_completion_timeout(&data->aicl_done, msecs_to_jiffies(3500));
601 	if (ret == 0)
602 		return -ETIMEDOUT;
603 
604 	ret = rt9467_get_value_from_ranges(data, F_IAICR, RT9467_RANGE_IAICR, &aicr_get);
605 	if (ret) {
606 		dev_err(data->dev, "Failed to get aicr\n");
607 		return ret;
608 	}
609 
610 	dev_info(data->dev, "aicr get = %d uA\n", aicr_get);
611 	return 0;
612 }
613 
rt9467_psy_set_ieoc(struct rt9467_chg_data * data,int microamp)614 static int rt9467_psy_set_ieoc(struct rt9467_chg_data *data, int microamp)
615 {
616 	int ret;
617 
618 	mutex_lock(&data->ichg_ieoc_lock);
619 
620 	ret = rt9467_set_value_from_ranges(data, F_IEOC, RT9467_RANGE_IEOC, microamp);
621 	if (ret)
622 		goto out;
623 
624 	ret = rt9467_get_value_from_ranges(data, F_IEOC, RT9467_RANGE_IEOC, &data->ieoc_ua);
625 	if (ret)
626 		goto out;
627 
628 out:
629 	mutex_unlock(&data->ichg_ieoc_lock);
630 	return ret;
631 }
632 
633 static const enum power_supply_usb_type rt9467_chg_usb_types[] = {
634 	POWER_SUPPLY_USB_TYPE_UNKNOWN,
635 	POWER_SUPPLY_USB_TYPE_SDP,
636 	POWER_SUPPLY_USB_TYPE_DCP,
637 	POWER_SUPPLY_USB_TYPE_CDP,
638 };
639 
640 static const enum power_supply_property rt9467_chg_properties[] = {
641 	POWER_SUPPLY_PROP_STATUS,
642 	POWER_SUPPLY_PROP_ONLINE,
643 	POWER_SUPPLY_PROP_CURRENT_MAX,
644 	POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT,
645 	POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX,
646 	POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE,
647 	POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX,
648 	POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT,
649 	POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT,
650 	POWER_SUPPLY_PROP_USB_TYPE,
651 	POWER_SUPPLY_PROP_PRECHARGE_CURRENT,
652 	POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT,
653 };
654 
rt9467_psy_get_property(struct power_supply * psy,enum power_supply_property psp,union power_supply_propval * val)655 static int rt9467_psy_get_property(struct power_supply *psy,
656 				   enum power_supply_property psp,
657 				   union power_supply_propval *val)
658 {
659 	struct rt9467_chg_data *data = power_supply_get_drvdata(psy);
660 
661 	switch (psp) {
662 	case POWER_SUPPLY_PROP_STATUS:
663 		return rt9467_psy_get_status(data, &val->intval);
664 	case POWER_SUPPLY_PROP_ONLINE:
665 		return regmap_field_read(data->rm_field[F_PWR_RDY], &val->intval);
666 	case POWER_SUPPLY_PROP_CURRENT_MAX:
667 		mutex_lock(&data->attach_lock);
668 		if (data->psy_usb_type == POWER_SUPPLY_USB_TYPE_UNKNOWN ||
669 		    data->psy_usb_type == POWER_SUPPLY_USB_TYPE_SDP)
670 			val->intval = 500000;
671 		else
672 			val->intval = 1500000;
673 		mutex_unlock(&data->attach_lock);
674 		return 0;
675 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
676 		mutex_lock(&data->ichg_ieoc_lock);
677 		val->intval = data->ichg_ua;
678 		mutex_unlock(&data->ichg_ieoc_lock);
679 		return 0;
680 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
681 		val->intval = RT9467_ICHG_MAX_uA;
682 		return 0;
683 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
684 		return rt9467_get_value_from_ranges(data, F_VOREG,
685 						    RT9467_RANGE_VOREG,
686 						    &val->intval);
687 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX:
688 		val->intval = RT9467_CV_MAX_uV;
689 		return 0;
690 	case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
691 		return rt9467_get_value_from_ranges(data, F_IAICR,
692 						    RT9467_RANGE_IAICR,
693 						    &val->intval);
694 	case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
695 		return rt9467_get_value_from_ranges(data, F_VMIVR,
696 						    RT9467_RANGE_VMIVR,
697 						    &val->intval);
698 	case POWER_SUPPLY_PROP_USB_TYPE:
699 		mutex_lock(&data->attach_lock);
700 		val->intval = data->psy_usb_type;
701 		mutex_unlock(&data->attach_lock);
702 		return 0;
703 	case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
704 		return rt9467_get_value_from_ranges(data, F_IPREC,
705 						    RT9467_RANGE_IPREC,
706 						    &val->intval);
707 	case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
708 		mutex_lock(&data->ichg_ieoc_lock);
709 		val->intval = data->ieoc_ua;
710 		mutex_unlock(&data->ichg_ieoc_lock);
711 		return 0;
712 	default:
713 		return -ENODATA;
714 	}
715 }
716 
rt9467_psy_set_property(struct power_supply * psy,enum power_supply_property psp,const union power_supply_propval * val)717 static int rt9467_psy_set_property(struct power_supply *psy,
718 				   enum power_supply_property psp,
719 				   const union power_supply_propval *val)
720 {
721 	struct rt9467_chg_data *data = power_supply_get_drvdata(psy);
722 
723 	switch (psp) {
724 	case POWER_SUPPLY_PROP_STATUS:
725 		return regmap_field_write(data->rm_field[F_CHG_EN], val->intval);
726 	case POWER_SUPPLY_PROP_ONLINE:
727 		return regmap_field_write(data->rm_field[F_HZ], val->intval);
728 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
729 		return rt9467_psy_set_ichg(data, val->intval);
730 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
731 		return rt9467_set_value_from_ranges(data, F_VOREG,
732 						    RT9467_RANGE_VOREG, val->intval);
733 	case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
734 		if (val->intval == -1)
735 			return rt9467_run_aicl(data);
736 		else
737 			return rt9467_set_value_from_ranges(data, F_IAICR,
738 							    RT9467_RANGE_IAICR,
739 							    val->intval);
740 	case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
741 		return rt9467_set_value_from_ranges(data, F_VMIVR,
742 						    RT9467_RANGE_VMIVR, val->intval);
743 	case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
744 		return rt9467_set_value_from_ranges(data, F_IPREC,
745 						    RT9467_RANGE_IPREC, val->intval);
746 	case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
747 		return rt9467_psy_set_ieoc(data, val->intval);
748 	case POWER_SUPPLY_PROP_USB_TYPE:
749 		return regmap_field_write(data->rm_field[F_USBCHGEN], val->intval);
750 	default:
751 		return -EINVAL;
752 	}
753 }
754 
rt9467_chg_prop_is_writeable(struct power_supply * psy,enum power_supply_property psp)755 static int rt9467_chg_prop_is_writeable(struct power_supply *psy,
756 					enum power_supply_property psp)
757 {
758 	switch (psp) {
759 	case POWER_SUPPLY_PROP_STATUS:
760 	case POWER_SUPPLY_PROP_ONLINE:
761 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT:
762 	case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE:
763 	case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT:
764 	case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
765 	case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
766 	case POWER_SUPPLY_PROP_PRECHARGE_CURRENT:
767 	case POWER_SUPPLY_PROP_USB_TYPE:
768 		return 1;
769 	default:
770 		return 0;
771 	}
772 }
773 
774 static const struct power_supply_desc rt9467_chg_psy_desc = {
775 	.name = "rt9467-charger",
776 	.type = POWER_SUPPLY_TYPE_USB,
777 	.usb_types = rt9467_chg_usb_types,
778 	.num_usb_types = ARRAY_SIZE(rt9467_chg_usb_types),
779 	.properties = rt9467_chg_properties,
780 	.num_properties = ARRAY_SIZE(rt9467_chg_properties),
781 	.property_is_writeable = rt9467_chg_prop_is_writeable,
782 	.get_property = rt9467_psy_get_property,
783 	.set_property = rt9467_psy_set_property,
784 };
785 
psy_device_to_chip(struct device * dev)786 static inline struct rt9467_chg_data *psy_device_to_chip(struct device *dev)
787 {
788 	return power_supply_get_drvdata(to_power_supply(dev));
789 }
790 
sysoff_enable_show(struct device * dev,struct device_attribute * attr,char * buf)791 static ssize_t sysoff_enable_show(struct device *dev,
792 				  struct device_attribute *attr, char *buf)
793 {
794 	struct rt9467_chg_data *data = psy_device_to_chip(dev);
795 	unsigned int sysoff_enable;
796 	int ret;
797 
798 	ret = regmap_field_read(data->rm_field[F_SHIP_MODE], &sysoff_enable);
799 	if (ret)
800 		return ret;
801 
802 	return sysfs_emit(buf, "%d\n", sysoff_enable);
803 }
804 
sysoff_enable_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)805 static ssize_t sysoff_enable_store(struct device *dev,
806 				   struct device_attribute *attr,
807 				   const char *buf, size_t count)
808 {
809 	struct rt9467_chg_data *data = psy_device_to_chip(dev);
810 	unsigned int tmp;
811 	int ret;
812 
813 	ret = kstrtouint(buf, 10, &tmp);
814 	if (ret)
815 		return ret;
816 
817 	ret = regmap_field_write(data->rm_field[F_SHIP_MODE], !!tmp);
818 	if (ret)
819 		return ret;
820 
821 	return count;
822 }
823 
824 static DEVICE_ATTR_RW(sysoff_enable);
825 
826 static struct attribute *rt9467_sysfs_attrs[] = {
827 	&dev_attr_sysoff_enable.attr,
828 	NULL
829 };
830 
831 ATTRIBUTE_GROUPS(rt9467_sysfs);
832 
rt9467_register_psy(struct rt9467_chg_data * data)833 static int rt9467_register_psy(struct rt9467_chg_data *data)
834 {
835 	struct power_supply_config cfg = {
836 		.drv_data = data,
837 		.of_node = dev_of_node(data->dev),
838 		.attr_grp = rt9467_sysfs_groups,
839 	};
840 
841 	data->psy = devm_power_supply_register(data->dev, &rt9467_chg_psy_desc,
842 					       &cfg);
843 	return PTR_ERR_OR_ZERO(data->psy);
844 }
845 
rt9467_mivr_handler(struct rt9467_chg_data * data)846 static int rt9467_mivr_handler(struct rt9467_chg_data *data)
847 {
848 	unsigned int mivr_act;
849 	int ret, ibus_ma;
850 
851 	/*
852 	 * back-boost workaround
853 	 * If (mivr_active & ibus < 100mA), toggle cfo bit
854 	 */
855 	ret = regmap_field_read(data->rm_field[F_CHG_MIVR], &mivr_act);
856 	if (ret) {
857 		dev_err(data->dev, "Failed to read MIVR stat\n");
858 		return ret;
859 	}
860 
861 	if (!mivr_act)
862 		return 0;
863 
864 	ret = rt9467_get_adc(data, RT9467_ADC_IBUS, &ibus_ma);
865 	if (ret) {
866 		dev_err(data->dev, "Failed to get IBUS\n");
867 		return ret;
868 	}
869 
870 	if (ibus_ma < 100000) {
871 		ret = regmap_field_write(data->rm_field[F_CFO_EN], 0);
872 		ret |= regmap_field_write(data->rm_field[F_CFO_EN], 1);
873 		if (ret)
874 			dev_err(data->dev, "Failed to toggle cfo\n");
875 	}
876 
877 	return ret;
878 }
879 
rt9467_statc_handler(int irq,void * priv)880 static irqreturn_t rt9467_statc_handler(int irq, void *priv)
881 {
882 	struct rt9467_chg_data *data = priv;
883 	unsigned int new_stat, evts = 0;
884 	int ret;
885 
886 	ret = regmap_read(data->regmap, RT9467_REG_CHG_STATC, &new_stat);
887 	if (ret) {
888 		dev_err(data->dev, "Failed to read chg_statc\n");
889 		return IRQ_NONE;
890 	}
891 
892 	evts = data->old_stat ^ new_stat;
893 	data->old_stat = new_stat;
894 
895 	if ((evts & new_stat) & RT9467_MASK_MIVR_STAT) {
896 		ret = rt9467_mivr_handler(data);
897 		if (ret)
898 			dev_err(data->dev, "Failed to handle mivr stat\n");
899 	}
900 
901 	return IRQ_HANDLED;
902 }
903 
rt9467_wdt_handler(int irq,void * priv)904 static irqreturn_t rt9467_wdt_handler(int irq, void *priv)
905 {
906 	struct rt9467_chg_data *data = priv;
907 	unsigned int dev_id;
908 	int ret;
909 
910 	/* Any i2c communication can kick watchdog timer */
911 	ret = regmap_read(data->regmap, RT9467_REG_DEVICE_ID, &dev_id);
912 	if (ret) {
913 		dev_err(data->dev, "Failed to kick wdt (%d)\n", ret);
914 		return IRQ_NONE;
915 	}
916 
917 	return IRQ_HANDLED;
918 }
919 
rt9467_report_usb_state(struct rt9467_chg_data * data)920 static int rt9467_report_usb_state(struct rt9467_chg_data *data)
921 {
922 	unsigned int usb_stat, power_ready;
923 	bool psy_changed = true;
924 	int ret;
925 
926 	ret = regmap_field_read(data->rm_field[F_USB_STATUS], &usb_stat);
927 	ret |= regmap_field_read(data->rm_field[F_PWR_RDY], &power_ready);
928 	if (ret)
929 		return ret;
930 
931 	if (!power_ready)
932 		usb_stat = RT9467_CHG_TYPE_NOVBUS;
933 
934 	mutex_lock(&data->attach_lock);
935 
936 	switch (usb_stat) {
937 	case RT9467_CHG_TYPE_NOVBUS:
938 		data->psy_usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN;
939 		break;
940 	case RT9467_CHG_TYPE_SDP:
941 		data->psy_usb_type = POWER_SUPPLY_USB_TYPE_SDP;
942 		break;
943 	case RT9467_CHG_TYPE_SDPNSTD:
944 		data->psy_usb_type = POWER_SUPPLY_USB_TYPE_DCP;
945 		break;
946 	case RT9467_CHG_TYPE_DCP:
947 		data->psy_usb_type = POWER_SUPPLY_USB_TYPE_DCP;
948 		break;
949 	case RT9467_CHG_TYPE_CDP:
950 		data->psy_usb_type = POWER_SUPPLY_USB_TYPE_CDP;
951 		break;
952 	case RT9467_CHG_TYPE_UNDER_GOING:
953 	default:
954 		psy_changed = false;
955 		break;
956 	}
957 
958 	mutex_unlock(&data->attach_lock);
959 
960 	if (psy_changed)
961 		power_supply_changed(data->psy);
962 
963 	return 0;
964 }
965 
rt9467_usb_state_handler(int irq,void * priv)966 static irqreturn_t rt9467_usb_state_handler(int irq, void *priv)
967 {
968 	struct rt9467_chg_data *data = priv;
969 	int ret;
970 
971 	ret = rt9467_report_usb_state(data);
972 	if (ret) {
973 		dev_err(data->dev, "Failed to report attach type (%d)\n", ret);
974 		return IRQ_NONE;
975 	}
976 
977 	return IRQ_HANDLED;
978 }
979 
rt9467_aiclmeas_handler(int irq,void * priv)980 static irqreturn_t rt9467_aiclmeas_handler(int irq, void *priv)
981 {
982 	struct rt9467_chg_data *data = priv;
983 
984 	complete(&data->aicl_done);
985 	return IRQ_HANDLED;
986 }
987 
988 #define RT9467_IRQ_DESC(_name, _handler_func, _hwirq)		\
989 {								\
990 	.name = #_name,						\
991 	.handler = rt9467_##_handler_func##_handler,		\
992 	.hwirq = _hwirq,					\
993 }
994 
rt9467_request_interrupt(struct rt9467_chg_data * data)995 static int rt9467_request_interrupt(struct rt9467_chg_data *data)
996 {
997 	struct device *dev = data->dev;
998 	static const struct {
999 		const char *name;
1000 		int hwirq;
1001 		irq_handler_t handler;
1002 	} rt9467_exclusive_irqs[] = {
1003 		RT9467_IRQ_DESC(statc, statc, RT9467_IRQ_TS_STATC),
1004 		RT9467_IRQ_DESC(wdt, wdt, RT9467_IRQ_WDTMR),
1005 		RT9467_IRQ_DESC(attach, usb_state, RT9467_IRQ_ATTACH),
1006 		RT9467_IRQ_DESC(detach,	usb_state, RT9467_IRQ_DETACH),
1007 		RT9467_IRQ_DESC(aiclmeas, aiclmeas, RT9467_IRQ_CHG_AICLM),
1008 	}, rt9466_exclusive_irqs[] = {
1009 		RT9467_IRQ_DESC(statc, statc, RT9467_IRQ_TS_STATC),
1010 		RT9467_IRQ_DESC(wdt, wdt, RT9467_IRQ_WDTMR),
1011 		RT9467_IRQ_DESC(aiclmeas, aiclmeas, RT9467_IRQ_CHG_AICLM),
1012 	}, *chg_irqs;
1013 	int num_chg_irqs, i, virq, ret;
1014 
1015 	if (data->vid == RT9466_VID) {
1016 		chg_irqs = rt9466_exclusive_irqs;
1017 		num_chg_irqs = ARRAY_SIZE(rt9466_exclusive_irqs);
1018 	} else {
1019 		chg_irqs = rt9467_exclusive_irqs;
1020 		num_chg_irqs = ARRAY_SIZE(rt9467_exclusive_irqs);
1021 	}
1022 
1023 	for (i = 0; i < num_chg_irqs; i++) {
1024 		virq = regmap_irq_get_virq(data->irq_chip_data, chg_irqs[i].hwirq);
1025 		if (virq <= 0)
1026 			return dev_err_probe(dev, -EINVAL, "Failed to get (%s) irq\n",
1027 					     chg_irqs[i].name);
1028 
1029 		ret = devm_request_threaded_irq(dev, virq, NULL, chg_irqs[i].handler,
1030 						IRQF_ONESHOT, chg_irqs[i].name, data);
1031 		if (ret)
1032 			return dev_err_probe(dev, ret, "Failed to request (%s) irq\n",
1033 					     chg_irqs[i].name);
1034 	}
1035 
1036 	return 0;
1037 }
1038 
rt9467_do_charger_init(struct rt9467_chg_data * data)1039 static int rt9467_do_charger_init(struct rt9467_chg_data *data)
1040 {
1041 	struct device *dev = data->dev;
1042 	int ret;
1043 
1044 	ret = regmap_write(data->regmap, RT9467_REG_CHG_ADC, 0);
1045 	if (ret)
1046 		return dev_err_probe(dev, ret, "Failed to reset ADC\n");
1047 
1048 	ret = rt9467_get_value_from_ranges(data, F_ICHG, RT9467_RANGE_ICHG,
1049 					   &data->ichg_ua);
1050 	ret |= rt9467_get_value_from_ranges(data, F_IEOC, RT9467_RANGE_IEOC,
1051 					    &data->ieoc_ua);
1052 	if (ret)
1053 		return dev_err_probe(dev, ret, "Failed to init ichg/ieoc value\n");
1054 
1055 	ret = regmap_update_bits(data->regmap, RT9467_REG_CHG_STATC_CTRL,
1056 				 RT9467_MASK_PWR_RDY | RT9467_MASK_MIVR_STAT, 0);
1057 	if (ret)
1058 		return dev_err_probe(dev, ret, "Failed to make statc unmask\n");
1059 
1060 	/* Select IINLMTSEL to use AICR */
1061 	ret = regmap_field_write(data->rm_field[F_IINLMTSEL],
1062 				 RT9467_IINLMTSEL_AICR);
1063 	if (ret)
1064 		return dev_err_probe(dev, ret, "Failed to set iinlmtsel to AICR\n");
1065 
1066 	/* Wait for AICR Rampping */
1067 	msleep(150);
1068 
1069 	/* Disable hardware ILIM */
1070 	ret = regmap_field_write(data->rm_field[F_ILIM_EN], 0);
1071 	if (ret)
1072 		return dev_err_probe(dev, ret, "Failed to disable hardware ILIM\n");
1073 
1074 	/* Set inductor OCP to high level */
1075 	ret = regmap_field_write(data->rm_field[F_OCP], 1);
1076 	if (ret)
1077 		return dev_err_probe(dev, ret, "Failed to set higher inductor OCP level\n");
1078 
1079 	/* Set charge termination default enable */
1080 	ret = regmap_field_write(data->rm_field[F_TE], 1);
1081 	if (ret)
1082 		return dev_err_probe(dev, ret, "Failed to set TE=1\n");
1083 
1084 	/* Set 12hrs fast charger timer */
1085 	ret = regmap_field_write(data->rm_field[F_WT_FC], 4);
1086 	if (ret)
1087 		return dev_err_probe(dev, ret, "Failed to set WT_FC\n");
1088 
1089 	/* Toggle BC12 function */
1090 	ret = regmap_field_write(data->rm_field[F_USBCHGEN], 0);
1091 	if (ret)
1092 		return dev_err_probe(dev, ret, "Failed to disable BC12\n");
1093 
1094 	return regmap_field_write(data->rm_field[F_USBCHGEN], 1);
1095 }
1096 
rt9467_is_accessible_reg(struct device * dev,unsigned int reg)1097 static bool rt9467_is_accessible_reg(struct device *dev, unsigned int reg)
1098 {
1099 	switch (reg) {
1100 	case 0x00 ... 0x1A:
1101 	case 0x20 ... 0x38:
1102 	case 0x40 ... 0x49:
1103 	case 0x50 ... 0x57:
1104 	case 0x60 ... 0x67:
1105 	case 0x70 ... 0x79:
1106 	case 0x82 ... 0x85:
1107 		return true;
1108 	default:
1109 		return false;
1110 	}
1111 }
1112 
1113 static const struct regmap_config rt9467_regmap_config = {
1114 	.reg_bits = 8,
1115 	.val_bits = 8,
1116 	.max_register = 0x85,
1117 	.writeable_reg = rt9467_is_accessible_reg,
1118 	.readable_reg = rt9467_is_accessible_reg,
1119 };
1120 
rt9467_check_vendor_info(struct rt9467_chg_data * data)1121 static int rt9467_check_vendor_info(struct rt9467_chg_data *data)
1122 {
1123 	unsigned int vid;
1124 	int ret;
1125 
1126 	ret = regmap_field_read(data->rm_field[F_VENDOR], &vid);
1127 	if (ret) {
1128 		dev_err(data->dev, "Failed to get vid\n");
1129 		return ret;
1130 	}
1131 
1132 	if ((vid != RT9466_VID) && (vid != RT9467_VID))
1133 		return dev_err_probe(data->dev, -ENODEV,
1134 				     "VID not correct [0x%02X]\n", vid);
1135 
1136 	data->vid = vid;
1137 	return 0;
1138 }
1139 
rt9467_reset_chip(struct rt9467_chg_data * data)1140 static int rt9467_reset_chip(struct rt9467_chg_data *data)
1141 {
1142 	int ret;
1143 
1144 	/* Disable HZ before reset chip */
1145 	ret = regmap_field_write(data->rm_field[F_HZ], 0);
1146 	if (ret)
1147 		return ret;
1148 
1149 	return regmap_field_write(data->rm_field[F_RST], 1);
1150 }
1151 
rt9467_chg_destroy_adc_lock(void * data)1152 static void rt9467_chg_destroy_adc_lock(void *data)
1153 {
1154 	struct mutex *adc_lock = data;
1155 
1156 	mutex_destroy(adc_lock);
1157 }
1158 
rt9467_chg_destroy_attach_lock(void * data)1159 static void rt9467_chg_destroy_attach_lock(void *data)
1160 {
1161 	struct mutex *attach_lock = data;
1162 
1163 	mutex_destroy(attach_lock);
1164 }
1165 
rt9467_chg_destroy_ichg_ieoc_lock(void * data)1166 static void rt9467_chg_destroy_ichg_ieoc_lock(void *data)
1167 {
1168 	struct mutex *ichg_ieoc_lock = data;
1169 
1170 	mutex_destroy(ichg_ieoc_lock);
1171 }
1172 
rt9467_chg_complete_aicl_done(void * data)1173 static void rt9467_chg_complete_aicl_done(void *data)
1174 {
1175 	struct completion *aicl_done = data;
1176 
1177 	complete(aicl_done);
1178 }
1179 
rt9467_charger_probe(struct i2c_client * i2c)1180 static int rt9467_charger_probe(struct i2c_client *i2c)
1181 {
1182 	struct device *dev = &i2c->dev;
1183 	struct rt9467_chg_data *data;
1184 	struct gpio_desc *ceb_gpio;
1185 	int ret;
1186 
1187 	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
1188 	if (!data)
1189 		return -ENOMEM;
1190 
1191 	data->dev = &i2c->dev;
1192 	i2c_set_clientdata(i2c, data);
1193 
1194 	/* Default pull charge enable gpio to make 'CHG_EN' by SW control only */
1195 	ceb_gpio = devm_gpiod_get_optional(dev, "charge-enable", GPIOD_OUT_HIGH);
1196 	if (IS_ERR(ceb_gpio))
1197 		return dev_err_probe(dev, PTR_ERR(ceb_gpio),
1198 				     "Failed to config charge enable gpio\n");
1199 
1200 	data->regmap = devm_regmap_init_i2c(i2c, &rt9467_regmap_config);
1201 	if (IS_ERR(data->regmap))
1202 		return dev_err_probe(dev, PTR_ERR(data->regmap),
1203 				     "Failed to init regmap\n");
1204 
1205 	ret = devm_regmap_field_bulk_alloc(dev, data->regmap,
1206 					   data->rm_field, rt9467_chg_fields,
1207 					   ARRAY_SIZE(rt9467_chg_fields));
1208 	if (ret)
1209 		return dev_err_probe(dev, ret, "Failed to alloc regmap fields\n");
1210 
1211 	ret = rt9467_check_vendor_info(data);
1212 	if (ret)
1213 		return dev_err_probe(dev, ret, "Failed to check vendor info");
1214 
1215 	ret = rt9467_reset_chip(data);
1216 	if (ret)
1217 		return dev_err_probe(dev, ret, "Failed to reset chip\n");
1218 
1219 	ret = devm_regmap_add_irq_chip(dev, data->regmap, i2c->irq,
1220 				       IRQF_TRIGGER_LOW | IRQF_ONESHOT, 0,
1221 				       &rt9467_irq_chip, &data->irq_chip_data);
1222 	if (ret)
1223 		return dev_err_probe(dev, ret, "Failed to add irq chip\n");
1224 
1225 	mutex_init(&data->adc_lock);
1226 	ret = devm_add_action_or_reset(dev, rt9467_chg_destroy_adc_lock,
1227 				       &data->adc_lock);
1228 	if (ret)
1229 		return dev_err_probe(dev, ret, "Failed to init ADC lock\n");
1230 
1231 	mutex_init(&data->attach_lock);
1232 	ret = devm_add_action_or_reset(dev, rt9467_chg_destroy_attach_lock,
1233 				       &data->attach_lock);
1234 	if (ret)
1235 		return dev_err_probe(dev, ret, "Failed to init attach lock\n");
1236 
1237 	mutex_init(&data->ichg_ieoc_lock);
1238 	ret = devm_add_action_or_reset(dev, rt9467_chg_destroy_ichg_ieoc_lock,
1239 				       &data->ichg_ieoc_lock);
1240 	if (ret)
1241 		return dev_err_probe(dev, ret, "Failed to init ICHG/IEOC lock\n");
1242 
1243 	init_completion(&data->aicl_done);
1244 	ret = devm_add_action_or_reset(dev, rt9467_chg_complete_aicl_done,
1245 				       &data->aicl_done);
1246 	if (ret)
1247 		return dev_err_probe(dev, ret, "Failed to init AICL done completion\n");
1248 
1249 	ret = rt9467_do_charger_init(data);
1250 	if (ret)
1251 		return ret;
1252 
1253 	ret = rt9467_register_otg_regulator(data);
1254 	if (ret)
1255 		return ret;
1256 
1257 	ret = rt9467_register_psy(data);
1258 	if (ret)
1259 		return ret;
1260 
1261 	return rt9467_request_interrupt(data);
1262 }
1263 
1264 static const struct of_device_id rt9467_charger_of_match_table[] = {
1265 	{ .compatible = "richtek,rt9467", },
1266 	{}
1267 };
1268 MODULE_DEVICE_TABLE(of, rt9467_charger_of_match_table);
1269 
1270 static struct i2c_driver rt9467_charger_driver = {
1271 	.driver = {
1272 		.name = "rt9467-charger",
1273 		.of_match_table = rt9467_charger_of_match_table,
1274 	},
1275 	.probe = rt9467_charger_probe,
1276 };
1277 module_i2c_driver(rt9467_charger_driver);
1278 
1279 MODULE_DESCRIPTION("Richtek RT9467 Charger Driver");
1280 MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
1281 MODULE_AUTHOR("ChiaEn Wu <chiaen_wu@richtek.com>");
1282 MODULE_LICENSE("GPL");
1283