1 // SPDX-License-Identifier: GPL-2.0
2 // LPC variant I/O for Microchip EC
3 //
4 // Copyright (C) 2016 Google, Inc
5 
6 #include <linux/delay.h>
7 #include <linux/io.h>
8 #include <linux/mutex.h>
9 #include <linux/types.h>
10 
11 #include "cros_ec_lpc_mec.h"
12 
13 /*
14  * This mutex must be held while accessing the EMI unit. We can't rely on the
15  * EC mutex because memmap data may be accessed without it being held.
16  */
17 static DEFINE_MUTEX(io_mutex);
18 static u16 mec_emi_base, mec_emi_end;
19 
20 /**
21  * cros_ec_lpc_mec_emi_write_address() - Initialize EMI at a given address.
22  *
23  * @addr: Starting read / write address
24  * @access_type: Type of access, typically 32-bit auto-increment
25  */
cros_ec_lpc_mec_emi_write_address(u16 addr,enum cros_ec_lpc_mec_emi_access_mode access_type)26 static void cros_ec_lpc_mec_emi_write_address(u16 addr,
27 			enum cros_ec_lpc_mec_emi_access_mode access_type)
28 {
29 	outb((addr & 0xfc) | access_type, MEC_EMI_EC_ADDRESS_B0(mec_emi_base));
30 	outb((addr >> 8) & 0x7f, MEC_EMI_EC_ADDRESS_B1(mec_emi_base));
31 }
32 
33 /**
34  * cros_ec_lpc_mec_in_range() - Determine if addresses are in MEC EMI range.
35  *
36  * @offset: Address offset
37  * @length: Number of bytes to check
38  *
39  * Return: 1 if in range, 0 if not, and -EINVAL on failure
40  *         such as the mec range not being initialized
41  */
cros_ec_lpc_mec_in_range(unsigned int offset,unsigned int length)42 int cros_ec_lpc_mec_in_range(unsigned int offset, unsigned int length)
43 {
44 	if (length == 0)
45 		return -EINVAL;
46 
47 	if (WARN_ON(mec_emi_base == 0 || mec_emi_end == 0))
48 		return -EINVAL;
49 
50 	if (offset >= mec_emi_base && offset < mec_emi_end) {
51 		if (WARN_ON(offset + length - 1 >= mec_emi_end))
52 			return -EINVAL;
53 		return 1;
54 	}
55 
56 	if (WARN_ON(offset + length > mec_emi_base && offset < mec_emi_end))
57 		return -EINVAL;
58 
59 	return 0;
60 }
61 
62 /**
63  * cros_ec_lpc_io_bytes_mec() - Read / write bytes to MEC EMI port.
64  *
65  * @io_type: MEC_IO_READ or MEC_IO_WRITE, depending on request
66  * @offset:  Base read / write address
67  * @length:  Number of bytes to read / write
68  * @buf:     Destination / source buffer
69  *
70  * Return: 8-bit checksum of all bytes read / written
71  */
cros_ec_lpc_io_bytes_mec(enum cros_ec_lpc_mec_io_type io_type,unsigned int offset,unsigned int length,u8 * buf)72 u8 cros_ec_lpc_io_bytes_mec(enum cros_ec_lpc_mec_io_type io_type,
73 			    unsigned int offset, unsigned int length,
74 			    u8 *buf)
75 {
76 	int i = 0;
77 	int io_addr;
78 	u8 sum = 0;
79 	enum cros_ec_lpc_mec_emi_access_mode access, new_access;
80 
81 	/* Return checksum of 0 if window is not initialized */
82 	WARN_ON(mec_emi_base == 0 || mec_emi_end == 0);
83 	if (mec_emi_base == 0 || mec_emi_end == 0)
84 		return 0;
85 
86 	/*
87 	 * Long access cannot be used on misaligned data since reading B0 loads
88 	 * the data register and writing B3 flushes.
89 	 */
90 	if (offset & 0x3 || length < 4)
91 		access = ACCESS_TYPE_BYTE;
92 	else
93 		access = ACCESS_TYPE_LONG_AUTO_INCREMENT;
94 
95 	mutex_lock(&io_mutex);
96 
97 	/* Initialize I/O at desired address */
98 	cros_ec_lpc_mec_emi_write_address(offset, access);
99 
100 	/* Skip bytes in case of misaligned offset */
101 	io_addr = MEC_EMI_EC_DATA_B0(mec_emi_base) + (offset & 0x3);
102 	while (i < length) {
103 		while (io_addr <= MEC_EMI_EC_DATA_B3(mec_emi_base)) {
104 			if (io_type == MEC_IO_READ)
105 				buf[i] = inb(io_addr++);
106 			else
107 				outb(buf[i], io_addr++);
108 
109 			sum += buf[i++];
110 			offset++;
111 
112 			/* Extra bounds check in case of misaligned length */
113 			if (i == length)
114 				goto done;
115 		}
116 
117 		/*
118 		 * Use long auto-increment access except for misaligned write,
119 		 * since writing B3 triggers the flush.
120 		 */
121 		if (length - i < 4 && io_type == MEC_IO_WRITE)
122 			new_access = ACCESS_TYPE_BYTE;
123 		else
124 			new_access = ACCESS_TYPE_LONG_AUTO_INCREMENT;
125 
126 		if (new_access != access ||
127 		    access != ACCESS_TYPE_LONG_AUTO_INCREMENT) {
128 			access = new_access;
129 			cros_ec_lpc_mec_emi_write_address(offset, access);
130 		}
131 
132 		/* Access [B0, B3] on each loop pass */
133 		io_addr = MEC_EMI_EC_DATA_B0(mec_emi_base);
134 	}
135 
136 done:
137 	mutex_unlock(&io_mutex);
138 
139 	return sum;
140 }
141 EXPORT_SYMBOL(cros_ec_lpc_io_bytes_mec);
142 
cros_ec_lpc_mec_init(unsigned int base,unsigned int end)143 void cros_ec_lpc_mec_init(unsigned int base, unsigned int end)
144 {
145 	mec_emi_base = base;
146 	mec_emi_end = end;
147 }
148 EXPORT_SYMBOL(cros_ec_lpc_mec_init);
149