xref: /openbmc/linux/drivers/pci/pcie/Kconfig (revision b35565bb) 
1#
2# PCI Express Port Bus Configuration
3#
4config PCIEPORTBUS
5	bool "PCI Express Port Bus support"
6	depends on PCI
7	help
8	  This automatically enables PCI Express Port Bus support. Users can
9	  choose Native Hot-Plug support, Advanced Error Reporting support,
10	  Power Management Event support and Virtual Channel support to run
11	  on PCI Express Ports (Root or Switch).
12
13#
14# Include service Kconfig here
15#
16config HOTPLUG_PCI_PCIE
17	bool "PCI Express Hotplug driver"
18	depends on HOTPLUG_PCI && PCIEPORTBUS
19	help
20	  Say Y here if you have a motherboard that supports PCI Express Native
21	  Hotplug
22
23	  When in doubt, say N.
24
25source "drivers/pci/pcie/aer/Kconfig"
26
27#
28# PCI Express ASPM
29#
30config PCIEASPM
31	bool "PCI Express ASPM control" if EXPERT
32	depends on PCI && PCIEPORTBUS
33	default y
34	help
35	  This enables OS control over PCI Express ASPM (Active State
36	  Power Management) and Clock Power Management. ASPM supports
37	  state L0/L0s/L1.
38
39	  ASPM is initially set up by the firmware. With this option enabled,
40	  Linux can modify this state in order to disable ASPM on known-bad
41	  hardware or configurations and enable it when known-safe.
42
43	  ASPM can be disabled or enabled at runtime via
44	  /sys/module/pcie_aspm/parameters/policy
45
46	  When in doubt, say Y.
47
48config PCIEASPM_DEBUG
49	bool "Debug PCI Express ASPM"
50	depends on PCIEASPM
51	default n
52	help
53	  This enables PCI Express ASPM debug support. It will add per-device
54	  interface to control ASPM.
55
56choice
57	prompt "Default ASPM policy"
58	default PCIEASPM_DEFAULT
59	depends on PCIEASPM
60
61config PCIEASPM_DEFAULT
62	bool "BIOS default"
63	depends on PCIEASPM
64	help
65	  Use the BIOS defaults for PCI Express ASPM.
66
67config PCIEASPM_POWERSAVE
68	bool "Powersave"
69	depends on PCIEASPM
70	help
71	  Enable PCI Express ASPM L0s and L1 where possible, even if the
72	  BIOS did not.
73
74config PCIEASPM_POWER_SUPERSAVE
75	bool "Power Supersave"
76	depends on PCIEASPM
77	help
78	  Same as PCIEASPM_POWERSAVE, except it also enables L1 substates where
79	  possible. This would result in higher power savings while staying in L1
80	  where the components support it.
81
82config PCIEASPM_PERFORMANCE
83	bool "Performance"
84	depends on PCIEASPM
85	help
86	  Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them.
87endchoice
88
89config PCIE_PME
90	def_bool y
91	depends on PCIEPORTBUS && PM
92
93config PCIE_DPC
94	bool "PCIe Downstream Port Containment support"
95	depends on PCIEPORTBUS
96	default n
97	help
98	  This enables PCI Express Downstream Port Containment (DPC)
99	  driver support.  DPC events from Root and Downstream ports
100	  will be handled by the DPC driver.  If your system doesn't
101	  have this capability or you do not want to use this feature,
102	  it is safe to answer N.
103
104config PCIE_PTM
105	bool "PCIe Precision Time Measurement support"
106	default n
107	depends on PCIEPORTBUS
108	help
109	  This enables PCI Express Precision Time Measurement (PTM)
110	  support.
111
112	  This is only useful if you have devices that support PTM, but it
113	  is safe to enable even if you don't.
114