1 /* 2 * Copyright (c) 2011-2014, Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 */ 13 14 #ifndef _NVME_H 15 #define _NVME_H 16 17 #include <linux/nvme.h> 18 #include <linux/pci.h> 19 #include <linux/kref.h> 20 #include <linux/blk-mq.h> 21 #include <linux/lightnvm.h> 22 #include <linux/sed-opal.h> 23 24 enum { 25 /* 26 * Driver internal status code for commands that were cancelled due 27 * to timeouts or controller shutdown. The value is negative so 28 * that it a) doesn't overlap with the unsigned hardware error codes, 29 * and b) can easily be tested for. 30 */ 31 NVME_SC_CANCELLED = -EINTR, 32 }; 33 34 extern unsigned char nvme_io_timeout; 35 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 36 37 extern unsigned char admin_timeout; 38 #define ADMIN_TIMEOUT (admin_timeout * HZ) 39 40 extern unsigned char shutdown_timeout; 41 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ) 42 43 #define NVME_DEFAULT_KATO 5 44 #define NVME_KATO_GRACE 10 45 46 extern unsigned int nvme_max_retries; 47 48 enum { 49 NVME_NS_LBA = 0, 50 NVME_NS_LIGHTNVM = 1, 51 }; 52 53 /* 54 * List of workarounds for devices that required behavior not specified in 55 * the standard. 56 */ 57 enum nvme_quirks { 58 /* 59 * Prefers I/O aligned to a stripe size specified in a vendor 60 * specific Identify field. 61 */ 62 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 63 64 /* 65 * The controller doesn't handle Identify value others than 0 or 1 66 * correctly. 67 */ 68 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 69 70 /* 71 * The controller deterministically returns O's on reads to discarded 72 * logical blocks. 73 */ 74 NVME_QUIRK_DISCARD_ZEROES = (1 << 2), 75 76 /* 77 * The controller needs a delay before starts checking the device 78 * readiness, which is done by reading the NVME_CSTS_RDY bit. 79 */ 80 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 81 82 /* 83 * APST should not be used. 84 */ 85 NVME_QUIRK_NO_APST = (1 << 4), 86 87 /* 88 * The deepest sleep state should not be used. 89 */ 90 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 91 }; 92 93 /* 94 * Common request structure for NVMe passthrough. All drivers must have 95 * this structure as the first member of their request-private data. 96 */ 97 struct nvme_request { 98 struct nvme_command *cmd; 99 union nvme_result result; 100 }; 101 102 static inline struct nvme_request *nvme_req(struct request *req) 103 { 104 return blk_mq_rq_to_pdu(req); 105 } 106 107 /* The below value is the specific amount of delay needed before checking 108 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 109 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 110 * found empirically. 111 */ 112 #define NVME_QUIRK_DELAY_AMOUNT 2000 113 114 enum nvme_ctrl_state { 115 NVME_CTRL_NEW, 116 NVME_CTRL_LIVE, 117 NVME_CTRL_RESETTING, 118 NVME_CTRL_RECONNECTING, 119 NVME_CTRL_DELETING, 120 NVME_CTRL_DEAD, 121 }; 122 123 struct nvme_ctrl { 124 enum nvme_ctrl_state state; 125 bool identified; 126 spinlock_t lock; 127 const struct nvme_ctrl_ops *ops; 128 struct request_queue *admin_q; 129 struct request_queue *connect_q; 130 struct device *dev; 131 struct kref kref; 132 int instance; 133 struct blk_mq_tag_set *tagset; 134 struct list_head namespaces; 135 struct mutex namespaces_mutex; 136 struct device *device; /* char device */ 137 struct list_head node; 138 struct ida ns_ida; 139 140 struct opal_dev *opal_dev; 141 142 char name[12]; 143 char serial[20]; 144 char model[40]; 145 char firmware_rev[8]; 146 u16 cntlid; 147 148 u32 ctrl_config; 149 150 u32 page_size; 151 u32 max_hw_sectors; 152 u16 oncs; 153 u16 vid; 154 u16 oacs; 155 atomic_t abort_limit; 156 u8 event_limit; 157 u8 vwc; 158 u32 vs; 159 u32 sgls; 160 u16 kas; 161 u8 npss; 162 u8 apsta; 163 unsigned int kato; 164 bool subsystem; 165 unsigned long quirks; 166 struct nvme_id_power_state psd[32]; 167 struct work_struct scan_work; 168 struct work_struct async_event_work; 169 struct delayed_work ka_work; 170 171 /* Power saving configuration */ 172 u64 ps_max_latency_us; 173 174 /* Fabrics only */ 175 u16 sqsize; 176 u32 ioccsz; 177 u32 iorcsz; 178 u16 icdoff; 179 u16 maxcmd; 180 struct nvmf_ctrl_options *opts; 181 }; 182 183 /* 184 * An NVM Express namespace is equivalent to a SCSI LUN 185 */ 186 struct nvme_ns { 187 struct list_head list; 188 189 struct nvme_ctrl *ctrl; 190 struct request_queue *queue; 191 struct gendisk *disk; 192 struct nvm_dev *ndev; 193 struct kref kref; 194 int instance; 195 196 u8 eui[8]; 197 u8 uuid[16]; 198 199 unsigned ns_id; 200 int lba_shift; 201 u16 ms; 202 bool ext; 203 u8 pi_type; 204 unsigned long flags; 205 206 #define NVME_NS_REMOVING 0 207 #define NVME_NS_DEAD 1 208 209 u64 mode_select_num_blocks; 210 u32 mode_select_block_len; 211 }; 212 213 struct nvme_ctrl_ops { 214 const char *name; 215 struct module *module; 216 bool is_fabrics; 217 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 218 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 219 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 220 int (*reset_ctrl)(struct nvme_ctrl *ctrl); 221 void (*free_ctrl)(struct nvme_ctrl *ctrl); 222 void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx); 223 int (*delete_ctrl)(struct nvme_ctrl *ctrl); 224 const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl); 225 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 226 }; 227 228 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) 229 { 230 u32 val = 0; 231 232 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) 233 return false; 234 return val & NVME_CSTS_RDY; 235 } 236 237 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 238 { 239 if (!ctrl->subsystem) 240 return -ENOTTY; 241 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 242 } 243 244 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 245 { 246 return (sector >> (ns->lba_shift - 9)); 247 } 248 249 static inline void nvme_cleanup_cmd(struct request *req) 250 { 251 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 252 kfree(page_address(req->special_vec.bv_page) + 253 req->special_vec.bv_offset); 254 } 255 } 256 257 static inline int nvme_error_status(u16 status) 258 { 259 switch (status & 0x7ff) { 260 case NVME_SC_SUCCESS: 261 return 0; 262 case NVME_SC_CAP_EXCEEDED: 263 return -ENOSPC; 264 default: 265 return -EIO; 266 } 267 } 268 269 static inline bool nvme_req_needs_retry(struct request *req, u16 status) 270 { 271 return !(status & NVME_SC_DNR || blk_noretry_request(req)) && 272 (jiffies - req->start_time) < req->timeout && 273 req->retries < nvme_max_retries; 274 } 275 276 void nvme_cancel_request(struct request *req, void *data, bool reserved); 277 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 278 enum nvme_ctrl_state new_state); 279 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 280 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 281 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 282 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 283 const struct nvme_ctrl_ops *ops, unsigned long quirks); 284 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 285 void nvme_put_ctrl(struct nvme_ctrl *ctrl); 286 int nvme_init_identify(struct nvme_ctrl *ctrl); 287 288 void nvme_queue_scan(struct nvme_ctrl *ctrl); 289 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 290 291 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 292 bool send); 293 294 #define NVME_NR_AERS 1 295 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 296 union nvme_result *res); 297 void nvme_queue_async_events(struct nvme_ctrl *ctrl); 298 299 void nvme_stop_queues(struct nvme_ctrl *ctrl); 300 void nvme_start_queues(struct nvme_ctrl *ctrl); 301 void nvme_kill_queues(struct nvme_ctrl *ctrl); 302 void nvme_unfreeze(struct nvme_ctrl *ctrl); 303 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 304 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 305 void nvme_start_freeze(struct nvme_ctrl *ctrl); 306 307 #define NVME_QID_ANY -1 308 struct request *nvme_alloc_request(struct request_queue *q, 309 struct nvme_command *cmd, unsigned int flags, int qid); 310 void nvme_requeue_req(struct request *req); 311 int nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 312 struct nvme_command *cmd); 313 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 314 void *buf, unsigned bufflen); 315 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 316 union nvme_result *result, void *buffer, unsigned bufflen, 317 unsigned timeout, int qid, int at_head, int flags); 318 int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, 319 void __user *ubuffer, unsigned bufflen, u32 *result, 320 unsigned timeout); 321 int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, 322 void __user *ubuffer, unsigned bufflen, 323 void __user *meta_buffer, unsigned meta_len, u32 meta_seed, 324 u32 *result, unsigned timeout); 325 int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id); 326 int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid, 327 struct nvme_id_ns **id); 328 int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log); 329 int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid, 330 void *buffer, size_t buflen, u32 *result); 331 int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11, 332 void *buffer, size_t buflen, u32 *result); 333 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 334 void nvme_start_keep_alive(struct nvme_ctrl *ctrl); 335 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 336 337 struct sg_io_hdr; 338 339 int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr); 340 int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg); 341 int nvme_sg_get_version_num(int __user *ip); 342 343 #ifdef CONFIG_NVM 344 int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id); 345 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 346 void nvme_nvm_unregister(struct nvme_ns *ns); 347 int nvme_nvm_register_sysfs(struct nvme_ns *ns); 348 void nvme_nvm_unregister_sysfs(struct nvme_ns *ns); 349 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 350 #else 351 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 352 int node) 353 { 354 return 0; 355 } 356 357 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 358 static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns) 359 { 360 return 0; 361 } 362 static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {}; 363 static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id) 364 { 365 return 0; 366 } 367 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 368 unsigned long arg) 369 { 370 return -ENOTTY; 371 } 372 #endif /* CONFIG_NVM */ 373 374 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 375 { 376 return dev_to_disk(dev)->private_data; 377 } 378 379 int __init nvme_core_init(void); 380 void nvme_core_exit(void); 381 382 #endif /* _NVME_H */ 383