1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (c) 2011-2014, Intel Corporation.
4 */
5
6 #ifndef _NVME_H
7 #define _NVME_H
8
9 #include <linux/nvme.h>
10 #include <linux/cdev.h>
11 #include <linux/pci.h>
12 #include <linux/kref.h>
13 #include <linux/blk-mq.h>
14 #include <linux/sed-opal.h>
15 #include <linux/fault-inject.h>
16 #include <linux/rcupdate.h>
17 #include <linux/wait.h>
18 #include <linux/t10-pi.h>
19
20 #include <trace/events/block.h>
21
22 extern const struct pr_ops nvme_pr_ops;
23
24 extern unsigned int nvme_io_timeout;
25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
26
27 extern unsigned int admin_timeout;
28 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ)
29
30 #define NVME_DEFAULT_KATO 5
31
32 #ifdef CONFIG_ARCH_NO_SG_CHAIN
33 #define NVME_INLINE_SG_CNT 0
34 #define NVME_INLINE_METADATA_SG_CNT 0
35 #else
36 #define NVME_INLINE_SG_CNT 2
37 #define NVME_INLINE_METADATA_SG_CNT 1
38 #endif
39
40 /*
41 * Default to a 4K page size, with the intention to update this
42 * path in the future to accommodate architectures with differing
43 * kernel and IO page sizes.
44 */
45 #define NVME_CTRL_PAGE_SHIFT 12
46 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT)
47
48 extern struct workqueue_struct *nvme_wq;
49 extern struct workqueue_struct *nvme_reset_wq;
50 extern struct workqueue_struct *nvme_delete_wq;
51
52 /*
53 * List of workarounds for devices that required behavior not specified in
54 * the standard.
55 */
56 enum nvme_quirks {
57 /*
58 * Prefers I/O aligned to a stripe size specified in a vendor
59 * specific Identify field.
60 */
61 NVME_QUIRK_STRIPE_SIZE = (1 << 0),
62
63 /*
64 * The controller doesn't handle Identify value others than 0 or 1
65 * correctly.
66 */
67 NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
68
69 /*
70 * The controller deterministically returns O's on reads to
71 * logical blocks that deallocate was called on.
72 */
73 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2),
74
75 /*
76 * The controller needs a delay before starts checking the device
77 * readiness, which is done by reading the NVME_CSTS_RDY bit.
78 */
79 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
80
81 /*
82 * APST should not be used.
83 */
84 NVME_QUIRK_NO_APST = (1 << 4),
85
86 /*
87 * The deepest sleep state should not be used.
88 */
89 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
90
91 /*
92 * Set MEDIUM priority on SQ creation
93 */
94 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7),
95
96 /*
97 * Ignore device provided subnqn.
98 */
99 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8),
100
101 /*
102 * Broken Write Zeroes.
103 */
104 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9),
105
106 /*
107 * Force simple suspend/resume path.
108 */
109 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10),
110
111 /*
112 * Use only one interrupt vector for all queues
113 */
114 NVME_QUIRK_SINGLE_VECTOR = (1 << 11),
115
116 /*
117 * Use non-standard 128 bytes SQEs.
118 */
119 NVME_QUIRK_128_BYTES_SQES = (1 << 12),
120
121 /*
122 * Prevent tag overlap between queues
123 */
124 NVME_QUIRK_SHARED_TAGS = (1 << 13),
125
126 /*
127 * Don't change the value of the temperature threshold feature
128 */
129 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14),
130
131 /*
132 * The controller doesn't handle the Identify Namespace
133 * Identification Descriptor list subcommand despite claiming
134 * NVMe 1.3 compliance.
135 */
136 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15),
137
138 /*
139 * The controller does not properly handle DMA addresses over
140 * 48 bits.
141 */
142 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16),
143
144 /*
145 * The controller requires the command_id value be limited, so skip
146 * encoding the generation sequence number.
147 */
148 NVME_QUIRK_SKIP_CID_GEN = (1 << 17),
149
150 /*
151 * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
152 */
153 NVME_QUIRK_BOGUS_NID = (1 << 18),
154
155 /*
156 * No temperature thresholds for channels other than 0 (Composite).
157 */
158 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19),
159
160 /*
161 * Disables simple suspend/resume path.
162 */
163 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20),
164
165 /*
166 * MSI (but not MSI-X) interrupts are broken and never fire.
167 */
168 NVME_QUIRK_BROKEN_MSI = (1 << 21),
169 };
170
171 /*
172 * Common request structure for NVMe passthrough. All drivers must have
173 * this structure as the first member of their request-private data.
174 */
175 struct nvme_request {
176 struct nvme_command *cmd;
177 union nvme_result result;
178 u8 genctr;
179 u8 retries;
180 u8 flags;
181 u16 status;
182 #ifdef CONFIG_NVME_MULTIPATH
183 unsigned long start_time;
184 #endif
185 struct nvme_ctrl *ctrl;
186 };
187
188 /*
189 * Mark a bio as coming in through the mpath node.
190 */
191 #define REQ_NVME_MPATH REQ_DRV
192
193 enum {
194 NVME_REQ_CANCELLED = (1 << 0),
195 NVME_REQ_USERCMD = (1 << 1),
196 NVME_MPATH_IO_STATS = (1 << 2),
197 };
198
nvme_req(struct request * req)199 static inline struct nvme_request *nvme_req(struct request *req)
200 {
201 return blk_mq_rq_to_pdu(req);
202 }
203
nvme_req_qid(struct request * req)204 static inline u16 nvme_req_qid(struct request *req)
205 {
206 if (!req->q->queuedata)
207 return 0;
208
209 return req->mq_hctx->queue_num + 1;
210 }
211
212 /* The below value is the specific amount of delay needed before checking
213 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
214 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
215 * found empirically.
216 */
217 #define NVME_QUIRK_DELAY_AMOUNT 2300
218
219 /*
220 * enum nvme_ctrl_state: Controller state
221 *
222 * @NVME_CTRL_NEW: New controller just allocated, initial state
223 * @NVME_CTRL_LIVE: Controller is connected and I/O capable
224 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset)
225 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the
226 * transport
227 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion)
228 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not
229 * disabled/failed immediately. This state comes
230 * after all async event processing took place and
231 * before ns removal and the controller deletion
232 * progress
233 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during
234 * shutdown or removal. In this case we forcibly
235 * kill all inflight I/O as they have no chance to
236 * complete
237 */
238 enum nvme_ctrl_state {
239 NVME_CTRL_NEW,
240 NVME_CTRL_LIVE,
241 NVME_CTRL_RESETTING,
242 NVME_CTRL_CONNECTING,
243 NVME_CTRL_DELETING,
244 NVME_CTRL_DELETING_NOIO,
245 NVME_CTRL_DEAD,
246 };
247
248 struct nvme_fault_inject {
249 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
250 struct fault_attr attr;
251 struct dentry *parent;
252 bool dont_retry; /* DNR, do not retry */
253 u16 status; /* status code */
254 #endif
255 };
256
257 enum nvme_ctrl_flags {
258 NVME_CTRL_FAILFAST_EXPIRED = 0,
259 NVME_CTRL_ADMIN_Q_STOPPED = 1,
260 NVME_CTRL_STARTED_ONCE = 2,
261 NVME_CTRL_STOPPED = 3,
262 NVME_CTRL_SKIP_ID_CNS_CS = 4,
263 NVME_CTRL_DIRTY_CAPABILITY = 5,
264 NVME_CTRL_FROZEN = 6,
265 };
266
267 struct nvme_ctrl {
268 bool comp_seen;
269 bool identified;
270 enum nvme_ctrl_state state;
271 spinlock_t lock;
272 struct mutex scan_lock;
273 const struct nvme_ctrl_ops *ops;
274 struct request_queue *admin_q;
275 struct request_queue *connect_q;
276 struct request_queue *fabrics_q;
277 struct device *dev;
278 int instance;
279 int numa_node;
280 struct blk_mq_tag_set *tagset;
281 struct blk_mq_tag_set *admin_tagset;
282 struct list_head namespaces;
283 struct rw_semaphore namespaces_rwsem;
284 struct device ctrl_device;
285 struct device *device; /* char device */
286 #ifdef CONFIG_NVME_HWMON
287 struct device *hwmon_device;
288 #endif
289 struct cdev cdev;
290 struct work_struct reset_work;
291 struct work_struct delete_work;
292 wait_queue_head_t state_wq;
293
294 struct nvme_subsystem *subsys;
295 struct list_head subsys_entry;
296
297 struct opal_dev *opal_dev;
298
299 char name[12];
300 u16 cntlid;
301
302 u16 mtfa;
303 u32 ctrl_config;
304 u32 queue_count;
305
306 u64 cap;
307 u32 max_hw_sectors;
308 u32 max_segments;
309 u32 max_integrity_segments;
310 u32 max_discard_sectors;
311 u32 max_discard_segments;
312 u32 max_zeroes_sectors;
313 #ifdef CONFIG_BLK_DEV_ZONED
314 u32 max_zone_append;
315 #endif
316 u16 crdt[3];
317 u16 oncs;
318 u32 dmrsl;
319 u16 oacs;
320 u16 sqsize;
321 u32 max_namespaces;
322 atomic_t abort_limit;
323 u8 vwc;
324 u32 vs;
325 u32 sgls;
326 u16 kas;
327 u8 npss;
328 u8 apsta;
329 u16 wctemp;
330 u16 cctemp;
331 u32 oaes;
332 u32 aen_result;
333 u32 ctratt;
334 unsigned int shutdown_timeout;
335 unsigned int kato;
336 bool subsystem;
337 unsigned long quirks;
338 struct nvme_id_power_state psd[32];
339 struct nvme_effects_log *effects;
340 struct xarray cels;
341 struct work_struct scan_work;
342 struct work_struct async_event_work;
343 struct delayed_work ka_work;
344 struct delayed_work failfast_work;
345 struct nvme_command ka_cmd;
346 unsigned long ka_last_check_time;
347 struct work_struct fw_act_work;
348 unsigned long events;
349
350 #ifdef CONFIG_NVME_MULTIPATH
351 /* asymmetric namespace access: */
352 u8 anacap;
353 u8 anatt;
354 u32 anagrpmax;
355 u32 nanagrpid;
356 struct mutex ana_lock;
357 struct nvme_ana_rsp_hdr *ana_log_buf;
358 size_t ana_log_size;
359 struct timer_list anatt_timer;
360 struct work_struct ana_work;
361 #endif
362
363 #ifdef CONFIG_NVME_AUTH
364 struct work_struct dhchap_auth_work;
365 struct mutex dhchap_auth_mutex;
366 struct nvme_dhchap_queue_context *dhchap_ctxs;
367 struct nvme_dhchap_key *host_key;
368 struct nvme_dhchap_key *ctrl_key;
369 u16 transaction;
370 #endif
371
372 /* Power saving configuration */
373 u64 ps_max_latency_us;
374 bool apst_enabled;
375
376 /* PCIe only: */
377 u16 hmmaxd;
378 u32 hmpre;
379 u32 hmmin;
380 u32 hmminds;
381
382 /* Fabrics only */
383 u32 ioccsz;
384 u32 iorcsz;
385 u16 icdoff;
386 u16 maxcmd;
387 int nr_reconnects;
388 unsigned long flags;
389 struct nvmf_ctrl_options *opts;
390
391 struct page *discard_page;
392 unsigned long discard_page_busy;
393
394 struct nvme_fault_inject fault_inject;
395
396 enum nvme_ctrl_type cntrltype;
397 enum nvme_dctype dctype;
398 };
399
nvme_ctrl_state(struct nvme_ctrl * ctrl)400 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl)
401 {
402 return READ_ONCE(ctrl->state);
403 }
404
405 enum nvme_iopolicy {
406 NVME_IOPOLICY_NUMA,
407 NVME_IOPOLICY_RR,
408 };
409
410 struct nvme_subsystem {
411 int instance;
412 struct device dev;
413 /*
414 * Because we unregister the device on the last put we need
415 * a separate refcount.
416 */
417 struct kref ref;
418 struct list_head entry;
419 struct mutex lock;
420 struct list_head ctrls;
421 struct list_head nsheads;
422 char subnqn[NVMF_NQN_SIZE];
423 char serial[20];
424 char model[40];
425 char firmware_rev[8];
426 u8 cmic;
427 enum nvme_subsys_type subtype;
428 u16 vendor_id;
429 u16 awupf; /* 0's based awupf value. */
430 struct ida ns_ida;
431 #ifdef CONFIG_NVME_MULTIPATH
432 enum nvme_iopolicy iopolicy;
433 #endif
434 };
435
436 /*
437 * Container structure for uniqueue namespace identifiers.
438 */
439 struct nvme_ns_ids {
440 u8 eui64[8];
441 u8 nguid[16];
442 uuid_t uuid;
443 u8 csi;
444 };
445
446 /*
447 * Anchor structure for namespaces. There is one for each namespace in a
448 * NVMe subsystem that any of our controllers can see, and the namespace
449 * structure for each controller is chained of it. For private namespaces
450 * there is a 1:1 relation to our namespace structures, that is ->list
451 * only ever has a single entry for private namespaces.
452 */
453 struct nvme_ns_head {
454 struct list_head list;
455 struct srcu_struct srcu;
456 struct nvme_subsystem *subsys;
457 unsigned ns_id;
458 struct nvme_ns_ids ids;
459 struct list_head entry;
460 struct kref ref;
461 bool shared;
462 int instance;
463 struct nvme_effects_log *effects;
464
465 struct cdev cdev;
466 struct device cdev_device;
467
468 struct gendisk *disk;
469 #ifdef CONFIG_NVME_MULTIPATH
470 struct bio_list requeue_list;
471 spinlock_t requeue_lock;
472 struct work_struct requeue_work;
473 struct mutex lock;
474 unsigned long flags;
475 #define NVME_NSHEAD_DISK_LIVE 0
476 struct nvme_ns __rcu *current_path[];
477 #endif
478 };
479
nvme_ns_head_multipath(struct nvme_ns_head * head)480 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
481 {
482 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
483 }
484
485 enum nvme_ns_features {
486 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
487 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
488 NVME_NS_DEAC, /* DEAC bit in Write Zeores supported */
489 };
490
491 struct nvme_ns {
492 struct list_head list;
493
494 struct nvme_ctrl *ctrl;
495 struct request_queue *queue;
496 struct gendisk *disk;
497 #ifdef CONFIG_NVME_MULTIPATH
498 enum nvme_ana_state ana_state;
499 u32 ana_grpid;
500 #endif
501 struct list_head siblings;
502 struct kref kref;
503 struct nvme_ns_head *head;
504
505 int lba_shift;
506 u16 ms;
507 u16 pi_size;
508 u16 sgs;
509 u32 sws;
510 u8 pi_type;
511 u8 guard_type;
512 #ifdef CONFIG_BLK_DEV_ZONED
513 u64 zsze;
514 #endif
515 unsigned long features;
516 unsigned long flags;
517 #define NVME_NS_REMOVING 0
518 #define NVME_NS_ANA_PENDING 2
519 #define NVME_NS_FORCE_RO 3
520 #define NVME_NS_READY 4
521
522 struct cdev cdev;
523 struct device cdev_device;
524
525 struct nvme_fault_inject fault_inject;
526
527 };
528
529 /* NVMe ns supports metadata actions by the controller (generate/strip) */
nvme_ns_has_pi(struct nvme_ns * ns)530 static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
531 {
532 return ns->pi_type && ns->ms == ns->pi_size;
533 }
534
535 struct nvme_ctrl_ops {
536 const char *name;
537 struct module *module;
538 unsigned int flags;
539 #define NVME_F_FABRICS (1 << 0)
540 #define NVME_F_METADATA_SUPPORTED (1 << 1)
541 #define NVME_F_BLOCKING (1 << 2)
542
543 const struct attribute_group **dev_attr_groups;
544 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
545 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
546 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
547 void (*free_ctrl)(struct nvme_ctrl *ctrl);
548 void (*submit_async_event)(struct nvme_ctrl *ctrl);
549 void (*delete_ctrl)(struct nvme_ctrl *ctrl);
550 void (*stop_ctrl)(struct nvme_ctrl *ctrl);
551 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
552 void (*print_device_info)(struct nvme_ctrl *ctrl);
553 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl);
554 };
555
556 /*
557 * nvme command_id is constructed as such:
558 * | xxxx | xxxxxxxxxxxx |
559 * gen request tag
560 */
561 #define nvme_genctr_mask(gen) (gen & 0xf)
562 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12)
563 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12)
564 #define nvme_tag_from_cid(cid) (cid & 0xfff)
565
nvme_cid(struct request * rq)566 static inline u16 nvme_cid(struct request *rq)
567 {
568 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
569 }
570
nvme_find_rq(struct blk_mq_tags * tags,u16 command_id)571 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
572 u16 command_id)
573 {
574 u8 genctr = nvme_genctr_from_cid(command_id);
575 u16 tag = nvme_tag_from_cid(command_id);
576 struct request *rq;
577
578 rq = blk_mq_tag_to_rq(tags, tag);
579 if (unlikely(!rq)) {
580 pr_err("could not locate request for tag %#x\n",
581 tag);
582 return NULL;
583 }
584 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
585 dev_err(nvme_req(rq)->ctrl->device,
586 "request %#x genctr mismatch (got %#x expected %#x)\n",
587 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
588 return NULL;
589 }
590 return rq;
591 }
592
nvme_cid_to_rq(struct blk_mq_tags * tags,u16 command_id)593 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
594 u16 command_id)
595 {
596 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
597 }
598
599 /*
600 * Return the length of the string without the space padding
601 */
nvme_strlen(char * s,int len)602 static inline int nvme_strlen(char *s, int len)
603 {
604 while (s[len - 1] == ' ')
605 len--;
606 return len;
607 }
608
nvme_print_device_info(struct nvme_ctrl * ctrl)609 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl)
610 {
611 struct nvme_subsystem *subsys = ctrl->subsys;
612
613 if (ctrl->ops->print_device_info) {
614 ctrl->ops->print_device_info(ctrl);
615 return;
616 }
617
618 dev_err(ctrl->device,
619 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id,
620 nvme_strlen(subsys->model, sizeof(subsys->model)),
621 subsys->model, nvme_strlen(subsys->firmware_rev,
622 sizeof(subsys->firmware_rev)),
623 subsys->firmware_rev);
624 }
625
626 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
627 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
628 const char *dev_name);
629 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
630 void nvme_should_fail(struct request *req);
631 #else
nvme_fault_inject_init(struct nvme_fault_inject * fault_inj,const char * dev_name)632 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
633 const char *dev_name)
634 {
635 }
nvme_fault_inject_fini(struct nvme_fault_inject * fault_inj)636 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
637 {
638 }
nvme_should_fail(struct request * req)639 static inline void nvme_should_fail(struct request *req) {}
640 #endif
641
642 bool nvme_wait_reset(struct nvme_ctrl *ctrl);
643 int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
644
nvme_reset_subsystem(struct nvme_ctrl * ctrl)645 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
646 {
647 int ret;
648
649 if (!ctrl->subsystem)
650 return -ENOTTY;
651 if (!nvme_wait_reset(ctrl))
652 return -EBUSY;
653
654 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
655 if (ret)
656 return ret;
657
658 return nvme_try_sched_reset(ctrl);
659 }
660
661 /*
662 * Convert a 512B sector number to a device logical block number.
663 */
nvme_sect_to_lba(struct nvme_ns * ns,sector_t sector)664 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
665 {
666 return sector >> (ns->lba_shift - SECTOR_SHIFT);
667 }
668
669 /*
670 * Convert a device logical block number to a 512B sector number.
671 */
nvme_lba_to_sect(struct nvme_ns * ns,u64 lba)672 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
673 {
674 return lba << (ns->lba_shift - SECTOR_SHIFT);
675 }
676
677 /*
678 * Convert byte length to nvme's 0-based num dwords
679 */
nvme_bytes_to_numd(size_t len)680 static inline u32 nvme_bytes_to_numd(size_t len)
681 {
682 return (len >> 2) - 1;
683 }
684
nvme_is_ana_error(u16 status)685 static inline bool nvme_is_ana_error(u16 status)
686 {
687 switch (status & 0x7ff) {
688 case NVME_SC_ANA_TRANSITION:
689 case NVME_SC_ANA_INACCESSIBLE:
690 case NVME_SC_ANA_PERSISTENT_LOSS:
691 return true;
692 default:
693 return false;
694 }
695 }
696
nvme_is_path_error(u16 status)697 static inline bool nvme_is_path_error(u16 status)
698 {
699 /* check for a status code type of 'path related status' */
700 return (status & 0x700) == 0x300;
701 }
702
703 /*
704 * Fill in the status and result information from the CQE, and then figure out
705 * if blk-mq will need to use IPI magic to complete the request, and if yes do
706 * so. If not let the caller complete the request without an indirect function
707 * call.
708 */
nvme_try_complete_req(struct request * req,__le16 status,union nvme_result result)709 static inline bool nvme_try_complete_req(struct request *req, __le16 status,
710 union nvme_result result)
711 {
712 struct nvme_request *rq = nvme_req(req);
713 struct nvme_ctrl *ctrl = rq->ctrl;
714
715 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
716 rq->genctr++;
717
718 rq->status = le16_to_cpu(status) >> 1;
719 rq->result = result;
720 /* inject error when permitted by fault injection framework */
721 nvme_should_fail(req);
722 if (unlikely(blk_should_fake_timeout(req->q)))
723 return true;
724 return blk_mq_complete_request_remote(req);
725 }
726
nvme_get_ctrl(struct nvme_ctrl * ctrl)727 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
728 {
729 get_device(ctrl->device);
730 }
731
nvme_put_ctrl(struct nvme_ctrl * ctrl)732 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
733 {
734 put_device(ctrl->device);
735 }
736
nvme_is_aen_req(u16 qid,__u16 command_id)737 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
738 {
739 return !qid &&
740 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
741 }
742
743 /*
744 * Returns true for sink states that can't ever transition back to live.
745 */
nvme_state_terminal(struct nvme_ctrl * ctrl)746 static inline bool nvme_state_terminal(struct nvme_ctrl *ctrl)
747 {
748 switch (nvme_ctrl_state(ctrl)) {
749 case NVME_CTRL_NEW:
750 case NVME_CTRL_LIVE:
751 case NVME_CTRL_RESETTING:
752 case NVME_CTRL_CONNECTING:
753 return false;
754 case NVME_CTRL_DELETING:
755 case NVME_CTRL_DELETING_NOIO:
756 case NVME_CTRL_DEAD:
757 return true;
758 default:
759 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state);
760 return true;
761 }
762 }
763
764 void nvme_end_req(struct request *req);
765 void nvme_complete_rq(struct request *req);
766 void nvme_complete_batch_req(struct request *req);
767
nvme_complete_batch(struct io_comp_batch * iob,void (* fn)(struct request * rq))768 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
769 void (*fn)(struct request *rq))
770 {
771 struct request *req;
772
773 rq_list_for_each(&iob->req_list, req) {
774 fn(req);
775 nvme_complete_batch_req(req);
776 }
777 blk_mq_end_request_batch(iob);
778 }
779
780 blk_status_t nvme_host_path_error(struct request *req);
781 bool nvme_cancel_request(struct request *req, void *data);
782 void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
783 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
784 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
785 enum nvme_ctrl_state new_state);
786 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown);
787 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
788 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
789 const struct nvme_ctrl_ops *ops, unsigned long quirks);
790 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
791 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
792 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
793 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended);
794 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
795 const struct blk_mq_ops *ops, unsigned int cmd_size);
796 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl);
797 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
798 const struct blk_mq_ops *ops, unsigned int nr_maps,
799 unsigned int cmd_size);
800 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl);
801
802 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
803
804 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
805 volatile union nvme_result *res);
806
807 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl);
808 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl);
809 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl);
810 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl);
811 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl);
812 void nvme_sync_queues(struct nvme_ctrl *ctrl);
813 void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
814 void nvme_unfreeze(struct nvme_ctrl *ctrl);
815 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
816 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
817 void nvme_start_freeze(struct nvme_ctrl *ctrl);
818
nvme_req_op(struct nvme_command * cmd)819 static inline enum req_op nvme_req_op(struct nvme_command *cmd)
820 {
821 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
822 }
823
824 #define NVME_QID_ANY -1
825 void nvme_init_request(struct request *req, struct nvme_command *cmd);
826 void nvme_cleanup_cmd(struct request *req);
827 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
828 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
829 struct request *req);
830 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
831 bool queue_live);
832
nvme_check_ready(struct nvme_ctrl * ctrl,struct request * rq,bool queue_live)833 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
834 bool queue_live)
835 {
836 if (likely(ctrl->state == NVME_CTRL_LIVE))
837 return true;
838 if (ctrl->ops->flags & NVME_F_FABRICS &&
839 ctrl->state == NVME_CTRL_DELETING)
840 return queue_live;
841 return __nvme_check_ready(ctrl, rq, queue_live);
842 }
843
844 /*
845 * NSID shall be unique for all shared namespaces, or if at least one of the
846 * following conditions is met:
847 * 1. Namespace Management is supported by the controller
848 * 2. ANA is supported by the controller
849 * 3. NVM Set are supported by the controller
850 *
851 * In other case, private namespace are not required to report a unique NSID.
852 */
nvme_is_unique_nsid(struct nvme_ctrl * ctrl,struct nvme_ns_head * head)853 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
854 struct nvme_ns_head *head)
855 {
856 return head->shared ||
857 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
858 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
859 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
860 }
861
862 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
863 void *buf, unsigned bufflen);
864 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
865 union nvme_result *result, void *buffer, unsigned bufflen,
866 int qid, int at_head,
867 blk_mq_req_flags_t flags);
868 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
869 unsigned int dword11, void *buffer, size_t buflen,
870 u32 *result);
871 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
872 unsigned int dword11, void *buffer, size_t buflen,
873 u32 *result);
874 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
875 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
876 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
877 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
878 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
879 void nvme_queue_scan(struct nvme_ctrl *ctrl);
880 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
881 void *log, size_t size, u64 offset);
882 bool nvme_tryget_ns_head(struct nvme_ns_head *head);
883 void nvme_put_ns_head(struct nvme_ns_head *head);
884 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
885 const struct file_operations *fops, struct module *owner);
886 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
887 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode,
888 unsigned int cmd, unsigned long arg);
889 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
890 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode,
891 unsigned int cmd, unsigned long arg);
892 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
893 unsigned long arg);
894 long nvme_dev_ioctl(struct file *file, unsigned int cmd,
895 unsigned long arg);
896 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
897 struct io_comp_batch *iob, unsigned int poll_flags);
898 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd,
899 unsigned int issue_flags);
900 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd,
901 unsigned int issue_flags);
902 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
903 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags);
904
905 extern const struct attribute_group *nvme_ns_id_attr_groups[];
906 extern const struct pr_ops nvme_pr_ops;
907 extern const struct block_device_operations nvme_ns_head_ops;
908 extern const struct attribute_group nvme_dev_attrs_group;
909 extern const struct attribute_group *nvme_subsys_attrs_groups[];
910 extern const struct attribute_group *nvme_dev_attr_groups[];
911 extern const struct block_device_operations nvme_bdev_ops;
912
913 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
914 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
915 #ifdef CONFIG_NVME_MULTIPATH
nvme_ctrl_use_ana(struct nvme_ctrl * ctrl)916 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
917 {
918 return ctrl->ana_log_buf != NULL;
919 }
920
921 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
922 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
923 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
924 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
925 void nvme_failover_req(struct request *req);
926 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
927 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
928 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid);
929 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
930 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
931 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
932 void nvme_mpath_update(struct nvme_ctrl *ctrl);
933 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
934 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
935 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
936 void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
937 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
938 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
939 void nvme_mpath_start_request(struct request *rq);
940 void nvme_mpath_end_request(struct request *rq);
941
nvme_trace_bio_complete(struct request * req)942 static inline void nvme_trace_bio_complete(struct request *req)
943 {
944 struct nvme_ns *ns = req->q->queuedata;
945
946 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio)
947 trace_block_bio_complete(ns->head->disk->queue, req->bio);
948 }
949
950 extern bool multipath;
951 extern struct device_attribute dev_attr_ana_grpid;
952 extern struct device_attribute dev_attr_ana_state;
953 extern struct device_attribute subsys_attr_iopolicy;
954
955 #else
956 #define multipath false
nvme_ctrl_use_ana(struct nvme_ctrl * ctrl)957 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
958 {
959 return false;
960 }
nvme_failover_req(struct request * req)961 static inline void nvme_failover_req(struct request *req)
962 {
963 }
nvme_kick_requeue_lists(struct nvme_ctrl * ctrl)964 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
965 {
966 }
nvme_mpath_alloc_disk(struct nvme_ctrl * ctrl,struct nvme_ns_head * head)967 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
968 struct nvme_ns_head *head)
969 {
970 return 0;
971 }
nvme_mpath_add_disk(struct nvme_ns * ns,__le32 anagrpid)972 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid)
973 {
974 }
nvme_mpath_remove_disk(struct nvme_ns_head * head)975 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
976 {
977 }
nvme_mpath_clear_current_path(struct nvme_ns * ns)978 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
979 {
980 return false;
981 }
nvme_mpath_revalidate_paths(struct nvme_ns * ns)982 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
983 {
984 }
nvme_mpath_clear_ctrl_paths(struct nvme_ctrl * ctrl)985 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
986 {
987 }
nvme_mpath_shutdown_disk(struct nvme_ns_head * head)988 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
989 {
990 }
nvme_trace_bio_complete(struct request * req)991 static inline void nvme_trace_bio_complete(struct request *req)
992 {
993 }
nvme_mpath_init_ctrl(struct nvme_ctrl * ctrl)994 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
995 {
996 }
nvme_mpath_init_identify(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)997 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
998 struct nvme_id_ctrl *id)
999 {
1000 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
1001 dev_warn(ctrl->device,
1002 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
1003 return 0;
1004 }
nvme_mpath_update(struct nvme_ctrl * ctrl)1005 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
1006 {
1007 }
nvme_mpath_uninit(struct nvme_ctrl * ctrl)1008 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
1009 {
1010 }
nvme_mpath_stop(struct nvme_ctrl * ctrl)1011 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
1012 {
1013 }
nvme_mpath_unfreeze(struct nvme_subsystem * subsys)1014 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
1015 {
1016 }
nvme_mpath_wait_freeze(struct nvme_subsystem * subsys)1017 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
1018 {
1019 }
nvme_mpath_start_freeze(struct nvme_subsystem * subsys)1020 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
1021 {
1022 }
nvme_mpath_default_iopolicy(struct nvme_subsystem * subsys)1023 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
1024 {
1025 }
nvme_mpath_start_request(struct request * rq)1026 static inline void nvme_mpath_start_request(struct request *rq)
1027 {
1028 }
nvme_mpath_end_request(struct request * rq)1029 static inline void nvme_mpath_end_request(struct request *rq)
1030 {
1031 }
1032 #endif /* CONFIG_NVME_MULTIPATH */
1033
1034 int nvme_revalidate_zones(struct nvme_ns *ns);
1035 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
1036 unsigned int nr_zones, report_zones_cb cb, void *data);
1037 #ifdef CONFIG_BLK_DEV_ZONED
1038 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
1039 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
1040 struct nvme_command *cmnd,
1041 enum nvme_zone_mgmt_action action);
1042 #else
nvme_setup_zone_mgmt_send(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd,enum nvme_zone_mgmt_action action)1043 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
1044 struct request *req, struct nvme_command *cmnd,
1045 enum nvme_zone_mgmt_action action)
1046 {
1047 return BLK_STS_NOTSUPP;
1048 }
1049
nvme_update_zone_info(struct nvme_ns * ns,unsigned lbaf)1050 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
1051 {
1052 dev_warn(ns->ctrl->device,
1053 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
1054 return -EPROTONOSUPPORT;
1055 }
1056 #endif
1057
nvme_get_ns_from_dev(struct device * dev)1058 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
1059 {
1060 return dev_to_disk(dev)->private_data;
1061 }
1062
1063 #ifdef CONFIG_NVME_HWMON
1064 int nvme_hwmon_init(struct nvme_ctrl *ctrl);
1065 void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
1066 #else
nvme_hwmon_init(struct nvme_ctrl * ctrl)1067 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
1068 {
1069 return 0;
1070 }
1071
nvme_hwmon_exit(struct nvme_ctrl * ctrl)1072 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
1073 {
1074 }
1075 #endif
1076
nvme_start_request(struct request * rq)1077 static inline void nvme_start_request(struct request *rq)
1078 {
1079 if (rq->cmd_flags & REQ_NVME_MPATH)
1080 nvme_mpath_start_request(rq);
1081 blk_mq_start_request(rq);
1082 }
1083
nvme_ctrl_sgl_supported(struct nvme_ctrl * ctrl)1084 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
1085 {
1086 return ctrl->sgls & ((1 << 0) | (1 << 1));
1087 }
1088
1089 #ifdef CONFIG_NVME_AUTH
1090 int __init nvme_init_auth(void);
1091 void __exit nvme_exit_auth(void);
1092 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl);
1093 void nvme_auth_stop(struct nvme_ctrl *ctrl);
1094 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid);
1095 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid);
1096 void nvme_auth_free(struct nvme_ctrl *ctrl);
1097 #else
nvme_auth_init_ctrl(struct nvme_ctrl * ctrl)1098 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl)
1099 {
1100 return 0;
1101 }
nvme_init_auth(void)1102 static inline int __init nvme_init_auth(void)
1103 {
1104 return 0;
1105 }
nvme_exit_auth(void)1106 static inline void __exit nvme_exit_auth(void)
1107 {
1108 }
nvme_auth_stop(struct nvme_ctrl * ctrl)1109 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {};
nvme_auth_negotiate(struct nvme_ctrl * ctrl,int qid)1110 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid)
1111 {
1112 return -EPROTONOSUPPORT;
1113 }
nvme_auth_wait(struct nvme_ctrl * ctrl,int qid)1114 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid)
1115 {
1116 return NVME_SC_AUTH_REQUIRED;
1117 }
nvme_auth_free(struct nvme_ctrl * ctrl)1118 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {};
1119 #endif
1120
1121 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1122 u8 opcode);
1123 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode);
1124 int nvme_execute_rq(struct request *rq, bool at_head);
1125 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1126 struct nvme_command *cmd, int status);
1127 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
1128 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
1129 void nvme_put_ns(struct nvme_ns *ns);
1130
nvme_multi_css(struct nvme_ctrl * ctrl)1131 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
1132 {
1133 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
1134 }
1135
1136 #ifdef CONFIG_NVME_VERBOSE_ERRORS
1137 const unsigned char *nvme_get_error_status_str(u16 status);
1138 const unsigned char *nvme_get_opcode_str(u8 opcode);
1139 const unsigned char *nvme_get_admin_opcode_str(u8 opcode);
1140 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode);
1141 #else /* CONFIG_NVME_VERBOSE_ERRORS */
nvme_get_error_status_str(u16 status)1142 static inline const unsigned char *nvme_get_error_status_str(u16 status)
1143 {
1144 return "I/O Error";
1145 }
nvme_get_opcode_str(u8 opcode)1146 static inline const unsigned char *nvme_get_opcode_str(u8 opcode)
1147 {
1148 return "I/O Cmd";
1149 }
nvme_get_admin_opcode_str(u8 opcode)1150 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
1151 {
1152 return "Admin Cmd";
1153 }
1154
nvme_get_fabrics_opcode_str(u8 opcode)1155 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode)
1156 {
1157 return "Fabrics Cmd";
1158 }
1159 #endif /* CONFIG_NVME_VERBOSE_ERRORS */
1160
nvme_opcode_str(int qid,u8 opcode,u8 fctype)1161 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype)
1162 {
1163 if (opcode == nvme_fabrics_command)
1164 return nvme_get_fabrics_opcode_str(fctype);
1165 return qid ? nvme_get_opcode_str(opcode) :
1166 nvme_get_admin_opcode_str(opcode);
1167 }
1168 #endif /* _NVME_H */
1169