1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern const struct pr_ops nvme_pr_ops; 23 24 extern unsigned int nvme_io_timeout; 25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 26 27 extern unsigned int admin_timeout; 28 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 29 30 #define NVME_DEFAULT_KATO 5 31 32 #ifdef CONFIG_ARCH_NO_SG_CHAIN 33 #define NVME_INLINE_SG_CNT 0 34 #define NVME_INLINE_METADATA_SG_CNT 0 35 #else 36 #define NVME_INLINE_SG_CNT 2 37 #define NVME_INLINE_METADATA_SG_CNT 1 38 #endif 39 40 /* 41 * Default to a 4K page size, with the intention to update this 42 * path in the future to accommodate architectures with differing 43 * kernel and IO page sizes. 44 */ 45 #define NVME_CTRL_PAGE_SHIFT 12 46 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 47 48 extern struct workqueue_struct *nvme_wq; 49 extern struct workqueue_struct *nvme_reset_wq; 50 extern struct workqueue_struct *nvme_delete_wq; 51 extern struct mutex nvme_subsystems_lock; 52 53 /* 54 * List of workarounds for devices that required behavior not specified in 55 * the standard. 56 */ 57 enum nvme_quirks { 58 /* 59 * Prefers I/O aligned to a stripe size specified in a vendor 60 * specific Identify field. 61 */ 62 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 63 64 /* 65 * The controller doesn't handle Identify value others than 0 or 1 66 * correctly. 67 */ 68 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 69 70 /* 71 * The controller deterministically returns O's on reads to 72 * logical blocks that deallocate was called on. 73 */ 74 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 75 76 /* 77 * The controller needs a delay before starts checking the device 78 * readiness, which is done by reading the NVME_CSTS_RDY bit. 79 */ 80 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 81 82 /* 83 * APST should not be used. 84 */ 85 NVME_QUIRK_NO_APST = (1 << 4), 86 87 /* 88 * The deepest sleep state should not be used. 89 */ 90 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 91 92 /* 93 * Problems seen with concurrent commands 94 */ 95 NVME_QUIRK_QDEPTH_ONE = (1 << 6), 96 97 /* 98 * Set MEDIUM priority on SQ creation 99 */ 100 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 101 102 /* 103 * Ignore device provided subnqn. 104 */ 105 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 106 107 /* 108 * Broken Write Zeroes. 109 */ 110 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 111 112 /* 113 * Force simple suspend/resume path. 114 */ 115 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 116 117 /* 118 * Use only one interrupt vector for all queues 119 */ 120 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 121 122 /* 123 * Use non-standard 128 bytes SQEs. 124 */ 125 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 126 127 /* 128 * Prevent tag overlap between queues 129 */ 130 NVME_QUIRK_SHARED_TAGS = (1 << 13), 131 132 /* 133 * Don't change the value of the temperature threshold feature 134 */ 135 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 136 137 /* 138 * The controller doesn't handle the Identify Namespace 139 * Identification Descriptor list subcommand despite claiming 140 * NVMe 1.3 compliance. 141 */ 142 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 143 144 /* 145 * The controller does not properly handle DMA addresses over 146 * 48 bits. 147 */ 148 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 149 150 /* 151 * The controller requires the command_id value be limited, so skip 152 * encoding the generation sequence number. 153 */ 154 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 155 156 /* 157 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 158 */ 159 NVME_QUIRK_BOGUS_NID = (1 << 18), 160 161 /* 162 * No temperature thresholds for channels other than 0 (Composite). 163 */ 164 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 165 166 /* 167 * Disables simple suspend/resume path. 168 */ 169 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 170 171 /* 172 * MSI (but not MSI-X) interrupts are broken and never fire. 173 */ 174 NVME_QUIRK_BROKEN_MSI = (1 << 21), 175 }; 176 177 /* 178 * Common request structure for NVMe passthrough. All drivers must have 179 * this structure as the first member of their request-private data. 180 */ 181 struct nvme_request { 182 struct nvme_command *cmd; 183 union nvme_result result; 184 u8 genctr; 185 u8 retries; 186 u8 flags; 187 u16 status; 188 #ifdef CONFIG_NVME_MULTIPATH 189 unsigned long start_time; 190 #endif 191 struct nvme_ctrl *ctrl; 192 }; 193 194 /* 195 * Mark a bio as coming in through the mpath node. 196 */ 197 #define REQ_NVME_MPATH REQ_DRV 198 199 enum { 200 NVME_REQ_CANCELLED = (1 << 0), 201 NVME_REQ_USERCMD = (1 << 1), 202 NVME_MPATH_IO_STATS = (1 << 2), 203 NVME_MPATH_CNT_ACTIVE = (1 << 3), 204 }; 205 206 static inline struct nvme_request *nvme_req(struct request *req) 207 { 208 return blk_mq_rq_to_pdu(req); 209 } 210 211 static inline u16 nvme_req_qid(struct request *req) 212 { 213 if (!req->q->queuedata) 214 return 0; 215 216 return req->mq_hctx->queue_num + 1; 217 } 218 219 /* The below value is the specific amount of delay needed before checking 220 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 221 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 222 * found empirically. 223 */ 224 #define NVME_QUIRK_DELAY_AMOUNT 2300 225 226 /* 227 * enum nvme_ctrl_state: Controller state 228 * 229 * @NVME_CTRL_NEW: New controller just allocated, initial state 230 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 231 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 232 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 233 * transport 234 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 235 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 236 * disabled/failed immediately. This state comes 237 * after all async event processing took place and 238 * before ns removal and the controller deletion 239 * progress 240 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 241 * shutdown or removal. In this case we forcibly 242 * kill all inflight I/O as they have no chance to 243 * complete 244 */ 245 enum nvme_ctrl_state { 246 NVME_CTRL_NEW, 247 NVME_CTRL_LIVE, 248 NVME_CTRL_RESETTING, 249 NVME_CTRL_CONNECTING, 250 NVME_CTRL_DELETING, 251 NVME_CTRL_DELETING_NOIO, 252 NVME_CTRL_DEAD, 253 }; 254 255 struct nvme_fault_inject { 256 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 257 struct fault_attr attr; 258 struct dentry *parent; 259 bool dont_retry; /* DNR, do not retry */ 260 u16 status; /* status code */ 261 #endif 262 }; 263 264 enum nvme_ctrl_flags { 265 NVME_CTRL_FAILFAST_EXPIRED = 0, 266 NVME_CTRL_ADMIN_Q_STOPPED = 1, 267 NVME_CTRL_STARTED_ONCE = 2, 268 NVME_CTRL_STOPPED = 3, 269 NVME_CTRL_SKIP_ID_CNS_CS = 4, 270 NVME_CTRL_DIRTY_CAPABILITY = 5, 271 NVME_CTRL_FROZEN = 6, 272 }; 273 274 struct nvme_ctrl { 275 bool comp_seen; 276 bool identified; 277 enum nvme_ctrl_state state; 278 spinlock_t lock; 279 struct mutex scan_lock; 280 const struct nvme_ctrl_ops *ops; 281 struct request_queue *admin_q; 282 struct request_queue *connect_q; 283 struct request_queue *fabrics_q; 284 struct device *dev; 285 int instance; 286 int numa_node; 287 struct blk_mq_tag_set *tagset; 288 struct blk_mq_tag_set *admin_tagset; 289 struct list_head namespaces; 290 struct mutex namespaces_lock; 291 struct srcu_struct srcu; 292 struct device ctrl_device; 293 struct device *device; /* char device */ 294 #ifdef CONFIG_NVME_HWMON 295 struct device *hwmon_device; 296 #endif 297 struct cdev cdev; 298 struct work_struct reset_work; 299 struct work_struct delete_work; 300 wait_queue_head_t state_wq; 301 302 struct nvme_subsystem *subsys; 303 struct list_head subsys_entry; 304 305 struct opal_dev *opal_dev; 306 307 char name[12]; 308 u16 cntlid; 309 310 u16 mtfa; 311 u32 ctrl_config; 312 u32 queue_count; 313 314 u64 cap; 315 u32 max_hw_sectors; 316 u32 max_segments; 317 u32 max_integrity_segments; 318 u32 max_discard_sectors; 319 u32 max_discard_segments; 320 u32 max_zeroes_sectors; 321 #ifdef CONFIG_BLK_DEV_ZONED 322 u32 max_zone_append; 323 #endif 324 u16 crdt[3]; 325 u16 oncs; 326 u32 dmrsl; 327 u16 oacs; 328 u16 sqsize; 329 u32 max_namespaces; 330 atomic_t abort_limit; 331 u8 vwc; 332 u32 vs; 333 u32 sgls; 334 u16 kas; 335 u8 npss; 336 u8 apsta; 337 u16 wctemp; 338 u16 cctemp; 339 u32 oaes; 340 u32 aen_result; 341 u32 ctratt; 342 unsigned int shutdown_timeout; 343 unsigned int kato; 344 bool subsystem; 345 unsigned long quirks; 346 struct nvme_id_power_state psd[32]; 347 struct nvme_effects_log *effects; 348 struct xarray cels; 349 struct work_struct scan_work; 350 struct work_struct async_event_work; 351 struct delayed_work ka_work; 352 struct delayed_work failfast_work; 353 struct nvme_command ka_cmd; 354 unsigned long ka_last_check_time; 355 struct work_struct fw_act_work; 356 unsigned long events; 357 358 #ifdef CONFIG_NVME_MULTIPATH 359 /* asymmetric namespace access: */ 360 u8 anacap; 361 u8 anatt; 362 u32 anagrpmax; 363 u32 nanagrpid; 364 struct mutex ana_lock; 365 struct nvme_ana_rsp_hdr *ana_log_buf; 366 size_t ana_log_size; 367 struct timer_list anatt_timer; 368 struct work_struct ana_work; 369 atomic_t nr_active; 370 #endif 371 372 #ifdef CONFIG_NVME_AUTH 373 struct work_struct dhchap_auth_work; 374 struct mutex dhchap_auth_mutex; 375 struct nvme_dhchap_queue_context *dhchap_ctxs; 376 struct nvme_dhchap_key *host_key; 377 struct nvme_dhchap_key *ctrl_key; 378 u16 transaction; 379 #endif 380 381 /* Power saving configuration */ 382 u64 ps_max_latency_us; 383 bool apst_enabled; 384 385 /* PCIe only: */ 386 u16 hmmaxd; 387 u32 hmpre; 388 u32 hmmin; 389 u32 hmminds; 390 391 /* Fabrics only */ 392 u32 ioccsz; 393 u32 iorcsz; 394 u16 icdoff; 395 u16 maxcmd; 396 int nr_reconnects; 397 unsigned long flags; 398 struct nvmf_ctrl_options *opts; 399 400 struct page *discard_page; 401 unsigned long discard_page_busy; 402 403 struct nvme_fault_inject fault_inject; 404 405 enum nvme_ctrl_type cntrltype; 406 enum nvme_dctype dctype; 407 }; 408 409 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl) 410 { 411 return READ_ONCE(ctrl->state); 412 } 413 414 enum nvme_iopolicy { 415 NVME_IOPOLICY_NUMA, 416 NVME_IOPOLICY_RR, 417 NVME_IOPOLICY_QD, 418 }; 419 420 struct nvme_subsystem { 421 int instance; 422 struct device dev; 423 /* 424 * Because we unregister the device on the last put we need 425 * a separate refcount. 426 */ 427 struct kref ref; 428 struct list_head entry; 429 struct mutex lock; 430 struct list_head ctrls; 431 struct list_head nsheads; 432 char subnqn[NVMF_NQN_SIZE]; 433 char serial[20]; 434 char model[40]; 435 char firmware_rev[8]; 436 u8 cmic; 437 enum nvme_subsys_type subtype; 438 u16 vendor_id; 439 u16 awupf; /* 0's based awupf value. */ 440 struct ida ns_ida; 441 #ifdef CONFIG_NVME_MULTIPATH 442 enum nvme_iopolicy iopolicy; 443 #endif 444 }; 445 446 /* 447 * Container structure for uniqueue namespace identifiers. 448 */ 449 struct nvme_ns_ids { 450 u8 eui64[8]; 451 u8 nguid[16]; 452 uuid_t uuid; 453 u8 csi; 454 }; 455 456 /* 457 * Anchor structure for namespaces. There is one for each namespace in a 458 * NVMe subsystem that any of our controllers can see, and the namespace 459 * structure for each controller is chained of it. For private namespaces 460 * there is a 1:1 relation to our namespace structures, that is ->list 461 * only ever has a single entry for private namespaces. 462 */ 463 struct nvme_ns_head { 464 struct list_head list; 465 struct srcu_struct srcu; 466 struct nvme_subsystem *subsys; 467 unsigned ns_id; 468 struct nvme_ns_ids ids; 469 struct list_head entry; 470 struct kref ref; 471 bool shared; 472 int instance; 473 struct nvme_effects_log *effects; 474 475 struct cdev cdev; 476 struct device cdev_device; 477 478 struct gendisk *disk; 479 #ifdef CONFIG_NVME_MULTIPATH 480 struct bio_list requeue_list; 481 spinlock_t requeue_lock; 482 struct work_struct requeue_work; 483 struct work_struct partition_scan_work; 484 struct mutex lock; 485 unsigned long flags; 486 #define NVME_NSHEAD_DISK_LIVE 0 487 struct nvme_ns __rcu *current_path[]; 488 #endif 489 }; 490 491 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 492 { 493 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 494 } 495 496 enum nvme_ns_features { 497 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 498 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 499 NVME_NS_DEAC = 1 << 2, /* DEAC bit in Write Zeores supported */ 500 }; 501 502 struct nvme_ns { 503 struct list_head list; 504 505 struct nvme_ctrl *ctrl; 506 struct request_queue *queue; 507 struct gendisk *disk; 508 #ifdef CONFIG_NVME_MULTIPATH 509 enum nvme_ana_state ana_state; 510 u32 ana_grpid; 511 #endif 512 struct list_head siblings; 513 struct kref kref; 514 struct nvme_ns_head *head; 515 516 int lba_shift; 517 u16 ms; 518 u16 pi_size; 519 u16 sgs; 520 u32 sws; 521 u8 pi_type; 522 u8 guard_type; 523 #ifdef CONFIG_BLK_DEV_ZONED 524 u64 zsze; 525 #endif 526 unsigned long features; 527 unsigned long flags; 528 #define NVME_NS_REMOVING 0 529 #define NVME_NS_ANA_PENDING 2 530 #define NVME_NS_FORCE_RO 3 531 #define NVME_NS_READY 4 532 533 struct cdev cdev; 534 struct device cdev_device; 535 536 struct nvme_fault_inject fault_inject; 537 538 }; 539 540 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 541 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 542 { 543 return ns->pi_type && ns->ms == ns->pi_size; 544 } 545 546 struct nvme_ctrl_ops { 547 const char *name; 548 struct module *module; 549 unsigned int flags; 550 #define NVME_F_FABRICS (1 << 0) 551 #define NVME_F_METADATA_SUPPORTED (1 << 1) 552 #define NVME_F_BLOCKING (1 << 2) 553 554 const struct attribute_group **dev_attr_groups; 555 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 556 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 557 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 558 void (*free_ctrl)(struct nvme_ctrl *ctrl); 559 void (*submit_async_event)(struct nvme_ctrl *ctrl); 560 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 561 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 562 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 563 void (*print_device_info)(struct nvme_ctrl *ctrl); 564 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 565 }; 566 567 /* 568 * nvme command_id is constructed as such: 569 * | xxxx | xxxxxxxxxxxx | 570 * gen request tag 571 */ 572 #define nvme_genctr_mask(gen) (gen & 0xf) 573 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 574 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 575 #define nvme_tag_from_cid(cid) (cid & 0xfff) 576 577 static inline u16 nvme_cid(struct request *rq) 578 { 579 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 580 } 581 582 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 583 u16 command_id) 584 { 585 u8 genctr = nvme_genctr_from_cid(command_id); 586 u16 tag = nvme_tag_from_cid(command_id); 587 struct request *rq; 588 589 rq = blk_mq_tag_to_rq(tags, tag); 590 if (unlikely(!rq)) { 591 pr_err("could not locate request for tag %#x\n", 592 tag); 593 return NULL; 594 } 595 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 596 dev_err(nvme_req(rq)->ctrl->device, 597 "request %#x genctr mismatch (got %#x expected %#x)\n", 598 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 599 return NULL; 600 } 601 return rq; 602 } 603 604 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 605 u16 command_id) 606 { 607 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 608 } 609 610 /* 611 * Return the length of the string without the space padding 612 */ 613 static inline int nvme_strlen(char *s, int len) 614 { 615 while (s[len - 1] == ' ') 616 len--; 617 return len; 618 } 619 620 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 621 { 622 struct nvme_subsystem *subsys = ctrl->subsys; 623 624 if (ctrl->ops->print_device_info) { 625 ctrl->ops->print_device_info(ctrl); 626 return; 627 } 628 629 dev_err(ctrl->device, 630 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 631 nvme_strlen(subsys->model, sizeof(subsys->model)), 632 subsys->model, nvme_strlen(subsys->firmware_rev, 633 sizeof(subsys->firmware_rev)), 634 subsys->firmware_rev); 635 } 636 637 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 638 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 639 const char *dev_name); 640 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 641 void nvme_should_fail(struct request *req); 642 #else 643 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 644 const char *dev_name) 645 { 646 } 647 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 648 { 649 } 650 static inline void nvme_should_fail(struct request *req) {} 651 #endif 652 653 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 654 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 655 656 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 657 { 658 int ret; 659 660 if (!ctrl->subsystem) 661 return -ENOTTY; 662 if (!nvme_wait_reset(ctrl)) 663 return -EBUSY; 664 665 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 666 if (ret) 667 return ret; 668 669 return nvme_try_sched_reset(ctrl); 670 } 671 672 /* 673 * Convert a 512B sector number to a device logical block number. 674 */ 675 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 676 { 677 return sector >> (ns->lba_shift - SECTOR_SHIFT); 678 } 679 680 /* 681 * Convert a device logical block number to a 512B sector number. 682 */ 683 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 684 { 685 return lba << (ns->lba_shift - SECTOR_SHIFT); 686 } 687 688 /* 689 * Convert byte length to nvme's 0-based num dwords 690 */ 691 static inline u32 nvme_bytes_to_numd(size_t len) 692 { 693 return (len >> 2) - 1; 694 } 695 696 static inline bool nvme_is_ana_error(u16 status) 697 { 698 switch (status & 0x7ff) { 699 case NVME_SC_ANA_TRANSITION: 700 case NVME_SC_ANA_INACCESSIBLE: 701 case NVME_SC_ANA_PERSISTENT_LOSS: 702 return true; 703 default: 704 return false; 705 } 706 } 707 708 static inline bool nvme_is_path_error(u16 status) 709 { 710 /* check for a status code type of 'path related status' */ 711 return (status & 0x700) == 0x300; 712 } 713 714 /* 715 * Fill in the status and result information from the CQE, and then figure out 716 * if blk-mq will need to use IPI magic to complete the request, and if yes do 717 * so. If not let the caller complete the request without an indirect function 718 * call. 719 */ 720 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 721 union nvme_result result) 722 { 723 struct nvme_request *rq = nvme_req(req); 724 struct nvme_ctrl *ctrl = rq->ctrl; 725 726 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 727 rq->genctr++; 728 729 rq->status = le16_to_cpu(status) >> 1; 730 rq->result = result; 731 /* inject error when permitted by fault injection framework */ 732 nvme_should_fail(req); 733 if (unlikely(blk_should_fake_timeout(req->q))) 734 return true; 735 return blk_mq_complete_request_remote(req); 736 } 737 738 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 739 { 740 get_device(ctrl->device); 741 } 742 743 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 744 { 745 put_device(ctrl->device); 746 } 747 748 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 749 { 750 return !qid && 751 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 752 } 753 754 /* 755 * Returns true for sink states that can't ever transition back to live. 756 */ 757 static inline bool nvme_state_terminal(struct nvme_ctrl *ctrl) 758 { 759 switch (nvme_ctrl_state(ctrl)) { 760 case NVME_CTRL_NEW: 761 case NVME_CTRL_LIVE: 762 case NVME_CTRL_RESETTING: 763 case NVME_CTRL_CONNECTING: 764 return false; 765 case NVME_CTRL_DELETING: 766 case NVME_CTRL_DELETING_NOIO: 767 case NVME_CTRL_DEAD: 768 return true; 769 default: 770 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 771 return true; 772 } 773 } 774 775 void nvme_end_req(struct request *req); 776 void nvme_complete_rq(struct request *req); 777 void nvme_complete_batch_req(struct request *req); 778 779 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 780 void (*fn)(struct request *rq)) 781 { 782 struct request *req; 783 784 rq_list_for_each(&iob->req_list, req) { 785 fn(req); 786 nvme_complete_batch_req(req); 787 } 788 blk_mq_end_request_batch(iob); 789 } 790 791 blk_status_t nvme_host_path_error(struct request *req); 792 bool nvme_cancel_request(struct request *req, void *data); 793 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 794 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 795 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 796 enum nvme_ctrl_state new_state); 797 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 798 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 799 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 800 const struct nvme_ctrl_ops *ops, unsigned long quirks); 801 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 802 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 803 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 804 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 805 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 806 const struct blk_mq_ops *ops, unsigned int cmd_size); 807 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 808 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 809 const struct blk_mq_ops *ops, unsigned int nr_maps, 810 unsigned int cmd_size); 811 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 812 813 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 814 815 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 816 volatile union nvme_result *res); 817 818 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 819 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 820 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 821 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 822 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 823 void nvme_sync_queues(struct nvme_ctrl *ctrl); 824 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 825 void nvme_unfreeze(struct nvme_ctrl *ctrl); 826 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 827 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 828 void nvme_start_freeze(struct nvme_ctrl *ctrl); 829 830 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 831 { 832 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 833 } 834 835 #define NVME_QID_ANY -1 836 void nvme_init_request(struct request *req, struct nvme_command *cmd); 837 void nvme_cleanup_cmd(struct request *req); 838 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 839 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 840 struct request *req); 841 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 842 bool queue_live); 843 844 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 845 bool queue_live) 846 { 847 if (likely(ctrl->state == NVME_CTRL_LIVE)) 848 return true; 849 if (ctrl->ops->flags & NVME_F_FABRICS && 850 ctrl->state == NVME_CTRL_DELETING) 851 return queue_live; 852 return __nvme_check_ready(ctrl, rq, queue_live); 853 } 854 855 /* 856 * NSID shall be unique for all shared namespaces, or if at least one of the 857 * following conditions is met: 858 * 1. Namespace Management is supported by the controller 859 * 2. ANA is supported by the controller 860 * 3. NVM Set are supported by the controller 861 * 862 * In other case, private namespace are not required to report a unique NSID. 863 */ 864 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 865 struct nvme_ns_head *head) 866 { 867 return head->shared || 868 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 869 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 870 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 871 } 872 873 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 874 void *buf, unsigned bufflen); 875 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 876 union nvme_result *result, void *buffer, unsigned bufflen, 877 int qid, int at_head, 878 blk_mq_req_flags_t flags); 879 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 880 unsigned int dword11, void *buffer, size_t buflen, 881 u32 *result); 882 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 883 unsigned int dword11, void *buffer, size_t buflen, 884 u32 *result); 885 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 886 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 887 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 888 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 889 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 890 void nvme_queue_scan(struct nvme_ctrl *ctrl); 891 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 892 void *log, size_t size, u64 offset); 893 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 894 void nvme_put_ns_head(struct nvme_ns_head *head); 895 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 896 const struct file_operations *fops, struct module *owner); 897 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 898 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 899 unsigned int cmd, unsigned long arg); 900 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 901 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 902 unsigned int cmd, unsigned long arg); 903 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 904 unsigned long arg); 905 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 906 unsigned long arg); 907 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 908 struct io_comp_batch *iob, unsigned int poll_flags); 909 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 910 unsigned int issue_flags); 911 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 912 unsigned int issue_flags); 913 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 914 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 915 916 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 917 extern const struct pr_ops nvme_pr_ops; 918 extern const struct block_device_operations nvme_ns_head_ops; 919 extern const struct attribute_group nvme_dev_attrs_group; 920 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 921 extern const struct attribute_group *nvme_dev_attr_groups[]; 922 extern const struct block_device_operations nvme_bdev_ops; 923 924 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 925 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 926 #ifdef CONFIG_NVME_MULTIPATH 927 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 928 { 929 return ctrl->ana_log_buf != NULL; 930 } 931 932 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 933 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 934 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 935 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 936 void nvme_failover_req(struct request *req); 937 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 938 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 939 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 940 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 941 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 942 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 943 void nvme_mpath_update(struct nvme_ctrl *ctrl); 944 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 945 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 946 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 947 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 948 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 949 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 950 void nvme_mpath_start_request(struct request *rq); 951 void nvme_mpath_end_request(struct request *rq); 952 953 static inline void nvme_trace_bio_complete(struct request *req) 954 { 955 struct nvme_ns *ns = req->q->queuedata; 956 957 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 958 trace_block_bio_complete(ns->head->disk->queue, req->bio); 959 } 960 961 extern bool multipath; 962 extern struct device_attribute dev_attr_ana_grpid; 963 extern struct device_attribute dev_attr_ana_state; 964 extern struct device_attribute subsys_attr_iopolicy; 965 966 #else 967 #define multipath false 968 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 969 { 970 return false; 971 } 972 static inline void nvme_failover_req(struct request *req) 973 { 974 } 975 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 976 { 977 } 978 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 979 struct nvme_ns_head *head) 980 { 981 return 0; 982 } 983 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 984 { 985 } 986 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 987 { 988 } 989 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 990 { 991 return false; 992 } 993 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 994 { 995 } 996 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 997 { 998 } 999 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 1000 { 1001 } 1002 static inline void nvme_trace_bio_complete(struct request *req) 1003 { 1004 } 1005 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 1006 { 1007 } 1008 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 1009 struct nvme_id_ctrl *id) 1010 { 1011 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 1012 dev_warn(ctrl->device, 1013 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 1014 return 0; 1015 } 1016 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 1017 { 1018 } 1019 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 1020 { 1021 } 1022 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 1023 { 1024 } 1025 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 1026 { 1027 } 1028 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 1029 { 1030 } 1031 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 1032 { 1033 } 1034 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 1035 { 1036 } 1037 static inline void nvme_mpath_start_request(struct request *rq) 1038 { 1039 } 1040 static inline void nvme_mpath_end_request(struct request *rq) 1041 { 1042 } 1043 #endif /* CONFIG_NVME_MULTIPATH */ 1044 1045 int nvme_revalidate_zones(struct nvme_ns *ns); 1046 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 1047 unsigned int nr_zones, report_zones_cb cb, void *data); 1048 #ifdef CONFIG_BLK_DEV_ZONED 1049 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 1050 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1051 struct nvme_command *cmnd, 1052 enum nvme_zone_mgmt_action action); 1053 #else 1054 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1055 struct request *req, struct nvme_command *cmnd, 1056 enum nvme_zone_mgmt_action action) 1057 { 1058 return BLK_STS_NOTSUPP; 1059 } 1060 1061 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 1062 { 1063 dev_warn(ns->ctrl->device, 1064 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 1065 return -EPROTONOSUPPORT; 1066 } 1067 #endif 1068 1069 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1070 { 1071 return dev_to_disk(dev)->private_data; 1072 } 1073 1074 #ifdef CONFIG_NVME_HWMON 1075 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1076 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1077 #else 1078 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1079 { 1080 return 0; 1081 } 1082 1083 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1084 { 1085 } 1086 #endif 1087 1088 static inline void nvme_start_request(struct request *rq) 1089 { 1090 if (rq->cmd_flags & REQ_NVME_MPATH) 1091 nvme_mpath_start_request(rq); 1092 blk_mq_start_request(rq); 1093 } 1094 1095 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1096 { 1097 return ctrl->sgls & ((1 << 0) | (1 << 1)); 1098 } 1099 1100 #ifdef CONFIG_NVME_AUTH 1101 int __init nvme_init_auth(void); 1102 void __exit nvme_exit_auth(void); 1103 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1104 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1105 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1106 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1107 void nvme_auth_free(struct nvme_ctrl *ctrl); 1108 #else 1109 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1110 { 1111 return 0; 1112 } 1113 static inline int __init nvme_init_auth(void) 1114 { 1115 return 0; 1116 } 1117 static inline void __exit nvme_exit_auth(void) 1118 { 1119 } 1120 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1121 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1122 { 1123 return -EPROTONOSUPPORT; 1124 } 1125 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1126 { 1127 return NVME_SC_AUTH_REQUIRED; 1128 } 1129 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1130 #endif 1131 1132 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1133 u8 opcode); 1134 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1135 int nvme_execute_rq(struct request *rq, bool at_head); 1136 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1137 struct nvme_command *cmd, int status); 1138 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1139 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1140 bool nvme_get_ns(struct nvme_ns *ns); 1141 void nvme_put_ns(struct nvme_ns *ns); 1142 1143 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1144 { 1145 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1146 } 1147 1148 #ifdef CONFIG_NVME_VERBOSE_ERRORS 1149 const unsigned char *nvme_get_error_status_str(u16 status); 1150 const unsigned char *nvme_get_opcode_str(u8 opcode); 1151 const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1152 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode); 1153 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1154 static inline const unsigned char *nvme_get_error_status_str(u16 status) 1155 { 1156 return "I/O Error"; 1157 } 1158 static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1159 { 1160 return "I/O Cmd"; 1161 } 1162 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1163 { 1164 return "Admin Cmd"; 1165 } 1166 1167 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode) 1168 { 1169 return "Fabrics Cmd"; 1170 } 1171 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1172 1173 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype) 1174 { 1175 if (opcode == nvme_fabrics_command) 1176 return nvme_get_fabrics_opcode_str(fctype); 1177 return qid ? nvme_get_opcode_str(opcode) : 1178 nvme_get_admin_opcode_str(opcode); 1179 } 1180 #endif /* _NVME_H */ 1181