1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern const struct pr_ops nvme_pr_ops; 23 24 extern unsigned int nvme_io_timeout; 25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 26 27 extern unsigned int admin_timeout; 28 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 29 30 #define NVME_DEFAULT_KATO 5 31 32 #ifdef CONFIG_ARCH_NO_SG_CHAIN 33 #define NVME_INLINE_SG_CNT 0 34 #define NVME_INLINE_METADATA_SG_CNT 0 35 #else 36 #define NVME_INLINE_SG_CNT 2 37 #define NVME_INLINE_METADATA_SG_CNT 1 38 #endif 39 40 /* 41 * Default to a 4K page size, with the intention to update this 42 * path in the future to accommodate architectures with differing 43 * kernel and IO page sizes. 44 */ 45 #define NVME_CTRL_PAGE_SHIFT 12 46 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 47 48 extern struct workqueue_struct *nvme_wq; 49 extern struct workqueue_struct *nvme_reset_wq; 50 extern struct workqueue_struct *nvme_delete_wq; 51 52 /* 53 * List of workarounds for devices that required behavior not specified in 54 * the standard. 55 */ 56 enum nvme_quirks { 57 /* 58 * Prefers I/O aligned to a stripe size specified in a vendor 59 * specific Identify field. 60 */ 61 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 62 63 /* 64 * The controller doesn't handle Identify value others than 0 or 1 65 * correctly. 66 */ 67 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 68 69 /* 70 * The controller deterministically returns O's on reads to 71 * logical blocks that deallocate was called on. 72 */ 73 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 74 75 /* 76 * The controller needs a delay before starts checking the device 77 * readiness, which is done by reading the NVME_CSTS_RDY bit. 78 */ 79 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 80 81 /* 82 * APST should not be used. 83 */ 84 NVME_QUIRK_NO_APST = (1 << 4), 85 86 /* 87 * The deepest sleep state should not be used. 88 */ 89 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 90 91 /* 92 * Set MEDIUM priority on SQ creation 93 */ 94 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 95 96 /* 97 * Ignore device provided subnqn. 98 */ 99 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 100 101 /* 102 * Broken Write Zeroes. 103 */ 104 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 105 106 /* 107 * Force simple suspend/resume path. 108 */ 109 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 110 111 /* 112 * Use only one interrupt vector for all queues 113 */ 114 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 115 116 /* 117 * Use non-standard 128 bytes SQEs. 118 */ 119 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 120 121 /* 122 * Prevent tag overlap between queues 123 */ 124 NVME_QUIRK_SHARED_TAGS = (1 << 13), 125 126 /* 127 * Don't change the value of the temperature threshold feature 128 */ 129 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 130 131 /* 132 * The controller doesn't handle the Identify Namespace 133 * Identification Descriptor list subcommand despite claiming 134 * NVMe 1.3 compliance. 135 */ 136 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 137 138 /* 139 * The controller does not properly handle DMA addresses over 140 * 48 bits. 141 */ 142 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 143 144 /* 145 * The controller requires the command_id value be limited, so skip 146 * encoding the generation sequence number. 147 */ 148 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 149 150 /* 151 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 152 */ 153 NVME_QUIRK_BOGUS_NID = (1 << 18), 154 155 /* 156 * No temperature thresholds for channels other than 0 (Composite). 157 */ 158 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 159 160 /* 161 * Disables simple suspend/resume path. 162 */ 163 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 164 }; 165 166 /* 167 * Common request structure for NVMe passthrough. All drivers must have 168 * this structure as the first member of their request-private data. 169 */ 170 struct nvme_request { 171 struct nvme_command *cmd; 172 union nvme_result result; 173 u8 genctr; 174 u8 retries; 175 u8 flags; 176 u16 status; 177 #ifdef CONFIG_NVME_MULTIPATH 178 unsigned long start_time; 179 #endif 180 struct nvme_ctrl *ctrl; 181 }; 182 183 /* 184 * Mark a bio as coming in through the mpath node. 185 */ 186 #define REQ_NVME_MPATH REQ_DRV 187 188 enum { 189 NVME_REQ_CANCELLED = (1 << 0), 190 NVME_REQ_USERCMD = (1 << 1), 191 NVME_MPATH_IO_STATS = (1 << 2), 192 }; 193 194 static inline struct nvme_request *nvme_req(struct request *req) 195 { 196 return blk_mq_rq_to_pdu(req); 197 } 198 199 static inline u16 nvme_req_qid(struct request *req) 200 { 201 if (!req->q->queuedata) 202 return 0; 203 204 return req->mq_hctx->queue_num + 1; 205 } 206 207 /* The below value is the specific amount of delay needed before checking 208 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 209 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 210 * found empirically. 211 */ 212 #define NVME_QUIRK_DELAY_AMOUNT 2300 213 214 /* 215 * enum nvme_ctrl_state: Controller state 216 * 217 * @NVME_CTRL_NEW: New controller just allocated, initial state 218 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 219 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 220 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 221 * transport 222 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 223 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 224 * disabled/failed immediately. This state comes 225 * after all async event processing took place and 226 * before ns removal and the controller deletion 227 * progress 228 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 229 * shutdown or removal. In this case we forcibly 230 * kill all inflight I/O as they have no chance to 231 * complete 232 */ 233 enum nvme_ctrl_state { 234 NVME_CTRL_NEW, 235 NVME_CTRL_LIVE, 236 NVME_CTRL_RESETTING, 237 NVME_CTRL_CONNECTING, 238 NVME_CTRL_DELETING, 239 NVME_CTRL_DELETING_NOIO, 240 NVME_CTRL_DEAD, 241 }; 242 243 struct nvme_fault_inject { 244 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 245 struct fault_attr attr; 246 struct dentry *parent; 247 bool dont_retry; /* DNR, do not retry */ 248 u16 status; /* status code */ 249 #endif 250 }; 251 252 enum nvme_ctrl_flags { 253 NVME_CTRL_FAILFAST_EXPIRED = 0, 254 NVME_CTRL_ADMIN_Q_STOPPED = 1, 255 NVME_CTRL_STARTED_ONCE = 2, 256 NVME_CTRL_STOPPED = 3, 257 NVME_CTRL_SKIP_ID_CNS_CS = 4, 258 NVME_CTRL_DIRTY_CAPABILITY = 5, 259 }; 260 261 struct nvme_ctrl { 262 bool comp_seen; 263 bool identified; 264 enum nvme_ctrl_state state; 265 spinlock_t lock; 266 struct mutex scan_lock; 267 const struct nvme_ctrl_ops *ops; 268 struct request_queue *admin_q; 269 struct request_queue *connect_q; 270 struct request_queue *fabrics_q; 271 struct device *dev; 272 int instance; 273 int numa_node; 274 struct blk_mq_tag_set *tagset; 275 struct blk_mq_tag_set *admin_tagset; 276 struct list_head namespaces; 277 struct rw_semaphore namespaces_rwsem; 278 struct device ctrl_device; 279 struct device *device; /* char device */ 280 #ifdef CONFIG_NVME_HWMON 281 struct device *hwmon_device; 282 #endif 283 struct cdev cdev; 284 struct work_struct reset_work; 285 struct work_struct delete_work; 286 wait_queue_head_t state_wq; 287 288 struct nvme_subsystem *subsys; 289 struct list_head subsys_entry; 290 291 struct opal_dev *opal_dev; 292 293 char name[12]; 294 u16 cntlid; 295 296 u16 mtfa; 297 u32 ctrl_config; 298 u32 queue_count; 299 300 u64 cap; 301 u32 max_hw_sectors; 302 u32 max_segments; 303 u32 max_integrity_segments; 304 u32 max_discard_sectors; 305 u32 max_discard_segments; 306 u32 max_zeroes_sectors; 307 #ifdef CONFIG_BLK_DEV_ZONED 308 u32 max_zone_append; 309 #endif 310 u16 crdt[3]; 311 u16 oncs; 312 u32 dmrsl; 313 u16 oacs; 314 u16 sqsize; 315 u32 max_namespaces; 316 atomic_t abort_limit; 317 u8 vwc; 318 u32 vs; 319 u32 sgls; 320 u16 kas; 321 u8 npss; 322 u8 apsta; 323 u16 wctemp; 324 u16 cctemp; 325 u32 oaes; 326 u32 aen_result; 327 u32 ctratt; 328 unsigned int shutdown_timeout; 329 unsigned int kato; 330 bool subsystem; 331 unsigned long quirks; 332 struct nvme_id_power_state psd[32]; 333 struct nvme_effects_log *effects; 334 struct xarray cels; 335 struct work_struct scan_work; 336 struct work_struct async_event_work; 337 struct delayed_work ka_work; 338 struct delayed_work failfast_work; 339 struct nvme_command ka_cmd; 340 unsigned long ka_last_check_time; 341 struct work_struct fw_act_work; 342 unsigned long events; 343 344 #ifdef CONFIG_NVME_MULTIPATH 345 /* asymmetric namespace access: */ 346 u8 anacap; 347 u8 anatt; 348 u32 anagrpmax; 349 u32 nanagrpid; 350 struct mutex ana_lock; 351 struct nvme_ana_rsp_hdr *ana_log_buf; 352 size_t ana_log_size; 353 struct timer_list anatt_timer; 354 struct work_struct ana_work; 355 #endif 356 357 #ifdef CONFIG_NVME_AUTH 358 struct work_struct dhchap_auth_work; 359 struct mutex dhchap_auth_mutex; 360 struct nvme_dhchap_queue_context *dhchap_ctxs; 361 struct nvme_dhchap_key *host_key; 362 struct nvme_dhchap_key *ctrl_key; 363 u16 transaction; 364 #endif 365 366 /* Power saving configuration */ 367 u64 ps_max_latency_us; 368 bool apst_enabled; 369 370 /* PCIe only: */ 371 u16 hmmaxd; 372 u32 hmpre; 373 u32 hmmin; 374 u32 hmminds; 375 376 /* Fabrics only */ 377 u32 ioccsz; 378 u32 iorcsz; 379 u16 icdoff; 380 u16 maxcmd; 381 int nr_reconnects; 382 unsigned long flags; 383 struct nvmf_ctrl_options *opts; 384 385 struct page *discard_page; 386 unsigned long discard_page_busy; 387 388 struct nvme_fault_inject fault_inject; 389 390 enum nvme_ctrl_type cntrltype; 391 enum nvme_dctype dctype; 392 }; 393 394 enum nvme_iopolicy { 395 NVME_IOPOLICY_NUMA, 396 NVME_IOPOLICY_RR, 397 }; 398 399 struct nvme_subsystem { 400 int instance; 401 struct device dev; 402 /* 403 * Because we unregister the device on the last put we need 404 * a separate refcount. 405 */ 406 struct kref ref; 407 struct list_head entry; 408 struct mutex lock; 409 struct list_head ctrls; 410 struct list_head nsheads; 411 char subnqn[NVMF_NQN_SIZE]; 412 char serial[20]; 413 char model[40]; 414 char firmware_rev[8]; 415 u8 cmic; 416 enum nvme_subsys_type subtype; 417 u16 vendor_id; 418 u16 awupf; /* 0's based awupf value. */ 419 struct ida ns_ida; 420 #ifdef CONFIG_NVME_MULTIPATH 421 enum nvme_iopolicy iopolicy; 422 #endif 423 }; 424 425 /* 426 * Container structure for uniqueue namespace identifiers. 427 */ 428 struct nvme_ns_ids { 429 u8 eui64[8]; 430 u8 nguid[16]; 431 uuid_t uuid; 432 u8 csi; 433 }; 434 435 /* 436 * Anchor structure for namespaces. There is one for each namespace in a 437 * NVMe subsystem that any of our controllers can see, and the namespace 438 * structure for each controller is chained of it. For private namespaces 439 * there is a 1:1 relation to our namespace structures, that is ->list 440 * only ever has a single entry for private namespaces. 441 */ 442 struct nvme_ns_head { 443 struct list_head list; 444 struct srcu_struct srcu; 445 struct nvme_subsystem *subsys; 446 unsigned ns_id; 447 struct nvme_ns_ids ids; 448 struct list_head entry; 449 struct kref ref; 450 bool shared; 451 int instance; 452 struct nvme_effects_log *effects; 453 454 struct cdev cdev; 455 struct device cdev_device; 456 457 struct gendisk *disk; 458 #ifdef CONFIG_NVME_MULTIPATH 459 struct bio_list requeue_list; 460 spinlock_t requeue_lock; 461 struct work_struct requeue_work; 462 struct mutex lock; 463 unsigned long flags; 464 #define NVME_NSHEAD_DISK_LIVE 0 465 struct nvme_ns __rcu *current_path[]; 466 #endif 467 }; 468 469 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 470 { 471 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 472 } 473 474 enum nvme_ns_features { 475 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 476 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 477 NVME_NS_DEAC, /* DEAC bit in Write Zeores supported */ 478 }; 479 480 struct nvme_ns { 481 struct list_head list; 482 483 struct nvme_ctrl *ctrl; 484 struct request_queue *queue; 485 struct gendisk *disk; 486 #ifdef CONFIG_NVME_MULTIPATH 487 enum nvme_ana_state ana_state; 488 u32 ana_grpid; 489 #endif 490 struct list_head siblings; 491 struct kref kref; 492 struct nvme_ns_head *head; 493 494 int lba_shift; 495 u16 ms; 496 u16 pi_size; 497 u16 sgs; 498 u32 sws; 499 u8 pi_type; 500 u8 guard_type; 501 #ifdef CONFIG_BLK_DEV_ZONED 502 u64 zsze; 503 #endif 504 unsigned long features; 505 unsigned long flags; 506 #define NVME_NS_REMOVING 0 507 #define NVME_NS_ANA_PENDING 2 508 #define NVME_NS_FORCE_RO 3 509 #define NVME_NS_READY 4 510 511 struct cdev cdev; 512 struct device cdev_device; 513 514 struct nvme_fault_inject fault_inject; 515 516 }; 517 518 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 519 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 520 { 521 return ns->pi_type && ns->ms == ns->pi_size; 522 } 523 524 struct nvme_ctrl_ops { 525 const char *name; 526 struct module *module; 527 unsigned int flags; 528 #define NVME_F_FABRICS (1 << 0) 529 #define NVME_F_METADATA_SUPPORTED (1 << 1) 530 #define NVME_F_BLOCKING (1 << 2) 531 532 const struct attribute_group **dev_attr_groups; 533 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 534 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 535 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 536 void (*free_ctrl)(struct nvme_ctrl *ctrl); 537 void (*submit_async_event)(struct nvme_ctrl *ctrl); 538 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 539 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 540 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 541 void (*print_device_info)(struct nvme_ctrl *ctrl); 542 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 543 }; 544 545 /* 546 * nvme command_id is constructed as such: 547 * | xxxx | xxxxxxxxxxxx | 548 * gen request tag 549 */ 550 #define nvme_genctr_mask(gen) (gen & 0xf) 551 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 552 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 553 #define nvme_tag_from_cid(cid) (cid & 0xfff) 554 555 static inline u16 nvme_cid(struct request *rq) 556 { 557 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 558 } 559 560 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 561 u16 command_id) 562 { 563 u8 genctr = nvme_genctr_from_cid(command_id); 564 u16 tag = nvme_tag_from_cid(command_id); 565 struct request *rq; 566 567 rq = blk_mq_tag_to_rq(tags, tag); 568 if (unlikely(!rq)) { 569 pr_err("could not locate request for tag %#x\n", 570 tag); 571 return NULL; 572 } 573 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 574 dev_err(nvme_req(rq)->ctrl->device, 575 "request %#x genctr mismatch (got %#x expected %#x)\n", 576 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 577 return NULL; 578 } 579 return rq; 580 } 581 582 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 583 u16 command_id) 584 { 585 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 586 } 587 588 /* 589 * Return the length of the string without the space padding 590 */ 591 static inline int nvme_strlen(char *s, int len) 592 { 593 while (s[len - 1] == ' ') 594 len--; 595 return len; 596 } 597 598 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 599 { 600 struct nvme_subsystem *subsys = ctrl->subsys; 601 602 if (ctrl->ops->print_device_info) { 603 ctrl->ops->print_device_info(ctrl); 604 return; 605 } 606 607 dev_err(ctrl->device, 608 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 609 nvme_strlen(subsys->model, sizeof(subsys->model)), 610 subsys->model, nvme_strlen(subsys->firmware_rev, 611 sizeof(subsys->firmware_rev)), 612 subsys->firmware_rev); 613 } 614 615 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 616 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 617 const char *dev_name); 618 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 619 void nvme_should_fail(struct request *req); 620 #else 621 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 622 const char *dev_name) 623 { 624 } 625 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 626 { 627 } 628 static inline void nvme_should_fail(struct request *req) {} 629 #endif 630 631 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 632 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 633 634 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 635 { 636 int ret; 637 638 if (!ctrl->subsystem) 639 return -ENOTTY; 640 if (!nvme_wait_reset(ctrl)) 641 return -EBUSY; 642 643 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 644 if (ret) 645 return ret; 646 647 return nvme_try_sched_reset(ctrl); 648 } 649 650 /* 651 * Convert a 512B sector number to a device logical block number. 652 */ 653 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 654 { 655 return sector >> (ns->lba_shift - SECTOR_SHIFT); 656 } 657 658 /* 659 * Convert a device logical block number to a 512B sector number. 660 */ 661 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 662 { 663 return lba << (ns->lba_shift - SECTOR_SHIFT); 664 } 665 666 /* 667 * Convert byte length to nvme's 0-based num dwords 668 */ 669 static inline u32 nvme_bytes_to_numd(size_t len) 670 { 671 return (len >> 2) - 1; 672 } 673 674 static inline bool nvme_is_ana_error(u16 status) 675 { 676 switch (status & 0x7ff) { 677 case NVME_SC_ANA_TRANSITION: 678 case NVME_SC_ANA_INACCESSIBLE: 679 case NVME_SC_ANA_PERSISTENT_LOSS: 680 return true; 681 default: 682 return false; 683 } 684 } 685 686 static inline bool nvme_is_path_error(u16 status) 687 { 688 /* check for a status code type of 'path related status' */ 689 return (status & 0x700) == 0x300; 690 } 691 692 /* 693 * Fill in the status and result information from the CQE, and then figure out 694 * if blk-mq will need to use IPI magic to complete the request, and if yes do 695 * so. If not let the caller complete the request without an indirect function 696 * call. 697 */ 698 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 699 union nvme_result result) 700 { 701 struct nvme_request *rq = nvme_req(req); 702 struct nvme_ctrl *ctrl = rq->ctrl; 703 704 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 705 rq->genctr++; 706 707 rq->status = le16_to_cpu(status) >> 1; 708 rq->result = result; 709 /* inject error when permitted by fault injection framework */ 710 nvme_should_fail(req); 711 if (unlikely(blk_should_fake_timeout(req->q))) 712 return true; 713 return blk_mq_complete_request_remote(req); 714 } 715 716 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 717 { 718 get_device(ctrl->device); 719 } 720 721 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 722 { 723 put_device(ctrl->device); 724 } 725 726 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 727 { 728 return !qid && 729 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 730 } 731 732 void nvme_complete_rq(struct request *req); 733 void nvme_complete_batch_req(struct request *req); 734 735 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 736 void (*fn)(struct request *rq)) 737 { 738 struct request *req; 739 740 rq_list_for_each(&iob->req_list, req) { 741 fn(req); 742 nvme_complete_batch_req(req); 743 } 744 blk_mq_end_request_batch(iob); 745 } 746 747 blk_status_t nvme_host_path_error(struct request *req); 748 bool nvme_cancel_request(struct request *req, void *data); 749 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 750 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 751 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 752 enum nvme_ctrl_state new_state); 753 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 754 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 755 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 756 const struct nvme_ctrl_ops *ops, unsigned long quirks); 757 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 758 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 759 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 760 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 761 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 762 const struct blk_mq_ops *ops, unsigned int cmd_size); 763 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 764 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 765 const struct blk_mq_ops *ops, unsigned int nr_maps, 766 unsigned int cmd_size); 767 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 768 769 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 770 771 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 772 volatile union nvme_result *res); 773 774 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 775 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 776 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 777 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 778 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 779 void nvme_sync_queues(struct nvme_ctrl *ctrl); 780 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 781 void nvme_unfreeze(struct nvme_ctrl *ctrl); 782 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 783 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 784 void nvme_start_freeze(struct nvme_ctrl *ctrl); 785 786 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 787 { 788 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 789 } 790 791 #define NVME_QID_ANY -1 792 void nvme_init_request(struct request *req, struct nvme_command *cmd); 793 void nvme_cleanup_cmd(struct request *req); 794 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 795 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 796 struct request *req); 797 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 798 bool queue_live); 799 800 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 801 bool queue_live) 802 { 803 if (likely(ctrl->state == NVME_CTRL_LIVE)) 804 return true; 805 if (ctrl->ops->flags & NVME_F_FABRICS && 806 ctrl->state == NVME_CTRL_DELETING) 807 return queue_live; 808 return __nvme_check_ready(ctrl, rq, queue_live); 809 } 810 811 /* 812 * NSID shall be unique for all shared namespaces, or if at least one of the 813 * following conditions is met: 814 * 1. Namespace Management is supported by the controller 815 * 2. ANA is supported by the controller 816 * 3. NVM Set are supported by the controller 817 * 818 * In other case, private namespace are not required to report a unique NSID. 819 */ 820 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 821 struct nvme_ns_head *head) 822 { 823 return head->shared || 824 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 825 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 826 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 827 } 828 829 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 830 void *buf, unsigned bufflen); 831 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 832 union nvme_result *result, void *buffer, unsigned bufflen, 833 int qid, int at_head, 834 blk_mq_req_flags_t flags); 835 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 836 unsigned int dword11, void *buffer, size_t buflen, 837 u32 *result); 838 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 839 unsigned int dword11, void *buffer, size_t buflen, 840 u32 *result); 841 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 842 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 843 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 844 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 845 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 846 void nvme_queue_scan(struct nvme_ctrl *ctrl); 847 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 848 void *log, size_t size, u64 offset); 849 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 850 void nvme_put_ns_head(struct nvme_ns_head *head); 851 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 852 const struct file_operations *fops, struct module *owner); 853 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 854 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 855 unsigned int cmd, unsigned long arg); 856 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 857 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 858 unsigned int cmd, unsigned long arg); 859 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 860 unsigned long arg); 861 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 862 unsigned long arg); 863 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 864 struct io_comp_batch *iob, unsigned int poll_flags); 865 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 866 unsigned int issue_flags); 867 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 868 unsigned int issue_flags); 869 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 870 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 871 872 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 873 extern const struct pr_ops nvme_pr_ops; 874 extern const struct block_device_operations nvme_ns_head_ops; 875 extern const struct attribute_group nvme_dev_attrs_group; 876 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 877 extern const struct attribute_group *nvme_dev_attr_groups[]; 878 extern const struct block_device_operations nvme_bdev_ops; 879 880 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 881 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 882 #ifdef CONFIG_NVME_MULTIPATH 883 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 884 { 885 return ctrl->ana_log_buf != NULL; 886 } 887 888 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 889 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 890 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 891 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 892 void nvme_failover_req(struct request *req); 893 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 894 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 895 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 896 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 897 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 898 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 899 void nvme_mpath_update(struct nvme_ctrl *ctrl); 900 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 901 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 902 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 903 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 904 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 905 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 906 void nvme_mpath_start_request(struct request *rq); 907 void nvme_mpath_end_request(struct request *rq); 908 909 static inline void nvme_trace_bio_complete(struct request *req) 910 { 911 struct nvme_ns *ns = req->q->queuedata; 912 913 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 914 trace_block_bio_complete(ns->head->disk->queue, req->bio); 915 } 916 917 extern bool multipath; 918 extern struct device_attribute dev_attr_ana_grpid; 919 extern struct device_attribute dev_attr_ana_state; 920 extern struct device_attribute subsys_attr_iopolicy; 921 922 #else 923 #define multipath false 924 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 925 { 926 return false; 927 } 928 static inline void nvme_failover_req(struct request *req) 929 { 930 } 931 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 932 { 933 } 934 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 935 struct nvme_ns_head *head) 936 { 937 return 0; 938 } 939 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 940 { 941 } 942 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 943 { 944 } 945 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 946 { 947 return false; 948 } 949 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 950 { 951 } 952 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 953 { 954 } 955 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 956 { 957 } 958 static inline void nvme_trace_bio_complete(struct request *req) 959 { 960 } 961 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 962 { 963 } 964 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 965 struct nvme_id_ctrl *id) 966 { 967 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 968 dev_warn(ctrl->device, 969 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 970 return 0; 971 } 972 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 973 { 974 } 975 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 976 { 977 } 978 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 979 { 980 } 981 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 982 { 983 } 984 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 985 { 986 } 987 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 988 { 989 } 990 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 991 { 992 } 993 static inline void nvme_mpath_start_request(struct request *rq) 994 { 995 } 996 static inline void nvme_mpath_end_request(struct request *rq) 997 { 998 } 999 #endif /* CONFIG_NVME_MULTIPATH */ 1000 1001 int nvme_revalidate_zones(struct nvme_ns *ns); 1002 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 1003 unsigned int nr_zones, report_zones_cb cb, void *data); 1004 #ifdef CONFIG_BLK_DEV_ZONED 1005 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 1006 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1007 struct nvme_command *cmnd, 1008 enum nvme_zone_mgmt_action action); 1009 #else 1010 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1011 struct request *req, struct nvme_command *cmnd, 1012 enum nvme_zone_mgmt_action action) 1013 { 1014 return BLK_STS_NOTSUPP; 1015 } 1016 1017 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 1018 { 1019 dev_warn(ns->ctrl->device, 1020 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 1021 return -EPROTONOSUPPORT; 1022 } 1023 #endif 1024 1025 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1026 { 1027 return dev_to_disk(dev)->private_data; 1028 } 1029 1030 #ifdef CONFIG_NVME_HWMON 1031 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1032 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1033 #else 1034 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1035 { 1036 return 0; 1037 } 1038 1039 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1040 { 1041 } 1042 #endif 1043 1044 static inline void nvme_start_request(struct request *rq) 1045 { 1046 if (rq->cmd_flags & REQ_NVME_MPATH) 1047 nvme_mpath_start_request(rq); 1048 blk_mq_start_request(rq); 1049 } 1050 1051 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1052 { 1053 return ctrl->sgls & ((1 << 0) | (1 << 1)); 1054 } 1055 1056 #ifdef CONFIG_NVME_AUTH 1057 int __init nvme_init_auth(void); 1058 void __exit nvme_exit_auth(void); 1059 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1060 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1061 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1062 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1063 void nvme_auth_free(struct nvme_ctrl *ctrl); 1064 #else 1065 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1066 { 1067 return 0; 1068 } 1069 static inline int __init nvme_init_auth(void) 1070 { 1071 return 0; 1072 } 1073 static inline void __exit nvme_exit_auth(void) 1074 { 1075 } 1076 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1077 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1078 { 1079 return -EPROTONOSUPPORT; 1080 } 1081 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1082 { 1083 return NVME_SC_AUTH_REQUIRED; 1084 } 1085 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1086 #endif 1087 1088 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1089 u8 opcode); 1090 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1091 int nvme_execute_rq(struct request *rq, bool at_head); 1092 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1093 struct nvme_command *cmd, int status); 1094 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1095 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1096 void nvme_put_ns(struct nvme_ns *ns); 1097 1098 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1099 { 1100 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1101 } 1102 1103 #ifdef CONFIG_NVME_VERBOSE_ERRORS 1104 const unsigned char *nvme_get_error_status_str(u16 status); 1105 const unsigned char *nvme_get_opcode_str(u8 opcode); 1106 const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1107 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode); 1108 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1109 static inline const unsigned char *nvme_get_error_status_str(u16 status) 1110 { 1111 return "I/O Error"; 1112 } 1113 static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1114 { 1115 return "I/O Cmd"; 1116 } 1117 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1118 { 1119 return "Admin Cmd"; 1120 } 1121 1122 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode) 1123 { 1124 return "Fabrics Cmd"; 1125 } 1126 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1127 1128 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype) 1129 { 1130 if (opcode == nvme_fabrics_command) 1131 return nvme_get_fabrics_opcode_str(fctype); 1132 return qid ? nvme_get_opcode_str(opcode) : 1133 nvme_get_admin_opcode_str(opcode); 1134 } 1135 #endif /* _NVME_H */ 1136