1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern const struct pr_ops nvme_pr_ops; 23 24 extern unsigned int nvme_io_timeout; 25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 26 27 extern unsigned int admin_timeout; 28 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 29 30 #define NVME_DEFAULT_KATO 5 31 32 #ifdef CONFIG_ARCH_NO_SG_CHAIN 33 #define NVME_INLINE_SG_CNT 0 34 #define NVME_INLINE_METADATA_SG_CNT 0 35 #else 36 #define NVME_INLINE_SG_CNT 2 37 #define NVME_INLINE_METADATA_SG_CNT 1 38 #endif 39 40 /* 41 * Default to a 4K page size, with the intention to update this 42 * path in the future to accommodate architectures with differing 43 * kernel and IO page sizes. 44 */ 45 #define NVME_CTRL_PAGE_SHIFT 12 46 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 47 48 extern struct workqueue_struct *nvme_wq; 49 extern struct workqueue_struct *nvme_reset_wq; 50 extern struct workqueue_struct *nvme_delete_wq; 51 52 /* 53 * List of workarounds for devices that required behavior not specified in 54 * the standard. 55 */ 56 enum nvme_quirks { 57 /* 58 * Prefers I/O aligned to a stripe size specified in a vendor 59 * specific Identify field. 60 */ 61 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 62 63 /* 64 * The controller doesn't handle Identify value others than 0 or 1 65 * correctly. 66 */ 67 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 68 69 /* 70 * The controller deterministically returns O's on reads to 71 * logical blocks that deallocate was called on. 72 */ 73 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 74 75 /* 76 * The controller needs a delay before starts checking the device 77 * readiness, which is done by reading the NVME_CSTS_RDY bit. 78 */ 79 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 80 81 /* 82 * APST should not be used. 83 */ 84 NVME_QUIRK_NO_APST = (1 << 4), 85 86 /* 87 * The deepest sleep state should not be used. 88 */ 89 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 90 91 /* 92 * Set MEDIUM priority on SQ creation 93 */ 94 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 95 96 /* 97 * Ignore device provided subnqn. 98 */ 99 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 100 101 /* 102 * Broken Write Zeroes. 103 */ 104 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 105 106 /* 107 * Force simple suspend/resume path. 108 */ 109 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 110 111 /* 112 * Use only one interrupt vector for all queues 113 */ 114 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 115 116 /* 117 * Use non-standard 128 bytes SQEs. 118 */ 119 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 120 121 /* 122 * Prevent tag overlap between queues 123 */ 124 NVME_QUIRK_SHARED_TAGS = (1 << 13), 125 126 /* 127 * Don't change the value of the temperature threshold feature 128 */ 129 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 130 131 /* 132 * The controller doesn't handle the Identify Namespace 133 * Identification Descriptor list subcommand despite claiming 134 * NVMe 1.3 compliance. 135 */ 136 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 137 138 /* 139 * The controller does not properly handle DMA addresses over 140 * 48 bits. 141 */ 142 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 143 144 /* 145 * The controller requires the command_id value be limited, so skip 146 * encoding the generation sequence number. 147 */ 148 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 149 150 /* 151 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 152 */ 153 NVME_QUIRK_BOGUS_NID = (1 << 18), 154 155 /* 156 * No temperature thresholds for channels other than 0 (Composite). 157 */ 158 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 159 160 /* 161 * Disables simple suspend/resume path. 162 */ 163 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 164 165 /* 166 * MSI (but not MSI-X) interrupts are broken and never fire. 167 */ 168 NVME_QUIRK_BROKEN_MSI = (1 << 21), 169 }; 170 171 /* 172 * Common request structure for NVMe passthrough. All drivers must have 173 * this structure as the first member of their request-private data. 174 */ 175 struct nvme_request { 176 struct nvme_command *cmd; 177 union nvme_result result; 178 u8 genctr; 179 u8 retries; 180 u8 flags; 181 u16 status; 182 #ifdef CONFIG_NVME_MULTIPATH 183 unsigned long start_time; 184 #endif 185 struct nvme_ctrl *ctrl; 186 }; 187 188 /* 189 * Mark a bio as coming in through the mpath node. 190 */ 191 #define REQ_NVME_MPATH REQ_DRV 192 193 enum { 194 NVME_REQ_CANCELLED = (1 << 0), 195 NVME_REQ_USERCMD = (1 << 1), 196 NVME_MPATH_IO_STATS = (1 << 2), 197 }; 198 199 static inline struct nvme_request *nvme_req(struct request *req) 200 { 201 return blk_mq_rq_to_pdu(req); 202 } 203 204 static inline u16 nvme_req_qid(struct request *req) 205 { 206 if (!req->q->queuedata) 207 return 0; 208 209 return req->mq_hctx->queue_num + 1; 210 } 211 212 /* The below value is the specific amount of delay needed before checking 213 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 214 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 215 * found empirically. 216 */ 217 #define NVME_QUIRK_DELAY_AMOUNT 2300 218 219 /* 220 * enum nvme_ctrl_state: Controller state 221 * 222 * @NVME_CTRL_NEW: New controller just allocated, initial state 223 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 224 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 225 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 226 * transport 227 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 228 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 229 * disabled/failed immediately. This state comes 230 * after all async event processing took place and 231 * before ns removal and the controller deletion 232 * progress 233 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 234 * shutdown or removal. In this case we forcibly 235 * kill all inflight I/O as they have no chance to 236 * complete 237 */ 238 enum nvme_ctrl_state { 239 NVME_CTRL_NEW, 240 NVME_CTRL_LIVE, 241 NVME_CTRL_RESETTING, 242 NVME_CTRL_CONNECTING, 243 NVME_CTRL_DELETING, 244 NVME_CTRL_DELETING_NOIO, 245 NVME_CTRL_DEAD, 246 }; 247 248 struct nvme_fault_inject { 249 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 250 struct fault_attr attr; 251 struct dentry *parent; 252 bool dont_retry; /* DNR, do not retry */ 253 u16 status; /* status code */ 254 #endif 255 }; 256 257 enum nvme_ctrl_flags { 258 NVME_CTRL_FAILFAST_EXPIRED = 0, 259 NVME_CTRL_ADMIN_Q_STOPPED = 1, 260 NVME_CTRL_STARTED_ONCE = 2, 261 NVME_CTRL_STOPPED = 3, 262 NVME_CTRL_SKIP_ID_CNS_CS = 4, 263 NVME_CTRL_DIRTY_CAPABILITY = 5, 264 NVME_CTRL_FROZEN = 6, 265 }; 266 267 struct nvme_ctrl { 268 bool comp_seen; 269 bool identified; 270 enum nvme_ctrl_state state; 271 spinlock_t lock; 272 struct mutex scan_lock; 273 const struct nvme_ctrl_ops *ops; 274 struct request_queue *admin_q; 275 struct request_queue *connect_q; 276 struct request_queue *fabrics_q; 277 struct device *dev; 278 int instance; 279 int numa_node; 280 struct blk_mq_tag_set *tagset; 281 struct blk_mq_tag_set *admin_tagset; 282 struct list_head namespaces; 283 struct mutex namespaces_lock; 284 struct srcu_struct srcu; 285 struct device ctrl_device; 286 struct device *device; /* char device */ 287 #ifdef CONFIG_NVME_HWMON 288 struct device *hwmon_device; 289 #endif 290 struct cdev cdev; 291 struct work_struct reset_work; 292 struct work_struct delete_work; 293 wait_queue_head_t state_wq; 294 295 struct nvme_subsystem *subsys; 296 struct list_head subsys_entry; 297 298 struct opal_dev *opal_dev; 299 300 char name[12]; 301 u16 cntlid; 302 303 u16 mtfa; 304 u32 ctrl_config; 305 u32 queue_count; 306 307 u64 cap; 308 u32 max_hw_sectors; 309 u32 max_segments; 310 u32 max_integrity_segments; 311 u32 max_discard_sectors; 312 u32 max_discard_segments; 313 u32 max_zeroes_sectors; 314 #ifdef CONFIG_BLK_DEV_ZONED 315 u32 max_zone_append; 316 #endif 317 u16 crdt[3]; 318 u16 oncs; 319 u32 dmrsl; 320 u16 oacs; 321 u16 sqsize; 322 u32 max_namespaces; 323 atomic_t abort_limit; 324 u8 vwc; 325 u32 vs; 326 u32 sgls; 327 u16 kas; 328 u8 npss; 329 u8 apsta; 330 u16 wctemp; 331 u16 cctemp; 332 u32 oaes; 333 u32 aen_result; 334 u32 ctratt; 335 unsigned int shutdown_timeout; 336 unsigned int kato; 337 bool subsystem; 338 unsigned long quirks; 339 struct nvme_id_power_state psd[32]; 340 struct nvme_effects_log *effects; 341 struct xarray cels; 342 struct work_struct scan_work; 343 struct work_struct async_event_work; 344 struct delayed_work ka_work; 345 struct delayed_work failfast_work; 346 struct nvme_command ka_cmd; 347 unsigned long ka_last_check_time; 348 struct work_struct fw_act_work; 349 unsigned long events; 350 351 #ifdef CONFIG_NVME_MULTIPATH 352 /* asymmetric namespace access: */ 353 u8 anacap; 354 u8 anatt; 355 u32 anagrpmax; 356 u32 nanagrpid; 357 struct mutex ana_lock; 358 struct nvme_ana_rsp_hdr *ana_log_buf; 359 size_t ana_log_size; 360 struct timer_list anatt_timer; 361 struct work_struct ana_work; 362 #endif 363 364 #ifdef CONFIG_NVME_AUTH 365 struct work_struct dhchap_auth_work; 366 struct mutex dhchap_auth_mutex; 367 struct nvme_dhchap_queue_context *dhchap_ctxs; 368 struct nvme_dhchap_key *host_key; 369 struct nvme_dhchap_key *ctrl_key; 370 u16 transaction; 371 #endif 372 373 /* Power saving configuration */ 374 u64 ps_max_latency_us; 375 bool apst_enabled; 376 377 /* PCIe only: */ 378 u16 hmmaxd; 379 u32 hmpre; 380 u32 hmmin; 381 u32 hmminds; 382 383 /* Fabrics only */ 384 u32 ioccsz; 385 u32 iorcsz; 386 u16 icdoff; 387 u16 maxcmd; 388 int nr_reconnects; 389 unsigned long flags; 390 struct nvmf_ctrl_options *opts; 391 392 struct page *discard_page; 393 unsigned long discard_page_busy; 394 395 struct nvme_fault_inject fault_inject; 396 397 enum nvme_ctrl_type cntrltype; 398 enum nvme_dctype dctype; 399 }; 400 401 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl) 402 { 403 return READ_ONCE(ctrl->state); 404 } 405 406 enum nvme_iopolicy { 407 NVME_IOPOLICY_NUMA, 408 NVME_IOPOLICY_RR, 409 }; 410 411 struct nvme_subsystem { 412 int instance; 413 struct device dev; 414 /* 415 * Because we unregister the device on the last put we need 416 * a separate refcount. 417 */ 418 struct kref ref; 419 struct list_head entry; 420 struct mutex lock; 421 struct list_head ctrls; 422 struct list_head nsheads; 423 char subnqn[NVMF_NQN_SIZE]; 424 char serial[20]; 425 char model[40]; 426 char firmware_rev[8]; 427 u8 cmic; 428 enum nvme_subsys_type subtype; 429 u16 vendor_id; 430 u16 awupf; /* 0's based awupf value. */ 431 struct ida ns_ida; 432 #ifdef CONFIG_NVME_MULTIPATH 433 enum nvme_iopolicy iopolicy; 434 #endif 435 }; 436 437 /* 438 * Container structure for uniqueue namespace identifiers. 439 */ 440 struct nvme_ns_ids { 441 u8 eui64[8]; 442 u8 nguid[16]; 443 uuid_t uuid; 444 u8 csi; 445 }; 446 447 /* 448 * Anchor structure for namespaces. There is one for each namespace in a 449 * NVMe subsystem that any of our controllers can see, and the namespace 450 * structure for each controller is chained of it. For private namespaces 451 * there is a 1:1 relation to our namespace structures, that is ->list 452 * only ever has a single entry for private namespaces. 453 */ 454 struct nvme_ns_head { 455 struct list_head list; 456 struct srcu_struct srcu; 457 struct nvme_subsystem *subsys; 458 unsigned ns_id; 459 struct nvme_ns_ids ids; 460 struct list_head entry; 461 struct kref ref; 462 bool shared; 463 int instance; 464 struct nvme_effects_log *effects; 465 466 struct cdev cdev; 467 struct device cdev_device; 468 469 struct gendisk *disk; 470 #ifdef CONFIG_NVME_MULTIPATH 471 struct bio_list requeue_list; 472 spinlock_t requeue_lock; 473 struct work_struct requeue_work; 474 struct mutex lock; 475 unsigned long flags; 476 #define NVME_NSHEAD_DISK_LIVE 0 477 struct nvme_ns __rcu *current_path[]; 478 #endif 479 }; 480 481 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 482 { 483 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 484 } 485 486 enum nvme_ns_features { 487 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 488 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 489 NVME_NS_DEAC = 1 << 2, /* DEAC bit in Write Zeores supported */ 490 }; 491 492 struct nvme_ns { 493 struct list_head list; 494 495 struct nvme_ctrl *ctrl; 496 struct request_queue *queue; 497 struct gendisk *disk; 498 #ifdef CONFIG_NVME_MULTIPATH 499 enum nvme_ana_state ana_state; 500 u32 ana_grpid; 501 #endif 502 struct list_head siblings; 503 struct kref kref; 504 struct nvme_ns_head *head; 505 506 int lba_shift; 507 u16 ms; 508 u16 pi_size; 509 u16 sgs; 510 u32 sws; 511 u8 pi_type; 512 u8 guard_type; 513 #ifdef CONFIG_BLK_DEV_ZONED 514 u64 zsze; 515 #endif 516 unsigned long features; 517 unsigned long flags; 518 #define NVME_NS_REMOVING 0 519 #define NVME_NS_ANA_PENDING 2 520 #define NVME_NS_FORCE_RO 3 521 #define NVME_NS_READY 4 522 523 struct cdev cdev; 524 struct device cdev_device; 525 526 struct nvme_fault_inject fault_inject; 527 528 }; 529 530 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 531 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 532 { 533 return ns->pi_type && ns->ms == ns->pi_size; 534 } 535 536 struct nvme_ctrl_ops { 537 const char *name; 538 struct module *module; 539 unsigned int flags; 540 #define NVME_F_FABRICS (1 << 0) 541 #define NVME_F_METADATA_SUPPORTED (1 << 1) 542 #define NVME_F_BLOCKING (1 << 2) 543 544 const struct attribute_group **dev_attr_groups; 545 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 546 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 547 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 548 void (*free_ctrl)(struct nvme_ctrl *ctrl); 549 void (*submit_async_event)(struct nvme_ctrl *ctrl); 550 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 551 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 552 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 553 void (*print_device_info)(struct nvme_ctrl *ctrl); 554 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 555 }; 556 557 /* 558 * nvme command_id is constructed as such: 559 * | xxxx | xxxxxxxxxxxx | 560 * gen request tag 561 */ 562 #define nvme_genctr_mask(gen) (gen & 0xf) 563 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 564 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 565 #define nvme_tag_from_cid(cid) (cid & 0xfff) 566 567 static inline u16 nvme_cid(struct request *rq) 568 { 569 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 570 } 571 572 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 573 u16 command_id) 574 { 575 u8 genctr = nvme_genctr_from_cid(command_id); 576 u16 tag = nvme_tag_from_cid(command_id); 577 struct request *rq; 578 579 rq = blk_mq_tag_to_rq(tags, tag); 580 if (unlikely(!rq)) { 581 pr_err("could not locate request for tag %#x\n", 582 tag); 583 return NULL; 584 } 585 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 586 dev_err(nvme_req(rq)->ctrl->device, 587 "request %#x genctr mismatch (got %#x expected %#x)\n", 588 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 589 return NULL; 590 } 591 return rq; 592 } 593 594 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 595 u16 command_id) 596 { 597 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 598 } 599 600 /* 601 * Return the length of the string without the space padding 602 */ 603 static inline int nvme_strlen(char *s, int len) 604 { 605 while (s[len - 1] == ' ') 606 len--; 607 return len; 608 } 609 610 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 611 { 612 struct nvme_subsystem *subsys = ctrl->subsys; 613 614 if (ctrl->ops->print_device_info) { 615 ctrl->ops->print_device_info(ctrl); 616 return; 617 } 618 619 dev_err(ctrl->device, 620 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 621 nvme_strlen(subsys->model, sizeof(subsys->model)), 622 subsys->model, nvme_strlen(subsys->firmware_rev, 623 sizeof(subsys->firmware_rev)), 624 subsys->firmware_rev); 625 } 626 627 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 628 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 629 const char *dev_name); 630 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 631 void nvme_should_fail(struct request *req); 632 #else 633 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 634 const char *dev_name) 635 { 636 } 637 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 638 { 639 } 640 static inline void nvme_should_fail(struct request *req) {} 641 #endif 642 643 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 644 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 645 646 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 647 { 648 int ret; 649 650 if (!ctrl->subsystem) 651 return -ENOTTY; 652 if (!nvme_wait_reset(ctrl)) 653 return -EBUSY; 654 655 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 656 if (ret) 657 return ret; 658 659 return nvme_try_sched_reset(ctrl); 660 } 661 662 /* 663 * Convert a 512B sector number to a device logical block number. 664 */ 665 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 666 { 667 return sector >> (ns->lba_shift - SECTOR_SHIFT); 668 } 669 670 /* 671 * Convert a device logical block number to a 512B sector number. 672 */ 673 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 674 { 675 return lba << (ns->lba_shift - SECTOR_SHIFT); 676 } 677 678 /* 679 * Convert byte length to nvme's 0-based num dwords 680 */ 681 static inline u32 nvme_bytes_to_numd(size_t len) 682 { 683 return (len >> 2) - 1; 684 } 685 686 static inline bool nvme_is_ana_error(u16 status) 687 { 688 switch (status & 0x7ff) { 689 case NVME_SC_ANA_TRANSITION: 690 case NVME_SC_ANA_INACCESSIBLE: 691 case NVME_SC_ANA_PERSISTENT_LOSS: 692 return true; 693 default: 694 return false; 695 } 696 } 697 698 static inline bool nvme_is_path_error(u16 status) 699 { 700 /* check for a status code type of 'path related status' */ 701 return (status & 0x700) == 0x300; 702 } 703 704 /* 705 * Fill in the status and result information from the CQE, and then figure out 706 * if blk-mq will need to use IPI magic to complete the request, and if yes do 707 * so. If not let the caller complete the request without an indirect function 708 * call. 709 */ 710 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 711 union nvme_result result) 712 { 713 struct nvme_request *rq = nvme_req(req); 714 struct nvme_ctrl *ctrl = rq->ctrl; 715 716 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 717 rq->genctr++; 718 719 rq->status = le16_to_cpu(status) >> 1; 720 rq->result = result; 721 /* inject error when permitted by fault injection framework */ 722 nvme_should_fail(req); 723 if (unlikely(blk_should_fake_timeout(req->q))) 724 return true; 725 return blk_mq_complete_request_remote(req); 726 } 727 728 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 729 { 730 get_device(ctrl->device); 731 } 732 733 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 734 { 735 put_device(ctrl->device); 736 } 737 738 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 739 { 740 return !qid && 741 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 742 } 743 744 /* 745 * Returns true for sink states that can't ever transition back to live. 746 */ 747 static inline bool nvme_state_terminal(struct nvme_ctrl *ctrl) 748 { 749 switch (nvme_ctrl_state(ctrl)) { 750 case NVME_CTRL_NEW: 751 case NVME_CTRL_LIVE: 752 case NVME_CTRL_RESETTING: 753 case NVME_CTRL_CONNECTING: 754 return false; 755 case NVME_CTRL_DELETING: 756 case NVME_CTRL_DELETING_NOIO: 757 case NVME_CTRL_DEAD: 758 return true; 759 default: 760 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 761 return true; 762 } 763 } 764 765 void nvme_end_req(struct request *req); 766 void nvme_complete_rq(struct request *req); 767 void nvme_complete_batch_req(struct request *req); 768 769 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 770 void (*fn)(struct request *rq)) 771 { 772 struct request *req; 773 774 rq_list_for_each(&iob->req_list, req) { 775 fn(req); 776 nvme_complete_batch_req(req); 777 } 778 blk_mq_end_request_batch(iob); 779 } 780 781 blk_status_t nvme_host_path_error(struct request *req); 782 bool nvme_cancel_request(struct request *req, void *data); 783 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 784 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 785 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 786 enum nvme_ctrl_state new_state); 787 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 788 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 789 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 790 const struct nvme_ctrl_ops *ops, unsigned long quirks); 791 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 792 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 793 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 794 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 795 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 796 const struct blk_mq_ops *ops, unsigned int cmd_size); 797 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 798 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 799 const struct blk_mq_ops *ops, unsigned int nr_maps, 800 unsigned int cmd_size); 801 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 802 803 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 804 805 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 806 volatile union nvme_result *res); 807 808 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 809 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 810 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 811 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 812 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 813 void nvme_sync_queues(struct nvme_ctrl *ctrl); 814 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 815 void nvme_unfreeze(struct nvme_ctrl *ctrl); 816 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 817 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 818 void nvme_start_freeze(struct nvme_ctrl *ctrl); 819 820 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 821 { 822 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 823 } 824 825 #define NVME_QID_ANY -1 826 void nvme_init_request(struct request *req, struct nvme_command *cmd); 827 void nvme_cleanup_cmd(struct request *req); 828 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 829 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 830 struct request *req); 831 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 832 bool queue_live); 833 834 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 835 bool queue_live) 836 { 837 if (likely(ctrl->state == NVME_CTRL_LIVE)) 838 return true; 839 if (ctrl->ops->flags & NVME_F_FABRICS && 840 ctrl->state == NVME_CTRL_DELETING) 841 return queue_live; 842 return __nvme_check_ready(ctrl, rq, queue_live); 843 } 844 845 /* 846 * NSID shall be unique for all shared namespaces, or if at least one of the 847 * following conditions is met: 848 * 1. Namespace Management is supported by the controller 849 * 2. ANA is supported by the controller 850 * 3. NVM Set are supported by the controller 851 * 852 * In other case, private namespace are not required to report a unique NSID. 853 */ 854 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 855 struct nvme_ns_head *head) 856 { 857 return head->shared || 858 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 859 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 860 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 861 } 862 863 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 864 void *buf, unsigned bufflen); 865 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 866 union nvme_result *result, void *buffer, unsigned bufflen, 867 int qid, int at_head, 868 blk_mq_req_flags_t flags); 869 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 870 unsigned int dword11, void *buffer, size_t buflen, 871 u32 *result); 872 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 873 unsigned int dword11, void *buffer, size_t buflen, 874 u32 *result); 875 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 876 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 877 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 878 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 879 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 880 void nvme_queue_scan(struct nvme_ctrl *ctrl); 881 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 882 void *log, size_t size, u64 offset); 883 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 884 void nvme_put_ns_head(struct nvme_ns_head *head); 885 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 886 const struct file_operations *fops, struct module *owner); 887 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 888 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 889 unsigned int cmd, unsigned long arg); 890 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 891 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 892 unsigned int cmd, unsigned long arg); 893 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 894 unsigned long arg); 895 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 896 unsigned long arg); 897 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 898 struct io_comp_batch *iob, unsigned int poll_flags); 899 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 900 unsigned int issue_flags); 901 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 902 unsigned int issue_flags); 903 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 904 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 905 906 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 907 extern const struct pr_ops nvme_pr_ops; 908 extern const struct block_device_operations nvme_ns_head_ops; 909 extern const struct attribute_group nvme_dev_attrs_group; 910 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 911 extern const struct attribute_group *nvme_dev_attr_groups[]; 912 extern const struct block_device_operations nvme_bdev_ops; 913 914 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 915 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 916 #ifdef CONFIG_NVME_MULTIPATH 917 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 918 { 919 return ctrl->ana_log_buf != NULL; 920 } 921 922 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 923 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 924 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 925 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 926 void nvme_failover_req(struct request *req); 927 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 928 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 929 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 930 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 931 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 932 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 933 void nvme_mpath_update(struct nvme_ctrl *ctrl); 934 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 935 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 936 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 937 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 938 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 939 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 940 void nvme_mpath_start_request(struct request *rq); 941 void nvme_mpath_end_request(struct request *rq); 942 943 static inline void nvme_trace_bio_complete(struct request *req) 944 { 945 struct nvme_ns *ns = req->q->queuedata; 946 947 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 948 trace_block_bio_complete(ns->head->disk->queue, req->bio); 949 } 950 951 extern bool multipath; 952 extern struct device_attribute dev_attr_ana_grpid; 953 extern struct device_attribute dev_attr_ana_state; 954 extern struct device_attribute subsys_attr_iopolicy; 955 956 #else 957 #define multipath false 958 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 959 { 960 return false; 961 } 962 static inline void nvme_failover_req(struct request *req) 963 { 964 } 965 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 966 { 967 } 968 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 969 struct nvme_ns_head *head) 970 { 971 return 0; 972 } 973 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 974 { 975 } 976 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 977 { 978 } 979 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 980 { 981 return false; 982 } 983 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 984 { 985 } 986 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 987 { 988 } 989 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 990 { 991 } 992 static inline void nvme_trace_bio_complete(struct request *req) 993 { 994 } 995 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 996 { 997 } 998 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 999 struct nvme_id_ctrl *id) 1000 { 1001 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 1002 dev_warn(ctrl->device, 1003 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 1004 return 0; 1005 } 1006 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 1007 { 1008 } 1009 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 1010 { 1011 } 1012 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 1013 { 1014 } 1015 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 1016 { 1017 } 1018 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 1019 { 1020 } 1021 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 1022 { 1023 } 1024 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 1025 { 1026 } 1027 static inline void nvme_mpath_start_request(struct request *rq) 1028 { 1029 } 1030 static inline void nvme_mpath_end_request(struct request *rq) 1031 { 1032 } 1033 #endif /* CONFIG_NVME_MULTIPATH */ 1034 1035 int nvme_revalidate_zones(struct nvme_ns *ns); 1036 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 1037 unsigned int nr_zones, report_zones_cb cb, void *data); 1038 #ifdef CONFIG_BLK_DEV_ZONED 1039 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 1040 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1041 struct nvme_command *cmnd, 1042 enum nvme_zone_mgmt_action action); 1043 #else 1044 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1045 struct request *req, struct nvme_command *cmnd, 1046 enum nvme_zone_mgmt_action action) 1047 { 1048 return BLK_STS_NOTSUPP; 1049 } 1050 1051 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 1052 { 1053 dev_warn(ns->ctrl->device, 1054 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 1055 return -EPROTONOSUPPORT; 1056 } 1057 #endif 1058 1059 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1060 { 1061 return dev_to_disk(dev)->private_data; 1062 } 1063 1064 #ifdef CONFIG_NVME_HWMON 1065 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1066 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1067 #else 1068 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1069 { 1070 return 0; 1071 } 1072 1073 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1074 { 1075 } 1076 #endif 1077 1078 static inline void nvme_start_request(struct request *rq) 1079 { 1080 if (rq->cmd_flags & REQ_NVME_MPATH) 1081 nvme_mpath_start_request(rq); 1082 blk_mq_start_request(rq); 1083 } 1084 1085 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1086 { 1087 return ctrl->sgls & ((1 << 0) | (1 << 1)); 1088 } 1089 1090 #ifdef CONFIG_NVME_AUTH 1091 int __init nvme_init_auth(void); 1092 void __exit nvme_exit_auth(void); 1093 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1094 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1095 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1096 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1097 void nvme_auth_free(struct nvme_ctrl *ctrl); 1098 #else 1099 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1100 { 1101 return 0; 1102 } 1103 static inline int __init nvme_init_auth(void) 1104 { 1105 return 0; 1106 } 1107 static inline void __exit nvme_exit_auth(void) 1108 { 1109 } 1110 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1111 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1112 { 1113 return -EPROTONOSUPPORT; 1114 } 1115 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1116 { 1117 return NVME_SC_AUTH_REQUIRED; 1118 } 1119 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1120 #endif 1121 1122 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1123 u8 opcode); 1124 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1125 int nvme_execute_rq(struct request *rq, bool at_head); 1126 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1127 struct nvme_command *cmd, int status); 1128 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1129 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1130 bool nvme_get_ns(struct nvme_ns *ns); 1131 void nvme_put_ns(struct nvme_ns *ns); 1132 1133 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1134 { 1135 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1136 } 1137 1138 #ifdef CONFIG_NVME_VERBOSE_ERRORS 1139 const unsigned char *nvme_get_error_status_str(u16 status); 1140 const unsigned char *nvme_get_opcode_str(u8 opcode); 1141 const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1142 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode); 1143 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1144 static inline const unsigned char *nvme_get_error_status_str(u16 status) 1145 { 1146 return "I/O Error"; 1147 } 1148 static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1149 { 1150 return "I/O Cmd"; 1151 } 1152 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1153 { 1154 return "Admin Cmd"; 1155 } 1156 1157 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode) 1158 { 1159 return "Fabrics Cmd"; 1160 } 1161 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1162 1163 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype) 1164 { 1165 if (opcode == nvme_fabrics_command) 1166 return nvme_get_fabrics_opcode_str(fctype); 1167 return qid ? nvme_get_opcode_str(opcode) : 1168 nvme_get_admin_opcode_str(opcode); 1169 } 1170 #endif /* _NVME_H */ 1171