xref: /openbmc/linux/drivers/nvme/host/nvme.h (revision d0dd594b)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2011-2014, Intel Corporation.
4  */
5 
6 #ifndef _NVME_H
7 #define _NVME_H
8 
9 #include <linux/nvme.h>
10 #include <linux/cdev.h>
11 #include <linux/pci.h>
12 #include <linux/kref.h>
13 #include <linux/blk-mq.h>
14 #include <linux/sed-opal.h>
15 #include <linux/fault-inject.h>
16 #include <linux/rcupdate.h>
17 #include <linux/wait.h>
18 #include <linux/t10-pi.h>
19 
20 #include <trace/events/block.h>
21 
22 extern unsigned int nvme_io_timeout;
23 #define NVME_IO_TIMEOUT	(nvme_io_timeout * HZ)
24 
25 extern unsigned int admin_timeout;
26 #define NVME_ADMIN_TIMEOUT	(admin_timeout * HZ)
27 
28 #define NVME_DEFAULT_KATO	5
29 
30 #ifdef CONFIG_ARCH_NO_SG_CHAIN
31 #define  NVME_INLINE_SG_CNT  0
32 #define  NVME_INLINE_METADATA_SG_CNT  0
33 #else
34 #define  NVME_INLINE_SG_CNT  2
35 #define  NVME_INLINE_METADATA_SG_CNT  1
36 #endif
37 
38 /*
39  * Default to a 4K page size, with the intention to update this
40  * path in the future to accommodate architectures with differing
41  * kernel and IO page sizes.
42  */
43 #define NVME_CTRL_PAGE_SHIFT	12
44 #define NVME_CTRL_PAGE_SIZE	(1 << NVME_CTRL_PAGE_SHIFT)
45 
46 extern struct workqueue_struct *nvme_wq;
47 extern struct workqueue_struct *nvme_reset_wq;
48 extern struct workqueue_struct *nvme_delete_wq;
49 
50 /*
51  * List of workarounds for devices that required behavior not specified in
52  * the standard.
53  */
54 enum nvme_quirks {
55 	/*
56 	 * Prefers I/O aligned to a stripe size specified in a vendor
57 	 * specific Identify field.
58 	 */
59 	NVME_QUIRK_STRIPE_SIZE			= (1 << 0),
60 
61 	/*
62 	 * The controller doesn't handle Identify value others than 0 or 1
63 	 * correctly.
64 	 */
65 	NVME_QUIRK_IDENTIFY_CNS			= (1 << 1),
66 
67 	/*
68 	 * The controller deterministically returns O's on reads to
69 	 * logical blocks that deallocate was called on.
70 	 */
71 	NVME_QUIRK_DEALLOCATE_ZEROES		= (1 << 2),
72 
73 	/*
74 	 * The controller needs a delay before starts checking the device
75 	 * readiness, which is done by reading the NVME_CSTS_RDY bit.
76 	 */
77 	NVME_QUIRK_DELAY_BEFORE_CHK_RDY		= (1 << 3),
78 
79 	/*
80 	 * APST should not be used.
81 	 */
82 	NVME_QUIRK_NO_APST			= (1 << 4),
83 
84 	/*
85 	 * The deepest sleep state should not be used.
86 	 */
87 	NVME_QUIRK_NO_DEEPEST_PS		= (1 << 5),
88 
89 	/*
90 	 * Set MEDIUM priority on SQ creation
91 	 */
92 	NVME_QUIRK_MEDIUM_PRIO_SQ		= (1 << 7),
93 
94 	/*
95 	 * Ignore device provided subnqn.
96 	 */
97 	NVME_QUIRK_IGNORE_DEV_SUBNQN		= (1 << 8),
98 
99 	/*
100 	 * Broken Write Zeroes.
101 	 */
102 	NVME_QUIRK_DISABLE_WRITE_ZEROES		= (1 << 9),
103 
104 	/*
105 	 * Force simple suspend/resume path.
106 	 */
107 	NVME_QUIRK_SIMPLE_SUSPEND		= (1 << 10),
108 
109 	/*
110 	 * Use only one interrupt vector for all queues
111 	 */
112 	NVME_QUIRK_SINGLE_VECTOR		= (1 << 11),
113 
114 	/*
115 	 * Use non-standard 128 bytes SQEs.
116 	 */
117 	NVME_QUIRK_128_BYTES_SQES		= (1 << 12),
118 
119 	/*
120 	 * Prevent tag overlap between queues
121 	 */
122 	NVME_QUIRK_SHARED_TAGS                  = (1 << 13),
123 
124 	/*
125 	 * Don't change the value of the temperature threshold feature
126 	 */
127 	NVME_QUIRK_NO_TEMP_THRESH_CHANGE	= (1 << 14),
128 
129 	/*
130 	 * The controller doesn't handle the Identify Namespace
131 	 * Identification Descriptor list subcommand despite claiming
132 	 * NVMe 1.3 compliance.
133 	 */
134 	NVME_QUIRK_NO_NS_DESC_LIST		= (1 << 15),
135 
136 	/*
137 	 * The controller does not properly handle DMA addresses over
138 	 * 48 bits.
139 	 */
140 	NVME_QUIRK_DMA_ADDRESS_BITS_48		= (1 << 16),
141 
142 	/*
143 	 * The controller requires the command_id value be limited, so skip
144 	 * encoding the generation sequence number.
145 	 */
146 	NVME_QUIRK_SKIP_CID_GEN			= (1 << 17),
147 
148 	/*
149 	 * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
150 	 */
151 	NVME_QUIRK_BOGUS_NID			= (1 << 18),
152 };
153 
154 /*
155  * Common request structure for NVMe passthrough.  All drivers must have
156  * this structure as the first member of their request-private data.
157  */
158 struct nvme_request {
159 	struct nvme_command	*cmd;
160 	union nvme_result	result;
161 	u8			genctr;
162 	u8			retries;
163 	u8			flags;
164 	u16			status;
165 #ifdef CONFIG_NVME_MULTIPATH
166 	unsigned long		start_time;
167 #endif
168 	struct nvme_ctrl	*ctrl;
169 };
170 
171 /*
172  * Mark a bio as coming in through the mpath node.
173  */
174 #define REQ_NVME_MPATH		REQ_DRV
175 
176 enum {
177 	NVME_REQ_CANCELLED		= (1 << 0),
178 	NVME_REQ_USERCMD		= (1 << 1),
179 	NVME_MPATH_IO_STATS		= (1 << 2),
180 };
181 
182 static inline struct nvme_request *nvme_req(struct request *req)
183 {
184 	return blk_mq_rq_to_pdu(req);
185 }
186 
187 static inline u16 nvme_req_qid(struct request *req)
188 {
189 	if (!req->q->queuedata)
190 		return 0;
191 
192 	return req->mq_hctx->queue_num + 1;
193 }
194 
195 /* The below value is the specific amount of delay needed before checking
196  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
197  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
198  * found empirically.
199  */
200 #define NVME_QUIRK_DELAY_AMOUNT		2300
201 
202 /*
203  * enum nvme_ctrl_state: Controller state
204  *
205  * @NVME_CTRL_NEW:		New controller just allocated, initial state
206  * @NVME_CTRL_LIVE:		Controller is connected and I/O capable
207  * @NVME_CTRL_RESETTING:	Controller is resetting (or scheduled reset)
208  * @NVME_CTRL_CONNECTING:	Controller is disconnected, now connecting the
209  *				transport
210  * @NVME_CTRL_DELETING:		Controller is deleting (or scheduled deletion)
211  * @NVME_CTRL_DELETING_NOIO:	Controller is deleting and I/O is not
212  *				disabled/failed immediately. This state comes
213  * 				after all async event processing took place and
214  * 				before ns removal and the controller deletion
215  * 				progress
216  * @NVME_CTRL_DEAD:		Controller is non-present/unresponsive during
217  *				shutdown or removal. In this case we forcibly
218  *				kill all inflight I/O as they have no chance to
219  *				complete
220  */
221 enum nvme_ctrl_state {
222 	NVME_CTRL_NEW,
223 	NVME_CTRL_LIVE,
224 	NVME_CTRL_RESETTING,
225 	NVME_CTRL_CONNECTING,
226 	NVME_CTRL_DELETING,
227 	NVME_CTRL_DELETING_NOIO,
228 	NVME_CTRL_DEAD,
229 };
230 
231 struct nvme_fault_inject {
232 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
233 	struct fault_attr attr;
234 	struct dentry *parent;
235 	bool dont_retry;	/* DNR, do not retry */
236 	u16 status;		/* status code */
237 #endif
238 };
239 
240 enum nvme_ctrl_flags {
241 	NVME_CTRL_FAILFAST_EXPIRED	= 0,
242 	NVME_CTRL_ADMIN_Q_STOPPED	= 1,
243 	NVME_CTRL_STARTED_ONCE		= 2,
244 	NVME_CTRL_STOPPED		= 3,
245 	NVME_CTRL_SKIP_ID_CNS_CS	= 4,
246 	NVME_CTRL_DIRTY_CAPABILITY	= 5,
247 };
248 
249 struct nvme_ctrl {
250 	bool comp_seen;
251 	bool identified;
252 	enum nvme_ctrl_state state;
253 	spinlock_t lock;
254 	struct mutex scan_lock;
255 	const struct nvme_ctrl_ops *ops;
256 	struct request_queue *admin_q;
257 	struct request_queue *connect_q;
258 	struct request_queue *fabrics_q;
259 	struct device *dev;
260 	int instance;
261 	int numa_node;
262 	struct blk_mq_tag_set *tagset;
263 	struct blk_mq_tag_set *admin_tagset;
264 	struct list_head namespaces;
265 	struct rw_semaphore namespaces_rwsem;
266 	struct device ctrl_device;
267 	struct device *device;	/* char device */
268 #ifdef CONFIG_NVME_HWMON
269 	struct device *hwmon_device;
270 #endif
271 	struct cdev cdev;
272 	struct work_struct reset_work;
273 	struct work_struct delete_work;
274 	wait_queue_head_t state_wq;
275 
276 	struct nvme_subsystem *subsys;
277 	struct list_head subsys_entry;
278 
279 	struct opal_dev *opal_dev;
280 
281 	char name[12];
282 	u16 cntlid;
283 
284 	u16 mtfa;
285 	u32 ctrl_config;
286 	u32 queue_count;
287 
288 	u64 cap;
289 	u32 max_hw_sectors;
290 	u32 max_segments;
291 	u32 max_integrity_segments;
292 	u32 max_discard_sectors;
293 	u32 max_discard_segments;
294 	u32 max_zeroes_sectors;
295 #ifdef CONFIG_BLK_DEV_ZONED
296 	u32 max_zone_append;
297 #endif
298 	u16 crdt[3];
299 	u16 oncs;
300 	u32 dmrsl;
301 	u16 oacs;
302 	u16 sqsize;
303 	u32 max_namespaces;
304 	atomic_t abort_limit;
305 	u8 vwc;
306 	u32 vs;
307 	u32 sgls;
308 	u16 kas;
309 	u8 npss;
310 	u8 apsta;
311 	u16 wctemp;
312 	u16 cctemp;
313 	u32 oaes;
314 	u32 aen_result;
315 	u32 ctratt;
316 	unsigned int shutdown_timeout;
317 	unsigned int kato;
318 	bool subsystem;
319 	unsigned long quirks;
320 	struct nvme_id_power_state psd[32];
321 	struct nvme_effects_log *effects;
322 	struct xarray cels;
323 	struct work_struct scan_work;
324 	struct work_struct async_event_work;
325 	struct delayed_work ka_work;
326 	struct delayed_work failfast_work;
327 	struct nvme_command ka_cmd;
328 	struct work_struct fw_act_work;
329 	unsigned long events;
330 
331 #ifdef CONFIG_NVME_MULTIPATH
332 	/* asymmetric namespace access: */
333 	u8 anacap;
334 	u8 anatt;
335 	u32 anagrpmax;
336 	u32 nanagrpid;
337 	struct mutex ana_lock;
338 	struct nvme_ana_rsp_hdr *ana_log_buf;
339 	size_t ana_log_size;
340 	struct timer_list anatt_timer;
341 	struct work_struct ana_work;
342 #endif
343 
344 #ifdef CONFIG_NVME_AUTH
345 	struct work_struct dhchap_auth_work;
346 	struct mutex dhchap_auth_mutex;
347 	struct nvme_dhchap_queue_context *dhchap_ctxs;
348 	struct nvme_dhchap_key *host_key;
349 	struct nvme_dhchap_key *ctrl_key;
350 	u16 transaction;
351 #endif
352 
353 	/* Power saving configuration */
354 	u64 ps_max_latency_us;
355 	bool apst_enabled;
356 
357 	/* PCIe only: */
358 	u16 hmmaxd;
359 	u32 hmpre;
360 	u32 hmmin;
361 	u32 hmminds;
362 
363 	/* Fabrics only */
364 	u32 ioccsz;
365 	u32 iorcsz;
366 	u16 icdoff;
367 	u16 maxcmd;
368 	int nr_reconnects;
369 	unsigned long flags;
370 	struct nvmf_ctrl_options *opts;
371 
372 	struct page *discard_page;
373 	unsigned long discard_page_busy;
374 
375 	struct nvme_fault_inject fault_inject;
376 
377 	enum nvme_ctrl_type cntrltype;
378 	enum nvme_dctype dctype;
379 };
380 
381 enum nvme_iopolicy {
382 	NVME_IOPOLICY_NUMA,
383 	NVME_IOPOLICY_RR,
384 };
385 
386 struct nvme_subsystem {
387 	int			instance;
388 	struct device		dev;
389 	/*
390 	 * Because we unregister the device on the last put we need
391 	 * a separate refcount.
392 	 */
393 	struct kref		ref;
394 	struct list_head	entry;
395 	struct mutex		lock;
396 	struct list_head	ctrls;
397 	struct list_head	nsheads;
398 	char			subnqn[NVMF_NQN_SIZE];
399 	char			serial[20];
400 	char			model[40];
401 	char			firmware_rev[8];
402 	u8			cmic;
403 	enum nvme_subsys_type	subtype;
404 	u16			vendor_id;
405 	u16			awupf;	/* 0's based awupf value. */
406 	struct ida		ns_ida;
407 #ifdef CONFIG_NVME_MULTIPATH
408 	enum nvme_iopolicy	iopolicy;
409 #endif
410 };
411 
412 /*
413  * Container structure for uniqueue namespace identifiers.
414  */
415 struct nvme_ns_ids {
416 	u8	eui64[8];
417 	u8	nguid[16];
418 	uuid_t	uuid;
419 	u8	csi;
420 };
421 
422 /*
423  * Anchor structure for namespaces.  There is one for each namespace in a
424  * NVMe subsystem that any of our controllers can see, and the namespace
425  * structure for each controller is chained of it.  For private namespaces
426  * there is a 1:1 relation to our namespace structures, that is ->list
427  * only ever has a single entry for private namespaces.
428  */
429 struct nvme_ns_head {
430 	struct list_head	list;
431 	struct srcu_struct      srcu;
432 	struct nvme_subsystem	*subsys;
433 	unsigned		ns_id;
434 	struct nvme_ns_ids	ids;
435 	struct list_head	entry;
436 	struct kref		ref;
437 	bool			shared;
438 	int			instance;
439 	struct nvme_effects_log *effects;
440 
441 	struct cdev		cdev;
442 	struct device		cdev_device;
443 
444 	struct gendisk		*disk;
445 #ifdef CONFIG_NVME_MULTIPATH
446 	struct bio_list		requeue_list;
447 	spinlock_t		requeue_lock;
448 	struct work_struct	requeue_work;
449 	struct mutex		lock;
450 	unsigned long		flags;
451 #define NVME_NSHEAD_DISK_LIVE	0
452 	struct nvme_ns __rcu	*current_path[];
453 #endif
454 };
455 
456 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
457 {
458 	return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
459 }
460 
461 enum nvme_ns_features {
462 	NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
463 	NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
464 	NVME_NS_DEAC,		/* DEAC bit in Write Zeores supported */
465 };
466 
467 struct nvme_ns {
468 	struct list_head list;
469 
470 	struct nvme_ctrl *ctrl;
471 	struct request_queue *queue;
472 	struct gendisk *disk;
473 #ifdef CONFIG_NVME_MULTIPATH
474 	enum nvme_ana_state ana_state;
475 	u32 ana_grpid;
476 #endif
477 	struct list_head siblings;
478 	struct kref kref;
479 	struct nvme_ns_head *head;
480 
481 	int lba_shift;
482 	u16 ms;
483 	u16 pi_size;
484 	u16 sgs;
485 	u32 sws;
486 	u8 pi_type;
487 	u8 guard_type;
488 #ifdef CONFIG_BLK_DEV_ZONED
489 	u64 zsze;
490 #endif
491 	unsigned long features;
492 	unsigned long flags;
493 #define NVME_NS_REMOVING	0
494 #define NVME_NS_ANA_PENDING	2
495 #define NVME_NS_FORCE_RO	3
496 #define NVME_NS_READY		4
497 
498 	struct cdev		cdev;
499 	struct device		cdev_device;
500 
501 	struct nvme_fault_inject fault_inject;
502 
503 };
504 
505 /* NVMe ns supports metadata actions by the controller (generate/strip) */
506 static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
507 {
508 	return ns->pi_type && ns->ms == ns->pi_size;
509 }
510 
511 struct nvme_ctrl_ops {
512 	const char *name;
513 	struct module *module;
514 	unsigned int flags;
515 #define NVME_F_FABRICS			(1 << 0)
516 #define NVME_F_METADATA_SUPPORTED	(1 << 1)
517 #define NVME_F_BLOCKING			(1 << 2)
518 
519 	const struct attribute_group **dev_attr_groups;
520 	int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
521 	int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
522 	int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
523 	void (*free_ctrl)(struct nvme_ctrl *ctrl);
524 	void (*submit_async_event)(struct nvme_ctrl *ctrl);
525 	void (*delete_ctrl)(struct nvme_ctrl *ctrl);
526 	void (*stop_ctrl)(struct nvme_ctrl *ctrl);
527 	int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
528 	void (*print_device_info)(struct nvme_ctrl *ctrl);
529 	bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl);
530 };
531 
532 /*
533  * nvme command_id is constructed as such:
534  * | xxxx | xxxxxxxxxxxx |
535  *   gen    request tag
536  */
537 #define nvme_genctr_mask(gen)			(gen & 0xf)
538 #define nvme_cid_install_genctr(gen)		(nvme_genctr_mask(gen) << 12)
539 #define nvme_genctr_from_cid(cid)		((cid & 0xf000) >> 12)
540 #define nvme_tag_from_cid(cid)			(cid & 0xfff)
541 
542 static inline u16 nvme_cid(struct request *rq)
543 {
544 	return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
545 }
546 
547 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
548 		u16 command_id)
549 {
550 	u8 genctr = nvme_genctr_from_cid(command_id);
551 	u16 tag = nvme_tag_from_cid(command_id);
552 	struct request *rq;
553 
554 	rq = blk_mq_tag_to_rq(tags, tag);
555 	if (unlikely(!rq)) {
556 		pr_err("could not locate request for tag %#x\n",
557 			tag);
558 		return NULL;
559 	}
560 	if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
561 		dev_err(nvme_req(rq)->ctrl->device,
562 			"request %#x genctr mismatch (got %#x expected %#x)\n",
563 			tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
564 		return NULL;
565 	}
566 	return rq;
567 }
568 
569 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
570                 u16 command_id)
571 {
572 	return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
573 }
574 
575 /*
576  * Return the length of the string without the space padding
577  */
578 static inline int nvme_strlen(char *s, int len)
579 {
580 	while (s[len - 1] == ' ')
581 		len--;
582 	return len;
583 }
584 
585 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl)
586 {
587 	struct nvme_subsystem *subsys = ctrl->subsys;
588 
589 	if (ctrl->ops->print_device_info) {
590 		ctrl->ops->print_device_info(ctrl);
591 		return;
592 	}
593 
594 	dev_err(ctrl->device,
595 		"VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id,
596 		nvme_strlen(subsys->model, sizeof(subsys->model)),
597 		subsys->model, nvme_strlen(subsys->firmware_rev,
598 					   sizeof(subsys->firmware_rev)),
599 		subsys->firmware_rev);
600 }
601 
602 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
603 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
604 			    const char *dev_name);
605 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
606 void nvme_should_fail(struct request *req);
607 #else
608 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
609 					  const char *dev_name)
610 {
611 }
612 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
613 {
614 }
615 static inline void nvme_should_fail(struct request *req) {}
616 #endif
617 
618 bool nvme_wait_reset(struct nvme_ctrl *ctrl);
619 int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
620 
621 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
622 {
623 	int ret;
624 
625 	if (!ctrl->subsystem)
626 		return -ENOTTY;
627 	if (!nvme_wait_reset(ctrl))
628 		return -EBUSY;
629 
630 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
631 	if (ret)
632 		return ret;
633 
634 	return nvme_try_sched_reset(ctrl);
635 }
636 
637 /*
638  * Convert a 512B sector number to a device logical block number.
639  */
640 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
641 {
642 	return sector >> (ns->lba_shift - SECTOR_SHIFT);
643 }
644 
645 /*
646  * Convert a device logical block number to a 512B sector number.
647  */
648 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
649 {
650 	return lba << (ns->lba_shift - SECTOR_SHIFT);
651 }
652 
653 /*
654  * Convert byte length to nvme's 0-based num dwords
655  */
656 static inline u32 nvme_bytes_to_numd(size_t len)
657 {
658 	return (len >> 2) - 1;
659 }
660 
661 static inline bool nvme_is_ana_error(u16 status)
662 {
663 	switch (status & 0x7ff) {
664 	case NVME_SC_ANA_TRANSITION:
665 	case NVME_SC_ANA_INACCESSIBLE:
666 	case NVME_SC_ANA_PERSISTENT_LOSS:
667 		return true;
668 	default:
669 		return false;
670 	}
671 }
672 
673 static inline bool nvme_is_path_error(u16 status)
674 {
675 	/* check for a status code type of 'path related status' */
676 	return (status & 0x700) == 0x300;
677 }
678 
679 /*
680  * Fill in the status and result information from the CQE, and then figure out
681  * if blk-mq will need to use IPI magic to complete the request, and if yes do
682  * so.  If not let the caller complete the request without an indirect function
683  * call.
684  */
685 static inline bool nvme_try_complete_req(struct request *req, __le16 status,
686 		union nvme_result result)
687 {
688 	struct nvme_request *rq = nvme_req(req);
689 	struct nvme_ctrl *ctrl = rq->ctrl;
690 
691 	if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
692 		rq->genctr++;
693 
694 	rq->status = le16_to_cpu(status) >> 1;
695 	rq->result = result;
696 	/* inject error when permitted by fault injection framework */
697 	nvme_should_fail(req);
698 	if (unlikely(blk_should_fake_timeout(req->q)))
699 		return true;
700 	return blk_mq_complete_request_remote(req);
701 }
702 
703 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
704 {
705 	get_device(ctrl->device);
706 }
707 
708 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
709 {
710 	put_device(ctrl->device);
711 }
712 
713 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
714 {
715 	return !qid &&
716 		nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
717 }
718 
719 void nvme_complete_rq(struct request *req);
720 void nvme_complete_batch_req(struct request *req);
721 
722 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
723 						void (*fn)(struct request *rq))
724 {
725 	struct request *req;
726 
727 	rq_list_for_each(&iob->req_list, req) {
728 		fn(req);
729 		nvme_complete_batch_req(req);
730 	}
731 	blk_mq_end_request_batch(iob);
732 }
733 
734 blk_status_t nvme_host_path_error(struct request *req);
735 bool nvme_cancel_request(struct request *req, void *data);
736 void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
737 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
738 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
739 		enum nvme_ctrl_state new_state);
740 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown);
741 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
742 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
743 		const struct nvme_ctrl_ops *ops, unsigned long quirks);
744 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
745 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
746 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
747 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended);
748 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
749 		const struct blk_mq_ops *ops, unsigned int cmd_size);
750 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl);
751 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
752 		const struct blk_mq_ops *ops, unsigned int nr_maps,
753 		unsigned int cmd_size);
754 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl);
755 
756 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
757 
758 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
759 		volatile union nvme_result *res);
760 
761 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl);
762 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl);
763 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl);
764 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl);
765 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl);
766 void nvme_sync_queues(struct nvme_ctrl *ctrl);
767 void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
768 void nvme_unfreeze(struct nvme_ctrl *ctrl);
769 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
770 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
771 void nvme_start_freeze(struct nvme_ctrl *ctrl);
772 
773 static inline enum req_op nvme_req_op(struct nvme_command *cmd)
774 {
775 	return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
776 }
777 
778 #define NVME_QID_ANY -1
779 void nvme_init_request(struct request *req, struct nvme_command *cmd);
780 void nvme_cleanup_cmd(struct request *req);
781 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
782 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
783 		struct request *req);
784 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
785 		bool queue_live);
786 
787 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
788 		bool queue_live)
789 {
790 	if (likely(ctrl->state == NVME_CTRL_LIVE))
791 		return true;
792 	if (ctrl->ops->flags & NVME_F_FABRICS &&
793 	    ctrl->state == NVME_CTRL_DELETING)
794 		return queue_live;
795 	return __nvme_check_ready(ctrl, rq, queue_live);
796 }
797 
798 /*
799  * NSID shall be unique for all shared namespaces, or if at least one of the
800  * following conditions is met:
801  *   1. Namespace Management is supported by the controller
802  *   2. ANA is supported by the controller
803  *   3. NVM Set are supported by the controller
804  *
805  * In other case, private namespace are not required to report a unique NSID.
806  */
807 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
808 		struct nvme_ns_head *head)
809 {
810 	return head->shared ||
811 		(ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
812 		(ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
813 		(ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
814 }
815 
816 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
817 		void *buf, unsigned bufflen);
818 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
819 		union nvme_result *result, void *buffer, unsigned bufflen,
820 		int qid, int at_head,
821 		blk_mq_req_flags_t flags);
822 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
823 		      unsigned int dword11, void *buffer, size_t buflen,
824 		      u32 *result);
825 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
826 		      unsigned int dword11, void *buffer, size_t buflen,
827 		      u32 *result);
828 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
829 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
830 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
831 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
832 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
833 void nvme_queue_scan(struct nvme_ctrl *ctrl);
834 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
835 		void *log, size_t size, u64 offset);
836 bool nvme_tryget_ns_head(struct nvme_ns_head *head);
837 void nvme_put_ns_head(struct nvme_ns_head *head);
838 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
839 		const struct file_operations *fops, struct module *owner);
840 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
841 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode,
842 		unsigned int cmd, unsigned long arg);
843 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
844 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode,
845 		unsigned int cmd, unsigned long arg);
846 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
847 		unsigned long arg);
848 long nvme_dev_ioctl(struct file *file, unsigned int cmd,
849 		unsigned long arg);
850 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
851 		struct io_comp_batch *iob, unsigned int poll_flags);
852 int nvme_ns_head_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
853 		struct io_comp_batch *iob, unsigned int poll_flags);
854 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd,
855 		unsigned int issue_flags);
856 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd,
857 		unsigned int issue_flags);
858 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
859 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags);
860 
861 extern const struct attribute_group *nvme_ns_id_attr_groups[];
862 extern const struct pr_ops nvme_pr_ops;
863 extern const struct block_device_operations nvme_ns_head_ops;
864 extern const struct attribute_group nvme_dev_attrs_group;
865 extern const struct attribute_group *nvme_subsys_attrs_groups[];
866 extern const struct attribute_group *nvme_dev_attr_groups[];
867 extern const struct block_device_operations nvme_bdev_ops;
868 
869 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
870 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
871 #ifdef CONFIG_NVME_MULTIPATH
872 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
873 {
874 	return ctrl->ana_log_buf != NULL;
875 }
876 
877 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
878 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
879 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
880 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
881 void nvme_failover_req(struct request *req);
882 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
883 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
884 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid);
885 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
886 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
887 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
888 void nvme_mpath_update(struct nvme_ctrl *ctrl);
889 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
890 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
891 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
892 void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
893 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
894 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
895 void nvme_mpath_start_request(struct request *rq);
896 void nvme_mpath_end_request(struct request *rq);
897 
898 static inline void nvme_trace_bio_complete(struct request *req)
899 {
900 	struct nvme_ns *ns = req->q->queuedata;
901 
902 	if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio)
903 		trace_block_bio_complete(ns->head->disk->queue, req->bio);
904 }
905 
906 extern bool multipath;
907 extern struct device_attribute dev_attr_ana_grpid;
908 extern struct device_attribute dev_attr_ana_state;
909 extern struct device_attribute subsys_attr_iopolicy;
910 
911 #else
912 #define multipath false
913 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
914 {
915 	return false;
916 }
917 static inline void nvme_failover_req(struct request *req)
918 {
919 }
920 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
921 {
922 }
923 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
924 		struct nvme_ns_head *head)
925 {
926 	return 0;
927 }
928 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid)
929 {
930 }
931 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
932 {
933 }
934 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
935 {
936 	return false;
937 }
938 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
939 {
940 }
941 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
942 {
943 }
944 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
945 {
946 }
947 static inline void nvme_trace_bio_complete(struct request *req)
948 {
949 }
950 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
951 {
952 }
953 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
954 		struct nvme_id_ctrl *id)
955 {
956 	if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
957 		dev_warn(ctrl->device,
958 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
959 	return 0;
960 }
961 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
962 {
963 }
964 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
965 {
966 }
967 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
968 {
969 }
970 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
971 {
972 }
973 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
974 {
975 }
976 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
977 {
978 }
979 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
980 {
981 }
982 static inline void nvme_mpath_start_request(struct request *rq)
983 {
984 }
985 static inline void nvme_mpath_end_request(struct request *rq)
986 {
987 }
988 #endif /* CONFIG_NVME_MULTIPATH */
989 
990 int nvme_revalidate_zones(struct nvme_ns *ns);
991 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
992 		unsigned int nr_zones, report_zones_cb cb, void *data);
993 #ifdef CONFIG_BLK_DEV_ZONED
994 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
995 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
996 				       struct nvme_command *cmnd,
997 				       enum nvme_zone_mgmt_action action);
998 #else
999 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
1000 		struct request *req, struct nvme_command *cmnd,
1001 		enum nvme_zone_mgmt_action action)
1002 {
1003 	return BLK_STS_NOTSUPP;
1004 }
1005 
1006 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
1007 {
1008 	dev_warn(ns->ctrl->device,
1009 		 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
1010 	return -EPROTONOSUPPORT;
1011 }
1012 #endif
1013 
1014 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
1015 {
1016 	return dev_to_disk(dev)->private_data;
1017 }
1018 
1019 #ifdef CONFIG_NVME_HWMON
1020 int nvme_hwmon_init(struct nvme_ctrl *ctrl);
1021 void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
1022 #else
1023 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
1024 {
1025 	return 0;
1026 }
1027 
1028 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
1029 {
1030 }
1031 #endif
1032 
1033 static inline void nvme_start_request(struct request *rq)
1034 {
1035 	if (rq->cmd_flags & REQ_NVME_MPATH)
1036 		nvme_mpath_start_request(rq);
1037 	blk_mq_start_request(rq);
1038 }
1039 
1040 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
1041 {
1042 	return ctrl->sgls & ((1 << 0) | (1 << 1));
1043 }
1044 
1045 #ifdef CONFIG_NVME_AUTH
1046 int __init nvme_init_auth(void);
1047 void __exit nvme_exit_auth(void);
1048 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl);
1049 void nvme_auth_stop(struct nvme_ctrl *ctrl);
1050 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid);
1051 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid);
1052 void nvme_auth_free(struct nvme_ctrl *ctrl);
1053 #else
1054 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl)
1055 {
1056 	return 0;
1057 }
1058 static inline int __init nvme_init_auth(void)
1059 {
1060 	return 0;
1061 }
1062 static inline void __exit nvme_exit_auth(void)
1063 {
1064 }
1065 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {};
1066 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid)
1067 {
1068 	return -EPROTONOSUPPORT;
1069 }
1070 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid)
1071 {
1072 	return NVME_SC_AUTH_REQUIRED;
1073 }
1074 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {};
1075 #endif
1076 
1077 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1078 			 u8 opcode);
1079 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode);
1080 int nvme_execute_rq(struct request *rq, bool at_head);
1081 void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects,
1082 		       struct nvme_command *cmd, int status);
1083 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
1084 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
1085 void nvme_put_ns(struct nvme_ns *ns);
1086 
1087 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
1088 {
1089 	return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
1090 }
1091 
1092 #ifdef CONFIG_NVME_VERBOSE_ERRORS
1093 const unsigned char *nvme_get_error_status_str(u16 status);
1094 const unsigned char *nvme_get_opcode_str(u8 opcode);
1095 const unsigned char *nvme_get_admin_opcode_str(u8 opcode);
1096 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode);
1097 #else /* CONFIG_NVME_VERBOSE_ERRORS */
1098 static inline const unsigned char *nvme_get_error_status_str(u16 status)
1099 {
1100 	return "I/O Error";
1101 }
1102 static inline const unsigned char *nvme_get_opcode_str(u8 opcode)
1103 {
1104 	return "I/O Cmd";
1105 }
1106 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
1107 {
1108 	return "Admin Cmd";
1109 }
1110 
1111 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode)
1112 {
1113 	return "Fabrics Cmd";
1114 }
1115 #endif /* CONFIG_NVME_VERBOSE_ERRORS */
1116 
1117 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype)
1118 {
1119 	if (opcode == nvme_fabrics_command)
1120 		return nvme_get_fabrics_opcode_str(fctype);
1121 	return qid ? nvme_get_opcode_str(opcode) :
1122 		nvme_get_admin_opcode_str(opcode);
1123 }
1124 #endif /* _NVME_H */
1125