1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/lightnvm.h> 15 #include <linux/sed-opal.h> 16 #include <linux/fault-inject.h> 17 #include <linux/rcupdate.h> 18 19 extern unsigned int nvme_io_timeout; 20 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 21 22 extern unsigned int admin_timeout; 23 #define ADMIN_TIMEOUT (admin_timeout * HZ) 24 25 #define NVME_DEFAULT_KATO 5 26 #define NVME_KATO_GRACE 10 27 28 extern struct workqueue_struct *nvme_wq; 29 extern struct workqueue_struct *nvme_reset_wq; 30 extern struct workqueue_struct *nvme_delete_wq; 31 32 enum { 33 NVME_NS_LBA = 0, 34 NVME_NS_LIGHTNVM = 1, 35 }; 36 37 /* 38 * List of workarounds for devices that required behavior not specified in 39 * the standard. 40 */ 41 enum nvme_quirks { 42 /* 43 * Prefers I/O aligned to a stripe size specified in a vendor 44 * specific Identify field. 45 */ 46 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 47 48 /* 49 * The controller doesn't handle Identify value others than 0 or 1 50 * correctly. 51 */ 52 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 53 54 /* 55 * The controller deterministically returns O's on reads to 56 * logical blocks that deallocate was called on. 57 */ 58 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 59 60 /* 61 * The controller needs a delay before starts checking the device 62 * readiness, which is done by reading the NVME_CSTS_RDY bit. 63 */ 64 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 65 66 /* 67 * APST should not be used. 68 */ 69 NVME_QUIRK_NO_APST = (1 << 4), 70 71 /* 72 * The deepest sleep state should not be used. 73 */ 74 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 75 76 /* 77 * Supports the LighNVM command set if indicated in vs[1]. 78 */ 79 NVME_QUIRK_LIGHTNVM = (1 << 6), 80 81 /* 82 * Set MEDIUM priority on SQ creation 83 */ 84 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 85 86 /* 87 * Ignore device provided subnqn. 88 */ 89 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 90 91 /* 92 * Broken Write Zeroes. 93 */ 94 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 95 }; 96 97 /* 98 * Common request structure for NVMe passthrough. All drivers must have 99 * this structure as the first member of their request-private data. 100 */ 101 struct nvme_request { 102 struct nvme_command *cmd; 103 union nvme_result result; 104 u8 retries; 105 u8 flags; 106 u16 status; 107 struct nvme_ctrl *ctrl; 108 }; 109 110 /* 111 * Mark a bio as coming in through the mpath node. 112 */ 113 #define REQ_NVME_MPATH REQ_DRV 114 115 enum { 116 NVME_REQ_CANCELLED = (1 << 0), 117 NVME_REQ_USERCMD = (1 << 1), 118 }; 119 120 static inline struct nvme_request *nvme_req(struct request *req) 121 { 122 return blk_mq_rq_to_pdu(req); 123 } 124 125 static inline u16 nvme_req_qid(struct request *req) 126 { 127 if (!req->rq_disk) 128 return 0; 129 return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 130 } 131 132 /* The below value is the specific amount of delay needed before checking 133 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 134 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 135 * found empirically. 136 */ 137 #define NVME_QUIRK_DELAY_AMOUNT 2300 138 139 enum nvme_ctrl_state { 140 NVME_CTRL_NEW, 141 NVME_CTRL_LIVE, 142 NVME_CTRL_ADMIN_ONLY, /* Only admin queue live */ 143 NVME_CTRL_RESETTING, 144 NVME_CTRL_CONNECTING, 145 NVME_CTRL_DELETING, 146 NVME_CTRL_DEAD, 147 }; 148 149 struct nvme_fault_inject { 150 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 151 struct fault_attr attr; 152 struct dentry *parent; 153 bool dont_retry; /* DNR, do not retry */ 154 u16 status; /* status code */ 155 #endif 156 }; 157 158 struct nvme_ctrl { 159 bool comp_seen; 160 enum nvme_ctrl_state state; 161 bool identified; 162 spinlock_t lock; 163 struct mutex scan_lock; 164 const struct nvme_ctrl_ops *ops; 165 struct request_queue *admin_q; 166 struct request_queue *connect_q; 167 struct device *dev; 168 int instance; 169 int numa_node; 170 struct blk_mq_tag_set *tagset; 171 struct blk_mq_tag_set *admin_tagset; 172 struct list_head namespaces; 173 struct rw_semaphore namespaces_rwsem; 174 struct device ctrl_device; 175 struct device *device; /* char device */ 176 struct cdev cdev; 177 struct work_struct reset_work; 178 struct work_struct delete_work; 179 180 struct nvme_subsystem *subsys; 181 struct list_head subsys_entry; 182 183 struct opal_dev *opal_dev; 184 185 char name[12]; 186 u16 cntlid; 187 188 u32 ctrl_config; 189 u16 mtfa; 190 u32 queue_count; 191 192 u64 cap; 193 u32 page_size; 194 u32 max_hw_sectors; 195 u32 max_segments; 196 u16 crdt[3]; 197 u16 oncs; 198 u16 oacs; 199 u16 nssa; 200 u16 nr_streams; 201 u32 max_namespaces; 202 atomic_t abort_limit; 203 u8 vwc; 204 u32 vs; 205 u32 sgls; 206 u16 kas; 207 u8 npss; 208 u8 apsta; 209 u32 oaes; 210 u32 aen_result; 211 u32 ctratt; 212 unsigned int shutdown_timeout; 213 unsigned int kato; 214 bool subsystem; 215 unsigned long quirks; 216 struct nvme_id_power_state psd[32]; 217 struct nvme_effects_log *effects; 218 struct work_struct scan_work; 219 struct work_struct async_event_work; 220 struct delayed_work ka_work; 221 struct nvme_command ka_cmd; 222 struct work_struct fw_act_work; 223 unsigned long events; 224 225 #ifdef CONFIG_NVME_MULTIPATH 226 /* asymmetric namespace access: */ 227 u8 anacap; 228 u8 anatt; 229 u32 anagrpmax; 230 u32 nanagrpid; 231 struct mutex ana_lock; 232 struct nvme_ana_rsp_hdr *ana_log_buf; 233 size_t ana_log_size; 234 struct timer_list anatt_timer; 235 struct work_struct ana_work; 236 #endif 237 238 /* Power saving configuration */ 239 u64 ps_max_latency_us; 240 bool apst_enabled; 241 242 /* PCIe only: */ 243 u32 hmpre; 244 u32 hmmin; 245 u32 hmminds; 246 u16 hmmaxd; 247 248 /* Fabrics only */ 249 u16 sqsize; 250 u32 ioccsz; 251 u32 iorcsz; 252 u16 icdoff; 253 u16 maxcmd; 254 int nr_reconnects; 255 struct nvmf_ctrl_options *opts; 256 257 struct page *discard_page; 258 unsigned long discard_page_busy; 259 260 struct nvme_fault_inject fault_inject; 261 }; 262 263 enum nvme_iopolicy { 264 NVME_IOPOLICY_NUMA, 265 NVME_IOPOLICY_RR, 266 }; 267 268 struct nvme_subsystem { 269 int instance; 270 struct device dev; 271 /* 272 * Because we unregister the device on the last put we need 273 * a separate refcount. 274 */ 275 struct kref ref; 276 struct list_head entry; 277 struct mutex lock; 278 struct list_head ctrls; 279 struct list_head nsheads; 280 char subnqn[NVMF_NQN_SIZE]; 281 char serial[20]; 282 char model[40]; 283 char firmware_rev[8]; 284 u8 cmic; 285 u16 vendor_id; 286 u16 awupf; /* 0's based awupf value. */ 287 struct ida ns_ida; 288 #ifdef CONFIG_NVME_MULTIPATH 289 enum nvme_iopolicy iopolicy; 290 #endif 291 }; 292 293 /* 294 * Container structure for uniqueue namespace identifiers. 295 */ 296 struct nvme_ns_ids { 297 u8 eui64[8]; 298 u8 nguid[16]; 299 uuid_t uuid; 300 }; 301 302 /* 303 * Anchor structure for namespaces. There is one for each namespace in a 304 * NVMe subsystem that any of our controllers can see, and the namespace 305 * structure for each controller is chained of it. For private namespaces 306 * there is a 1:1 relation to our namespace structures, that is ->list 307 * only ever has a single entry for private namespaces. 308 */ 309 struct nvme_ns_head { 310 struct list_head list; 311 struct srcu_struct srcu; 312 struct nvme_subsystem *subsys; 313 unsigned ns_id; 314 struct nvme_ns_ids ids; 315 struct list_head entry; 316 struct kref ref; 317 int instance; 318 #ifdef CONFIG_NVME_MULTIPATH 319 struct gendisk *disk; 320 struct bio_list requeue_list; 321 spinlock_t requeue_lock; 322 struct work_struct requeue_work; 323 struct mutex lock; 324 struct nvme_ns __rcu *current_path[]; 325 #endif 326 }; 327 328 struct nvme_ns { 329 struct list_head list; 330 331 struct nvme_ctrl *ctrl; 332 struct request_queue *queue; 333 struct gendisk *disk; 334 #ifdef CONFIG_NVME_MULTIPATH 335 enum nvme_ana_state ana_state; 336 u32 ana_grpid; 337 #endif 338 struct list_head siblings; 339 struct nvm_dev *ndev; 340 struct kref kref; 341 struct nvme_ns_head *head; 342 343 int lba_shift; 344 u16 ms; 345 u16 sgs; 346 u32 sws; 347 bool ext; 348 u8 pi_type; 349 unsigned long flags; 350 #define NVME_NS_REMOVING 0 351 #define NVME_NS_DEAD 1 352 #define NVME_NS_ANA_PENDING 2 353 u16 noiob; 354 355 struct nvme_fault_inject fault_inject; 356 357 }; 358 359 struct nvme_ctrl_ops { 360 const char *name; 361 struct module *module; 362 unsigned int flags; 363 #define NVME_F_FABRICS (1 << 0) 364 #define NVME_F_METADATA_SUPPORTED (1 << 1) 365 #define NVME_F_PCI_P2PDMA (1 << 2) 366 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 367 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 368 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 369 void (*free_ctrl)(struct nvme_ctrl *ctrl); 370 void (*submit_async_event)(struct nvme_ctrl *ctrl); 371 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 372 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 373 }; 374 375 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 376 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 377 const char *dev_name); 378 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 379 void nvme_should_fail(struct request *req); 380 #else 381 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 382 const char *dev_name) 383 { 384 } 385 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 386 { 387 } 388 static inline void nvme_should_fail(struct request *req) {} 389 #endif 390 391 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 392 { 393 if (!ctrl->subsystem) 394 return -ENOTTY; 395 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 396 } 397 398 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 399 { 400 return (sector >> (ns->lba_shift - 9)); 401 } 402 403 static inline void nvme_end_request(struct request *req, __le16 status, 404 union nvme_result result) 405 { 406 struct nvme_request *rq = nvme_req(req); 407 408 rq->status = le16_to_cpu(status) >> 1; 409 rq->result = result; 410 /* inject error when permitted by fault injection framework */ 411 nvme_should_fail(req); 412 blk_mq_complete_request(req); 413 } 414 415 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 416 { 417 get_device(ctrl->device); 418 } 419 420 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 421 { 422 put_device(ctrl->device); 423 } 424 425 void nvme_complete_rq(struct request *req); 426 bool nvme_cancel_request(struct request *req, void *data, bool reserved); 427 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 428 enum nvme_ctrl_state new_state); 429 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 430 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 431 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 432 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 433 const struct nvme_ctrl_ops *ops, unsigned long quirks); 434 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 435 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 436 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 437 void nvme_put_ctrl(struct nvme_ctrl *ctrl); 438 int nvme_init_identify(struct nvme_ctrl *ctrl); 439 440 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 441 442 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 443 bool send); 444 445 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 446 volatile union nvme_result *res); 447 448 void nvme_stop_queues(struct nvme_ctrl *ctrl); 449 void nvme_start_queues(struct nvme_ctrl *ctrl); 450 void nvme_kill_queues(struct nvme_ctrl *ctrl); 451 void nvme_sync_queues(struct nvme_ctrl *ctrl); 452 void nvme_unfreeze(struct nvme_ctrl *ctrl); 453 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 454 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 455 void nvme_start_freeze(struct nvme_ctrl *ctrl); 456 457 #define NVME_QID_ANY -1 458 struct request *nvme_alloc_request(struct request_queue *q, 459 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 460 void nvme_cleanup_cmd(struct request *req); 461 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 462 struct nvme_command *cmd); 463 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 464 void *buf, unsigned bufflen); 465 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 466 union nvme_result *result, void *buffer, unsigned bufflen, 467 unsigned timeout, int qid, int at_head, 468 blk_mq_req_flags_t flags, bool poll); 469 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 470 unsigned int dword11, void *buffer, size_t buflen, 471 u32 *result); 472 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 473 unsigned int dword11, void *buffer, size_t buflen, 474 u32 *result); 475 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 476 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 477 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 478 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 479 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 480 481 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 482 void *log, size_t size, u64 offset); 483 484 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 485 extern const struct block_device_operations nvme_ns_head_ops; 486 487 #ifdef CONFIG_NVME_MULTIPATH 488 bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl); 489 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 490 struct nvme_ctrl *ctrl, int *flags); 491 void nvme_failover_req(struct request *req); 492 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 493 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 494 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 495 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 496 int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 497 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 498 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 499 void nvme_mpath_clear_current_path(struct nvme_ns *ns); 500 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 501 502 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 503 { 504 struct nvme_ns_head *head = ns->head; 505 506 if (head->disk && list_empty(&head->list)) 507 kblockd_schedule_work(&head->requeue_work); 508 } 509 510 extern struct device_attribute dev_attr_ana_grpid; 511 extern struct device_attribute dev_attr_ana_state; 512 extern struct device_attribute subsys_attr_iopolicy; 513 514 #else 515 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 516 { 517 return false; 518 } 519 /* 520 * Without the multipath code enabled, multiple controller per subsystems are 521 * visible as devices and thus we cannot use the subsystem instance. 522 */ 523 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 524 struct nvme_ctrl *ctrl, int *flags) 525 { 526 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 527 } 528 529 static inline void nvme_failover_req(struct request *req) 530 { 531 } 532 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 533 { 534 } 535 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 536 struct nvme_ns_head *head) 537 { 538 return 0; 539 } 540 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 541 struct nvme_id_ns *id) 542 { 543 } 544 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 545 { 546 } 547 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns) 548 { 549 } 550 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 551 { 552 } 553 static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 554 struct nvme_id_ctrl *id) 555 { 556 if (ctrl->subsys->cmic & (1 << 3)) 557 dev_warn(ctrl->device, 558 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 559 return 0; 560 } 561 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 562 { 563 } 564 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 565 { 566 } 567 #endif /* CONFIG_NVME_MULTIPATH */ 568 569 #ifdef CONFIG_NVM 570 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 571 void nvme_nvm_unregister(struct nvme_ns *ns); 572 extern const struct attribute_group nvme_nvm_attr_group; 573 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 574 #else 575 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 576 int node) 577 { 578 return 0; 579 } 580 581 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 582 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 583 unsigned long arg) 584 { 585 return -ENOTTY; 586 } 587 #endif /* CONFIG_NVM */ 588 589 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 590 { 591 return dev_to_disk(dev)->private_data; 592 } 593 594 #endif /* _NVME_H */ 595