1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/lightnvm.h> 15 #include <linux/sed-opal.h> 16 #include <linux/fault-inject.h> 17 #include <linux/rcupdate.h> 18 #include <linux/wait.h> 19 20 #include <trace/events/block.h> 21 22 extern unsigned int nvme_io_timeout; 23 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 24 25 extern unsigned int admin_timeout; 26 #define ADMIN_TIMEOUT (admin_timeout * HZ) 27 28 #define NVME_DEFAULT_KATO 5 29 #define NVME_KATO_GRACE 10 30 31 extern struct workqueue_struct *nvme_wq; 32 extern struct workqueue_struct *nvme_reset_wq; 33 extern struct workqueue_struct *nvme_delete_wq; 34 35 enum { 36 NVME_NS_LBA = 0, 37 NVME_NS_LIGHTNVM = 1, 38 }; 39 40 /* 41 * List of workarounds for devices that required behavior not specified in 42 * the standard. 43 */ 44 enum nvme_quirks { 45 /* 46 * Prefers I/O aligned to a stripe size specified in a vendor 47 * specific Identify field. 48 */ 49 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 50 51 /* 52 * The controller doesn't handle Identify value others than 0 or 1 53 * correctly. 54 */ 55 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 56 57 /* 58 * The controller deterministically returns O's on reads to 59 * logical blocks that deallocate was called on. 60 */ 61 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 62 63 /* 64 * The controller needs a delay before starts checking the device 65 * readiness, which is done by reading the NVME_CSTS_RDY bit. 66 */ 67 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 68 69 /* 70 * APST should not be used. 71 */ 72 NVME_QUIRK_NO_APST = (1 << 4), 73 74 /* 75 * The deepest sleep state should not be used. 76 */ 77 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 78 79 /* 80 * Supports the LighNVM command set if indicated in vs[1]. 81 */ 82 NVME_QUIRK_LIGHTNVM = (1 << 6), 83 84 /* 85 * Set MEDIUM priority on SQ creation 86 */ 87 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 88 89 /* 90 * Ignore device provided subnqn. 91 */ 92 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 93 94 /* 95 * Broken Write Zeroes. 96 */ 97 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 98 99 /* 100 * Force simple suspend/resume path. 101 */ 102 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 103 104 /* 105 * Use only one interrupt vector for all queues 106 */ 107 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 108 109 /* 110 * Use non-standard 128 bytes SQEs. 111 */ 112 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 113 114 /* 115 * Prevent tag overlap between queues 116 */ 117 NVME_QUIRK_SHARED_TAGS = (1 << 13), 118 119 /* 120 * Don't change the value of the temperature threshold feature 121 */ 122 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 123 }; 124 125 /* 126 * Common request structure for NVMe passthrough. All drivers must have 127 * this structure as the first member of their request-private data. 128 */ 129 struct nvme_request { 130 struct nvme_command *cmd; 131 union nvme_result result; 132 u8 retries; 133 u8 flags; 134 u16 status; 135 struct nvme_ctrl *ctrl; 136 }; 137 138 /* 139 * Mark a bio as coming in through the mpath node. 140 */ 141 #define REQ_NVME_MPATH REQ_DRV 142 143 enum { 144 NVME_REQ_CANCELLED = (1 << 0), 145 NVME_REQ_USERCMD = (1 << 1), 146 }; 147 148 static inline struct nvme_request *nvme_req(struct request *req) 149 { 150 return blk_mq_rq_to_pdu(req); 151 } 152 153 static inline u16 nvme_req_qid(struct request *req) 154 { 155 if (!req->rq_disk) 156 return 0; 157 return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 158 } 159 160 /* The below value is the specific amount of delay needed before checking 161 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 162 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 163 * found empirically. 164 */ 165 #define NVME_QUIRK_DELAY_AMOUNT 2300 166 167 enum nvme_ctrl_state { 168 NVME_CTRL_NEW, 169 NVME_CTRL_LIVE, 170 NVME_CTRL_RESETTING, 171 NVME_CTRL_CONNECTING, 172 NVME_CTRL_DELETING, 173 NVME_CTRL_DEAD, 174 }; 175 176 struct nvme_fault_inject { 177 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 178 struct fault_attr attr; 179 struct dentry *parent; 180 bool dont_retry; /* DNR, do not retry */ 181 u16 status; /* status code */ 182 #endif 183 }; 184 185 struct nvme_ctrl { 186 bool comp_seen; 187 enum nvme_ctrl_state state; 188 bool identified; 189 spinlock_t lock; 190 struct mutex scan_lock; 191 const struct nvme_ctrl_ops *ops; 192 struct request_queue *admin_q; 193 struct request_queue *connect_q; 194 struct request_queue *fabrics_q; 195 struct device *dev; 196 int instance; 197 int numa_node; 198 struct blk_mq_tag_set *tagset; 199 struct blk_mq_tag_set *admin_tagset; 200 struct list_head namespaces; 201 struct rw_semaphore namespaces_rwsem; 202 struct device ctrl_device; 203 struct device *device; /* char device */ 204 struct cdev cdev; 205 struct work_struct reset_work; 206 struct work_struct delete_work; 207 wait_queue_head_t state_wq; 208 209 struct nvme_subsystem *subsys; 210 struct list_head subsys_entry; 211 212 struct opal_dev *opal_dev; 213 214 char name[12]; 215 u16 cntlid; 216 217 u32 ctrl_config; 218 u16 mtfa; 219 u32 queue_count; 220 221 u64 cap; 222 u32 page_size; 223 u32 max_hw_sectors; 224 u32 max_segments; 225 u16 crdt[3]; 226 u16 oncs; 227 u16 oacs; 228 u16 nssa; 229 u16 nr_streams; 230 u16 sqsize; 231 u32 max_namespaces; 232 atomic_t abort_limit; 233 u8 vwc; 234 u32 vs; 235 u32 sgls; 236 u16 kas; 237 u8 npss; 238 u8 apsta; 239 u16 wctemp; 240 u16 cctemp; 241 u32 oaes; 242 u32 aen_result; 243 u32 ctratt; 244 unsigned int shutdown_timeout; 245 unsigned int kato; 246 bool subsystem; 247 unsigned long quirks; 248 struct nvme_id_power_state psd[32]; 249 struct nvme_effects_log *effects; 250 struct work_struct scan_work; 251 struct work_struct async_event_work; 252 struct delayed_work ka_work; 253 struct nvme_command ka_cmd; 254 struct work_struct fw_act_work; 255 unsigned long events; 256 257 #ifdef CONFIG_NVME_MULTIPATH 258 /* asymmetric namespace access: */ 259 u8 anacap; 260 u8 anatt; 261 u32 anagrpmax; 262 u32 nanagrpid; 263 struct mutex ana_lock; 264 struct nvme_ana_rsp_hdr *ana_log_buf; 265 size_t ana_log_size; 266 struct timer_list anatt_timer; 267 struct work_struct ana_work; 268 #endif 269 270 /* Power saving configuration */ 271 u64 ps_max_latency_us; 272 bool apst_enabled; 273 274 /* PCIe only: */ 275 u32 hmpre; 276 u32 hmmin; 277 u32 hmminds; 278 u16 hmmaxd; 279 280 /* Fabrics only */ 281 u32 ioccsz; 282 u32 iorcsz; 283 u16 icdoff; 284 u16 maxcmd; 285 int nr_reconnects; 286 struct nvmf_ctrl_options *opts; 287 288 struct page *discard_page; 289 unsigned long discard_page_busy; 290 291 struct nvme_fault_inject fault_inject; 292 }; 293 294 enum nvme_iopolicy { 295 NVME_IOPOLICY_NUMA, 296 NVME_IOPOLICY_RR, 297 }; 298 299 struct nvme_subsystem { 300 int instance; 301 struct device dev; 302 /* 303 * Because we unregister the device on the last put we need 304 * a separate refcount. 305 */ 306 struct kref ref; 307 struct list_head entry; 308 struct mutex lock; 309 struct list_head ctrls; 310 struct list_head nsheads; 311 char subnqn[NVMF_NQN_SIZE]; 312 char serial[20]; 313 char model[40]; 314 char firmware_rev[8]; 315 u8 cmic; 316 u16 vendor_id; 317 u16 awupf; /* 0's based awupf value. */ 318 struct ida ns_ida; 319 #ifdef CONFIG_NVME_MULTIPATH 320 enum nvme_iopolicy iopolicy; 321 #endif 322 }; 323 324 /* 325 * Container structure for uniqueue namespace identifiers. 326 */ 327 struct nvme_ns_ids { 328 u8 eui64[8]; 329 u8 nguid[16]; 330 uuid_t uuid; 331 }; 332 333 /* 334 * Anchor structure for namespaces. There is one for each namespace in a 335 * NVMe subsystem that any of our controllers can see, and the namespace 336 * structure for each controller is chained of it. For private namespaces 337 * there is a 1:1 relation to our namespace structures, that is ->list 338 * only ever has a single entry for private namespaces. 339 */ 340 struct nvme_ns_head { 341 struct list_head list; 342 struct srcu_struct srcu; 343 struct nvme_subsystem *subsys; 344 unsigned ns_id; 345 struct nvme_ns_ids ids; 346 struct list_head entry; 347 struct kref ref; 348 int instance; 349 #ifdef CONFIG_NVME_MULTIPATH 350 struct gendisk *disk; 351 struct bio_list requeue_list; 352 spinlock_t requeue_lock; 353 struct work_struct requeue_work; 354 struct mutex lock; 355 struct nvme_ns __rcu *current_path[]; 356 #endif 357 }; 358 359 struct nvme_ns { 360 struct list_head list; 361 362 struct nvme_ctrl *ctrl; 363 struct request_queue *queue; 364 struct gendisk *disk; 365 #ifdef CONFIG_NVME_MULTIPATH 366 enum nvme_ana_state ana_state; 367 u32 ana_grpid; 368 #endif 369 struct list_head siblings; 370 struct nvm_dev *ndev; 371 struct kref kref; 372 struct nvme_ns_head *head; 373 374 int lba_shift; 375 u16 ms; 376 u16 sgs; 377 u32 sws; 378 bool ext; 379 u8 pi_type; 380 unsigned long flags; 381 #define NVME_NS_REMOVING 0 382 #define NVME_NS_DEAD 1 383 #define NVME_NS_ANA_PENDING 2 384 u16 noiob; 385 386 struct nvme_fault_inject fault_inject; 387 388 }; 389 390 struct nvme_ctrl_ops { 391 const char *name; 392 struct module *module; 393 unsigned int flags; 394 #define NVME_F_FABRICS (1 << 0) 395 #define NVME_F_METADATA_SUPPORTED (1 << 1) 396 #define NVME_F_PCI_P2PDMA (1 << 2) 397 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 398 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 399 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 400 void (*free_ctrl)(struct nvme_ctrl *ctrl); 401 void (*submit_async_event)(struct nvme_ctrl *ctrl); 402 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 403 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 404 }; 405 406 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 407 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 408 const char *dev_name); 409 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 410 void nvme_should_fail(struct request *req); 411 #else 412 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 413 const char *dev_name) 414 { 415 } 416 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 417 { 418 } 419 static inline void nvme_should_fail(struct request *req) {} 420 #endif 421 422 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 423 { 424 if (!ctrl->subsystem) 425 return -ENOTTY; 426 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 427 } 428 429 /* 430 * Convert a 512B sector number to a device logical block number. 431 */ 432 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 433 { 434 return sector >> (ns->lba_shift - SECTOR_SHIFT); 435 } 436 437 /* 438 * Convert a device logical block number to a 512B sector number. 439 */ 440 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 441 { 442 return lba << (ns->lba_shift - SECTOR_SHIFT); 443 } 444 445 static inline void nvme_end_request(struct request *req, __le16 status, 446 union nvme_result result) 447 { 448 struct nvme_request *rq = nvme_req(req); 449 450 rq->status = le16_to_cpu(status) >> 1; 451 rq->result = result; 452 /* inject error when permitted by fault injection framework */ 453 nvme_should_fail(req); 454 blk_mq_complete_request(req); 455 } 456 457 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 458 { 459 get_device(ctrl->device); 460 } 461 462 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 463 { 464 put_device(ctrl->device); 465 } 466 467 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 468 { 469 return !qid && command_id >= NVME_AQ_BLK_MQ_DEPTH; 470 } 471 472 void nvme_complete_rq(struct request *req); 473 bool nvme_cancel_request(struct request *req, void *data, bool reserved); 474 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 475 enum nvme_ctrl_state new_state); 476 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 477 int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 478 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 479 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 480 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 481 const struct nvme_ctrl_ops *ops, unsigned long quirks); 482 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 483 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 484 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 485 void nvme_put_ctrl(struct nvme_ctrl *ctrl); 486 int nvme_init_identify(struct nvme_ctrl *ctrl); 487 488 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 489 490 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 491 bool send); 492 493 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 494 volatile union nvme_result *res); 495 496 void nvme_stop_queues(struct nvme_ctrl *ctrl); 497 void nvme_start_queues(struct nvme_ctrl *ctrl); 498 void nvme_kill_queues(struct nvme_ctrl *ctrl); 499 void nvme_sync_queues(struct nvme_ctrl *ctrl); 500 void nvme_unfreeze(struct nvme_ctrl *ctrl); 501 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 502 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 503 void nvme_start_freeze(struct nvme_ctrl *ctrl); 504 505 #define NVME_QID_ANY -1 506 struct request *nvme_alloc_request(struct request_queue *q, 507 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 508 void nvme_cleanup_cmd(struct request *req); 509 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 510 struct nvme_command *cmd); 511 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 512 void *buf, unsigned bufflen); 513 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 514 union nvme_result *result, void *buffer, unsigned bufflen, 515 unsigned timeout, int qid, int at_head, 516 blk_mq_req_flags_t flags, bool poll); 517 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 518 unsigned int dword11, void *buffer, size_t buflen, 519 u32 *result); 520 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 521 unsigned int dword11, void *buffer, size_t buflen, 522 u32 *result); 523 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 524 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 525 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 526 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 527 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 528 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 529 530 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 531 void *log, size_t size, u64 offset); 532 533 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 534 extern const struct block_device_operations nvme_ns_head_ops; 535 536 #ifdef CONFIG_NVME_MULTIPATH 537 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 538 { 539 return ctrl->ana_log_buf != NULL; 540 } 541 542 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 543 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 544 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 545 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 546 struct nvme_ctrl *ctrl, int *flags); 547 void nvme_failover_req(struct request *req); 548 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 549 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 550 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 551 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 552 int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 553 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 554 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 555 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 556 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 557 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 558 559 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 560 { 561 struct nvme_ns_head *head = ns->head; 562 563 if (head->disk && list_empty(&head->list)) 564 kblockd_schedule_work(&head->requeue_work); 565 } 566 567 static inline void nvme_trace_bio_complete(struct request *req, 568 blk_status_t status) 569 { 570 struct nvme_ns *ns = req->q->queuedata; 571 572 if (req->cmd_flags & REQ_NVME_MPATH) 573 trace_block_bio_complete(ns->head->disk->queue, 574 req->bio, status); 575 } 576 577 extern struct device_attribute dev_attr_ana_grpid; 578 extern struct device_attribute dev_attr_ana_state; 579 extern struct device_attribute subsys_attr_iopolicy; 580 581 #else 582 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 583 { 584 return false; 585 } 586 /* 587 * Without the multipath code enabled, multiple controller per subsystems are 588 * visible as devices and thus we cannot use the subsystem instance. 589 */ 590 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 591 struct nvme_ctrl *ctrl, int *flags) 592 { 593 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 594 } 595 596 static inline void nvme_failover_req(struct request *req) 597 { 598 } 599 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 600 { 601 } 602 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 603 struct nvme_ns_head *head) 604 { 605 return 0; 606 } 607 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 608 struct nvme_id_ns *id) 609 { 610 } 611 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 612 { 613 } 614 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 615 { 616 return false; 617 } 618 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 619 { 620 } 621 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 622 { 623 } 624 static inline void nvme_trace_bio_complete(struct request *req, 625 blk_status_t status) 626 { 627 } 628 static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 629 struct nvme_id_ctrl *id) 630 { 631 if (ctrl->subsys->cmic & (1 << 3)) 632 dev_warn(ctrl->device, 633 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 634 return 0; 635 } 636 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 637 { 638 } 639 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 640 { 641 } 642 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 643 { 644 } 645 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 646 { 647 } 648 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 649 { 650 } 651 #endif /* CONFIG_NVME_MULTIPATH */ 652 653 #ifdef CONFIG_NVM 654 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 655 void nvme_nvm_unregister(struct nvme_ns *ns); 656 extern const struct attribute_group nvme_nvm_attr_group; 657 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 658 #else 659 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 660 int node) 661 { 662 return 0; 663 } 664 665 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 666 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 667 unsigned long arg) 668 { 669 return -ENOTTY; 670 } 671 #endif /* CONFIG_NVM */ 672 673 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 674 { 675 return dev_to_disk(dev)->private_data; 676 } 677 678 #ifdef CONFIG_NVME_HWMON 679 void nvme_hwmon_init(struct nvme_ctrl *ctrl); 680 #else 681 static inline void nvme_hwmon_init(struct nvme_ctrl *ctrl) { } 682 #endif 683 684 #endif /* _NVME_H */ 685