1 /* 2 * Copyright (c) 2011-2014, Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 */ 13 14 #ifndef _NVME_H 15 #define _NVME_H 16 17 #include <linux/nvme.h> 18 #include <linux/cdev.h> 19 #include <linux/pci.h> 20 #include <linux/kref.h> 21 #include <linux/blk-mq.h> 22 #include <linux/lightnvm.h> 23 #include <linux/sed-opal.h> 24 #include <linux/fault-inject.h> 25 26 extern unsigned int nvme_io_timeout; 27 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 28 29 extern unsigned int admin_timeout; 30 #define ADMIN_TIMEOUT (admin_timeout * HZ) 31 32 #define NVME_DEFAULT_KATO 5 33 #define NVME_KATO_GRACE 10 34 35 extern struct workqueue_struct *nvme_wq; 36 extern struct workqueue_struct *nvme_reset_wq; 37 extern struct workqueue_struct *nvme_delete_wq; 38 39 enum { 40 NVME_NS_LBA = 0, 41 NVME_NS_LIGHTNVM = 1, 42 }; 43 44 /* 45 * List of workarounds for devices that required behavior not specified in 46 * the standard. 47 */ 48 enum nvme_quirks { 49 /* 50 * Prefers I/O aligned to a stripe size specified in a vendor 51 * specific Identify field. 52 */ 53 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 54 55 /* 56 * The controller doesn't handle Identify value others than 0 or 1 57 * correctly. 58 */ 59 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 60 61 /* 62 * The controller deterministically returns O's on reads to 63 * logical blocks that deallocate was called on. 64 */ 65 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 66 67 /* 68 * The controller needs a delay before starts checking the device 69 * readiness, which is done by reading the NVME_CSTS_RDY bit. 70 */ 71 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 72 73 /* 74 * APST should not be used. 75 */ 76 NVME_QUIRK_NO_APST = (1 << 4), 77 78 /* 79 * The deepest sleep state should not be used. 80 */ 81 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 82 83 /* 84 * Supports the LighNVM command set if indicated in vs[1]. 85 */ 86 NVME_QUIRK_LIGHTNVM = (1 << 6), 87 88 /* 89 * Set MEDIUM priority on SQ creation 90 */ 91 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 92 }; 93 94 /* 95 * Common request structure for NVMe passthrough. All drivers must have 96 * this structure as the first member of their request-private data. 97 */ 98 struct nvme_request { 99 struct nvme_command *cmd; 100 union nvme_result result; 101 u8 retries; 102 u8 flags; 103 u16 status; 104 }; 105 106 /* 107 * Mark a bio as coming in through the mpath node. 108 */ 109 #define REQ_NVME_MPATH REQ_DRV 110 111 enum { 112 NVME_REQ_CANCELLED = (1 << 0), 113 NVME_REQ_USERCMD = (1 << 1), 114 }; 115 116 static inline struct nvme_request *nvme_req(struct request *req) 117 { 118 return blk_mq_rq_to_pdu(req); 119 } 120 121 /* The below value is the specific amount of delay needed before checking 122 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 123 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 124 * found empirically. 125 */ 126 #define NVME_QUIRK_DELAY_AMOUNT 2300 127 128 enum nvme_ctrl_state { 129 NVME_CTRL_NEW, 130 NVME_CTRL_LIVE, 131 NVME_CTRL_ADMIN_ONLY, /* Only admin queue live */ 132 NVME_CTRL_RESETTING, 133 NVME_CTRL_CONNECTING, 134 NVME_CTRL_DELETING, 135 NVME_CTRL_DEAD, 136 }; 137 138 struct nvme_ctrl { 139 enum nvme_ctrl_state state; 140 bool identified; 141 spinlock_t lock; 142 const struct nvme_ctrl_ops *ops; 143 struct request_queue *admin_q; 144 struct request_queue *connect_q; 145 struct device *dev; 146 int instance; 147 struct blk_mq_tag_set *tagset; 148 struct blk_mq_tag_set *admin_tagset; 149 struct list_head namespaces; 150 struct rw_semaphore namespaces_rwsem; 151 struct device ctrl_device; 152 struct device *device; /* char device */ 153 struct cdev cdev; 154 struct work_struct reset_work; 155 struct work_struct delete_work; 156 157 struct nvme_subsystem *subsys; 158 struct list_head subsys_entry; 159 160 struct opal_dev *opal_dev; 161 162 char name[12]; 163 u16 cntlid; 164 165 u32 ctrl_config; 166 u16 mtfa; 167 u32 queue_count; 168 169 u64 cap; 170 u32 page_size; 171 u32 max_hw_sectors; 172 u16 oncs; 173 u16 oacs; 174 u16 nssa; 175 u16 nr_streams; 176 atomic_t abort_limit; 177 u8 vwc; 178 u32 vs; 179 u32 sgls; 180 u16 kas; 181 u8 npss; 182 u8 apsta; 183 u32 aen_result; 184 unsigned int shutdown_timeout; 185 unsigned int kato; 186 bool subsystem; 187 unsigned long quirks; 188 struct nvme_id_power_state psd[32]; 189 struct nvme_effects_log *effects; 190 struct work_struct scan_work; 191 struct work_struct async_event_work; 192 struct delayed_work ka_work; 193 struct nvme_command ka_cmd; 194 struct work_struct fw_act_work; 195 196 /* Power saving configuration */ 197 u64 ps_max_latency_us; 198 bool apst_enabled; 199 200 /* PCIe only: */ 201 u32 hmpre; 202 u32 hmmin; 203 u32 hmminds; 204 u16 hmmaxd; 205 206 /* Fabrics only */ 207 u16 sqsize; 208 u32 ioccsz; 209 u32 iorcsz; 210 u16 icdoff; 211 u16 maxcmd; 212 int nr_reconnects; 213 struct nvmf_ctrl_options *opts; 214 }; 215 216 struct nvme_subsystem { 217 int instance; 218 struct device dev; 219 /* 220 * Because we unregister the device on the last put we need 221 * a separate refcount. 222 */ 223 struct kref ref; 224 struct list_head entry; 225 struct mutex lock; 226 struct list_head ctrls; 227 struct list_head nsheads; 228 char subnqn[NVMF_NQN_SIZE]; 229 char serial[20]; 230 char model[40]; 231 char firmware_rev[8]; 232 u8 cmic; 233 u16 vendor_id; 234 struct ida ns_ida; 235 }; 236 237 /* 238 * Container structure for uniqueue namespace identifiers. 239 */ 240 struct nvme_ns_ids { 241 u8 eui64[8]; 242 u8 nguid[16]; 243 uuid_t uuid; 244 }; 245 246 /* 247 * Anchor structure for namespaces. There is one for each namespace in a 248 * NVMe subsystem that any of our controllers can see, and the namespace 249 * structure for each controller is chained of it. For private namespaces 250 * there is a 1:1 relation to our namespace structures, that is ->list 251 * only ever has a single entry for private namespaces. 252 */ 253 struct nvme_ns_head { 254 #ifdef CONFIG_NVME_MULTIPATH 255 struct gendisk *disk; 256 struct nvme_ns __rcu *current_path; 257 struct bio_list requeue_list; 258 spinlock_t requeue_lock; 259 struct work_struct requeue_work; 260 #endif 261 struct list_head list; 262 struct srcu_struct srcu; 263 struct nvme_subsystem *subsys; 264 unsigned ns_id; 265 struct nvme_ns_ids ids; 266 struct list_head entry; 267 struct kref ref; 268 int instance; 269 }; 270 271 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 272 struct nvme_fault_inject { 273 struct fault_attr attr; 274 struct dentry *parent; 275 bool dont_retry; /* DNR, do not retry */ 276 u16 status; /* status code */ 277 }; 278 #endif 279 280 struct nvme_ns { 281 struct list_head list; 282 283 struct nvme_ctrl *ctrl; 284 struct request_queue *queue; 285 struct gendisk *disk; 286 struct list_head siblings; 287 struct nvm_dev *ndev; 288 struct kref kref; 289 struct nvme_ns_head *head; 290 291 int lba_shift; 292 u16 ms; 293 u16 sgs; 294 u32 sws; 295 bool ext; 296 u8 pi_type; 297 unsigned long flags; 298 #define NVME_NS_REMOVING 0 299 #define NVME_NS_DEAD 1 300 u16 noiob; 301 302 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 303 struct nvme_fault_inject fault_inject; 304 #endif 305 306 }; 307 308 struct nvme_ctrl_ops { 309 const char *name; 310 struct module *module; 311 unsigned int flags; 312 #define NVME_F_FABRICS (1 << 0) 313 #define NVME_F_METADATA_SUPPORTED (1 << 1) 314 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 315 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 316 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 317 void (*free_ctrl)(struct nvme_ctrl *ctrl); 318 void (*submit_async_event)(struct nvme_ctrl *ctrl); 319 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 320 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 321 int (*reinit_request)(void *data, struct request *rq); 322 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 323 }; 324 325 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 326 void nvme_fault_inject_init(struct nvme_ns *ns); 327 void nvme_fault_inject_fini(struct nvme_ns *ns); 328 void nvme_should_fail(struct request *req); 329 #else 330 static inline void nvme_fault_inject_init(struct nvme_ns *ns) {} 331 static inline void nvme_fault_inject_fini(struct nvme_ns *ns) {} 332 static inline void nvme_should_fail(struct request *req) {} 333 #endif 334 335 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) 336 { 337 u32 val = 0; 338 339 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) 340 return false; 341 return val & NVME_CSTS_RDY; 342 } 343 344 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 345 { 346 if (!ctrl->subsystem) 347 return -ENOTTY; 348 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 349 } 350 351 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 352 { 353 return (sector >> (ns->lba_shift - 9)); 354 } 355 356 static inline void nvme_cleanup_cmd(struct request *req) 357 { 358 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 359 kfree(page_address(req->special_vec.bv_page) + 360 req->special_vec.bv_offset); 361 } 362 } 363 364 static inline void nvme_end_request(struct request *req, __le16 status, 365 union nvme_result result) 366 { 367 struct nvme_request *rq = nvme_req(req); 368 369 rq->status = le16_to_cpu(status) >> 1; 370 rq->result = result; 371 /* inject error when permitted by fault injection framework */ 372 nvme_should_fail(req); 373 blk_mq_complete_request(req); 374 } 375 376 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 377 { 378 get_device(ctrl->device); 379 } 380 381 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 382 { 383 put_device(ctrl->device); 384 } 385 386 void nvme_complete_rq(struct request *req); 387 void nvme_cancel_request(struct request *req, void *data, bool reserved); 388 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 389 enum nvme_ctrl_state new_state); 390 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 391 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 392 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 393 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 394 const struct nvme_ctrl_ops *ops, unsigned long quirks); 395 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 396 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 397 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 398 void nvme_put_ctrl(struct nvme_ctrl *ctrl); 399 int nvme_init_identify(struct nvme_ctrl *ctrl); 400 401 void nvme_queue_scan(struct nvme_ctrl *ctrl); 402 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 403 404 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 405 bool send); 406 407 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 408 union nvme_result *res); 409 410 void nvme_stop_queues(struct nvme_ctrl *ctrl); 411 void nvme_start_queues(struct nvme_ctrl *ctrl); 412 void nvme_kill_queues(struct nvme_ctrl *ctrl); 413 void nvme_unfreeze(struct nvme_ctrl *ctrl); 414 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 415 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 416 void nvme_start_freeze(struct nvme_ctrl *ctrl); 417 int nvme_reinit_tagset(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set); 418 419 #define NVME_QID_ANY -1 420 struct request *nvme_alloc_request(struct request_queue *q, 421 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 422 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 423 struct nvme_command *cmd); 424 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 425 void *buf, unsigned bufflen); 426 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 427 union nvme_result *result, void *buffer, unsigned bufflen, 428 unsigned timeout, int qid, int at_head, 429 blk_mq_req_flags_t flags); 430 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 431 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 432 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 433 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 434 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 435 int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 436 437 int nvme_get_log_ext(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 438 u8 log_page, void *log, size_t size, u64 offset); 439 440 extern const struct attribute_group nvme_ns_id_attr_group; 441 extern const struct block_device_operations nvme_ns_head_ops; 442 443 #ifdef CONFIG_NVME_MULTIPATH 444 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 445 struct nvme_ctrl *ctrl, int *flags); 446 void nvme_failover_req(struct request *req); 447 bool nvme_req_needs_failover(struct request *req, blk_status_t error); 448 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 449 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 450 void nvme_mpath_add_disk(struct nvme_ns_head *head); 451 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 452 453 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns) 454 { 455 struct nvme_ns_head *head = ns->head; 456 457 if (head && ns == srcu_dereference(head->current_path, &head->srcu)) 458 rcu_assign_pointer(head->current_path, NULL); 459 } 460 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 461 462 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 463 { 464 struct nvme_ns_head *head = ns->head; 465 466 if (head->disk && list_empty(&head->list)) 467 kblockd_schedule_work(&head->requeue_work); 468 } 469 470 #else 471 /* 472 * Without the multipath code enabled, multiple controller per subsystems are 473 * visible as devices and thus we cannot use the subsystem instance. 474 */ 475 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 476 struct nvme_ctrl *ctrl, int *flags) 477 { 478 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 479 } 480 481 static inline void nvme_failover_req(struct request *req) 482 { 483 } 484 static inline bool nvme_req_needs_failover(struct request *req, 485 blk_status_t error) 486 { 487 return false; 488 } 489 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 490 { 491 } 492 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 493 struct nvme_ns_head *head) 494 { 495 return 0; 496 } 497 static inline void nvme_mpath_add_disk(struct nvme_ns_head *head) 498 { 499 } 500 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 501 { 502 } 503 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns) 504 { 505 } 506 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 507 { 508 } 509 #endif /* CONFIG_NVME_MULTIPATH */ 510 511 #ifdef CONFIG_NVM 512 void nvme_nvm_update_nvm_info(struct nvme_ns *ns); 513 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 514 void nvme_nvm_unregister(struct nvme_ns *ns); 515 int nvme_nvm_register_sysfs(struct nvme_ns *ns); 516 void nvme_nvm_unregister_sysfs(struct nvme_ns *ns); 517 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 518 #else 519 static inline void nvme_nvm_update_nvm_info(struct nvme_ns *ns) {}; 520 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 521 int node) 522 { 523 return 0; 524 } 525 526 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 527 static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns) 528 { 529 return 0; 530 } 531 static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {}; 532 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 533 unsigned long arg) 534 { 535 return -ENOTTY; 536 } 537 #endif /* CONFIG_NVM */ 538 539 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 540 { 541 return dev_to_disk(dev)->private_data; 542 } 543 544 int __init nvme_core_init(void); 545 void nvme_core_exit(void); 546 547 #endif /* _NVME_H */ 548