1 /* 2 * Copyright (c) 2011-2014, Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 */ 13 14 #ifndef _NVME_H 15 #define _NVME_H 16 17 #include <linux/nvme.h> 18 #include <linux/cdev.h> 19 #include <linux/pci.h> 20 #include <linux/kref.h> 21 #include <linux/blk-mq.h> 22 #include <linux/lightnvm.h> 23 #include <linux/sed-opal.h> 24 25 extern unsigned int nvme_io_timeout; 26 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 27 28 extern unsigned int admin_timeout; 29 #define ADMIN_TIMEOUT (admin_timeout * HZ) 30 31 #define NVME_DEFAULT_KATO 5 32 #define NVME_KATO_GRACE 10 33 34 extern struct workqueue_struct *nvme_wq; 35 36 enum { 37 NVME_NS_LBA = 0, 38 NVME_NS_LIGHTNVM = 1, 39 }; 40 41 /* 42 * List of workarounds for devices that required behavior not specified in 43 * the standard. 44 */ 45 enum nvme_quirks { 46 /* 47 * Prefers I/O aligned to a stripe size specified in a vendor 48 * specific Identify field. 49 */ 50 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 51 52 /* 53 * The controller doesn't handle Identify value others than 0 or 1 54 * correctly. 55 */ 56 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 57 58 /* 59 * The controller deterministically returns O's on reads to 60 * logical blocks that deallocate was called on. 61 */ 62 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 63 64 /* 65 * The controller needs a delay before starts checking the device 66 * readiness, which is done by reading the NVME_CSTS_RDY bit. 67 */ 68 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 69 70 /* 71 * APST should not be used. 72 */ 73 NVME_QUIRK_NO_APST = (1 << 4), 74 75 /* 76 * The deepest sleep state should not be used. 77 */ 78 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 79 80 /* 81 * Supports the LighNVM command set if indicated in vs[1]. 82 */ 83 NVME_QUIRK_LIGHTNVM = (1 << 6), 84 }; 85 86 /* 87 * Common request structure for NVMe passthrough. All drivers must have 88 * this structure as the first member of their request-private data. 89 */ 90 struct nvme_request { 91 struct nvme_command *cmd; 92 union nvme_result result; 93 u8 retries; 94 u8 flags; 95 u16 status; 96 }; 97 98 enum { 99 NVME_REQ_CANCELLED = (1 << 0), 100 }; 101 102 static inline struct nvme_request *nvme_req(struct request *req) 103 { 104 return blk_mq_rq_to_pdu(req); 105 } 106 107 /* The below value is the specific amount of delay needed before checking 108 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 109 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 110 * found empirically. 111 */ 112 #define NVME_QUIRK_DELAY_AMOUNT 2000 113 114 enum nvme_ctrl_state { 115 NVME_CTRL_NEW, 116 NVME_CTRL_LIVE, 117 NVME_CTRL_RESETTING, 118 NVME_CTRL_RECONNECTING, 119 NVME_CTRL_DELETING, 120 NVME_CTRL_DEAD, 121 }; 122 123 struct nvme_ctrl { 124 enum nvme_ctrl_state state; 125 bool identified; 126 spinlock_t lock; 127 const struct nvme_ctrl_ops *ops; 128 struct request_queue *admin_q; 129 struct request_queue *connect_q; 130 struct device *dev; 131 int instance; 132 struct blk_mq_tag_set *tagset; 133 struct blk_mq_tag_set *admin_tagset; 134 struct list_head namespaces; 135 struct mutex namespaces_mutex; 136 struct device ctrl_device; 137 struct device *device; /* char device */ 138 struct cdev cdev; 139 struct ida ns_ida; 140 struct work_struct reset_work; 141 struct work_struct delete_work; 142 143 struct opal_dev *opal_dev; 144 145 char name[12]; 146 char serial[20]; 147 char model[40]; 148 char firmware_rev[8]; 149 char subnqn[NVMF_NQN_SIZE]; 150 u16 cntlid; 151 152 u32 ctrl_config; 153 u16 mtfa; 154 u32 queue_count; 155 156 u64 cap; 157 u32 page_size; 158 u32 max_hw_sectors; 159 u16 oncs; 160 u16 vid; 161 u16 oacs; 162 u16 nssa; 163 u16 nr_streams; 164 atomic_t abort_limit; 165 u8 vwc; 166 u32 vs; 167 u32 sgls; 168 u16 kas; 169 u8 npss; 170 u8 apsta; 171 unsigned int shutdown_timeout; 172 unsigned int kato; 173 bool subsystem; 174 unsigned long quirks; 175 struct nvme_id_power_state psd[32]; 176 struct nvme_effects_log *effects; 177 struct work_struct scan_work; 178 struct work_struct async_event_work; 179 struct delayed_work ka_work; 180 struct work_struct fw_act_work; 181 182 /* Power saving configuration */ 183 u64 ps_max_latency_us; 184 bool apst_enabled; 185 186 /* PCIe only: */ 187 u32 hmpre; 188 u32 hmmin; 189 u32 hmminds; 190 u16 hmmaxd; 191 192 /* Fabrics only */ 193 u16 sqsize; 194 u32 ioccsz; 195 u32 iorcsz; 196 u16 icdoff; 197 u16 maxcmd; 198 int nr_reconnects; 199 struct nvmf_ctrl_options *opts; 200 }; 201 202 struct nvme_ns { 203 struct list_head list; 204 205 struct nvme_ctrl *ctrl; 206 struct request_queue *queue; 207 struct gendisk *disk; 208 struct nvm_dev *ndev; 209 struct kref kref; 210 int instance; 211 212 u8 eui[8]; 213 u8 nguid[16]; 214 uuid_t uuid; 215 216 unsigned ns_id; 217 int lba_shift; 218 u16 ms; 219 u16 sgs; 220 u32 sws; 221 bool ext; 222 u8 pi_type; 223 unsigned long flags; 224 #define NVME_NS_REMOVING 0 225 #define NVME_NS_DEAD 1 226 u16 noiob; 227 }; 228 229 struct nvme_ctrl_ops { 230 const char *name; 231 struct module *module; 232 unsigned int flags; 233 #define NVME_F_FABRICS (1 << 0) 234 #define NVME_F_METADATA_SUPPORTED (1 << 1) 235 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 236 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 237 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 238 void (*free_ctrl)(struct nvme_ctrl *ctrl); 239 void (*submit_async_event)(struct nvme_ctrl *ctrl); 240 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 241 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 242 int (*reinit_request)(void *data, struct request *rq); 243 }; 244 245 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) 246 { 247 u32 val = 0; 248 249 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) 250 return false; 251 return val & NVME_CSTS_RDY; 252 } 253 254 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 255 { 256 if (!ctrl->subsystem) 257 return -ENOTTY; 258 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 259 } 260 261 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 262 { 263 return (sector >> (ns->lba_shift - 9)); 264 } 265 266 static inline void nvme_cleanup_cmd(struct request *req) 267 { 268 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 269 kfree(page_address(req->special_vec.bv_page) + 270 req->special_vec.bv_offset); 271 } 272 } 273 274 static inline void nvme_end_request(struct request *req, __le16 status, 275 union nvme_result result) 276 { 277 struct nvme_request *rq = nvme_req(req); 278 279 rq->status = le16_to_cpu(status) >> 1; 280 rq->result = result; 281 blk_mq_complete_request(req); 282 } 283 284 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 285 { 286 get_device(ctrl->device); 287 } 288 289 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 290 { 291 put_device(ctrl->device); 292 } 293 294 void nvme_complete_rq(struct request *req); 295 void nvme_cancel_request(struct request *req, void *data, bool reserved); 296 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 297 enum nvme_ctrl_state new_state); 298 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 299 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 300 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 301 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 302 const struct nvme_ctrl_ops *ops, unsigned long quirks); 303 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 304 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 305 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 306 void nvme_put_ctrl(struct nvme_ctrl *ctrl); 307 int nvme_init_identify(struct nvme_ctrl *ctrl); 308 309 void nvme_queue_scan(struct nvme_ctrl *ctrl); 310 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 311 312 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 313 bool send); 314 315 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 316 union nvme_result *res); 317 void nvme_queue_async_events(struct nvme_ctrl *ctrl); 318 319 void nvme_stop_queues(struct nvme_ctrl *ctrl); 320 void nvme_start_queues(struct nvme_ctrl *ctrl); 321 void nvme_kill_queues(struct nvme_ctrl *ctrl); 322 void nvme_unfreeze(struct nvme_ctrl *ctrl); 323 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 324 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 325 void nvme_start_freeze(struct nvme_ctrl *ctrl); 326 int nvme_reinit_tagset(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set); 327 328 #define NVME_QID_ANY -1 329 struct request *nvme_alloc_request(struct request_queue *q, 330 struct nvme_command *cmd, unsigned int flags, int qid); 331 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 332 struct nvme_command *cmd); 333 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 334 void *buf, unsigned bufflen); 335 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 336 union nvme_result *result, void *buffer, unsigned bufflen, 337 unsigned timeout, int qid, int at_head, int flags); 338 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 339 void nvme_start_keep_alive(struct nvme_ctrl *ctrl); 340 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 341 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 342 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 343 int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 344 345 #ifdef CONFIG_NVM 346 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 347 void nvme_nvm_unregister(struct nvme_ns *ns); 348 int nvme_nvm_register_sysfs(struct nvme_ns *ns); 349 void nvme_nvm_unregister_sysfs(struct nvme_ns *ns); 350 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 351 #else 352 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 353 int node) 354 { 355 return 0; 356 } 357 358 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 359 static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns) 360 { 361 return 0; 362 } 363 static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {}; 364 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 365 unsigned long arg) 366 { 367 return -ENOTTY; 368 } 369 #endif /* CONFIG_NVM */ 370 371 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 372 { 373 return dev_to_disk(dev)->private_data; 374 } 375 376 int __init nvme_core_init(void); 377 void nvme_core_exit(void); 378 379 #endif /* _NVME_H */ 380