1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern unsigned int nvme_io_timeout; 23 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 24 25 extern unsigned int admin_timeout; 26 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 27 28 #define NVME_DEFAULT_KATO 5 29 30 #ifdef CONFIG_ARCH_NO_SG_CHAIN 31 #define NVME_INLINE_SG_CNT 0 32 #define NVME_INLINE_METADATA_SG_CNT 0 33 #else 34 #define NVME_INLINE_SG_CNT 2 35 #define NVME_INLINE_METADATA_SG_CNT 1 36 #endif 37 38 /* 39 * Default to a 4K page size, with the intention to update this 40 * path in the future to accommodate architectures with differing 41 * kernel and IO page sizes. 42 */ 43 #define NVME_CTRL_PAGE_SHIFT 12 44 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 45 46 extern struct workqueue_struct *nvme_wq; 47 extern struct workqueue_struct *nvme_reset_wq; 48 extern struct workqueue_struct *nvme_delete_wq; 49 50 /* 51 * List of workarounds for devices that required behavior not specified in 52 * the standard. 53 */ 54 enum nvme_quirks { 55 /* 56 * Prefers I/O aligned to a stripe size specified in a vendor 57 * specific Identify field. 58 */ 59 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 60 61 /* 62 * The controller doesn't handle Identify value others than 0 or 1 63 * correctly. 64 */ 65 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 66 67 /* 68 * The controller deterministically returns O's on reads to 69 * logical blocks that deallocate was called on. 70 */ 71 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 72 73 /* 74 * The controller needs a delay before starts checking the device 75 * readiness, which is done by reading the NVME_CSTS_RDY bit. 76 */ 77 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 78 79 /* 80 * APST should not be used. 81 */ 82 NVME_QUIRK_NO_APST = (1 << 4), 83 84 /* 85 * The deepest sleep state should not be used. 86 */ 87 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 88 89 /* 90 * Set MEDIUM priority on SQ creation 91 */ 92 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 93 94 /* 95 * Ignore device provided subnqn. 96 */ 97 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 98 99 /* 100 * Broken Write Zeroes. 101 */ 102 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 103 104 /* 105 * Force simple suspend/resume path. 106 */ 107 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 108 109 /* 110 * Use only one interrupt vector for all queues 111 */ 112 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 113 114 /* 115 * Use non-standard 128 bytes SQEs. 116 */ 117 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 118 119 /* 120 * Prevent tag overlap between queues 121 */ 122 NVME_QUIRK_SHARED_TAGS = (1 << 13), 123 124 /* 125 * Don't change the value of the temperature threshold feature 126 */ 127 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 128 129 /* 130 * The controller doesn't handle the Identify Namespace 131 * Identification Descriptor list subcommand despite claiming 132 * NVMe 1.3 compliance. 133 */ 134 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 135 136 /* 137 * The controller does not properly handle DMA addresses over 138 * 48 bits. 139 */ 140 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 141 142 /* 143 * The controller requires the command_id value be be limited, so skip 144 * encoding the generation sequence number. 145 */ 146 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 147 }; 148 149 /* 150 * Common request structure for NVMe passthrough. All drivers must have 151 * this structure as the first member of their request-private data. 152 */ 153 struct nvme_request { 154 struct nvme_command *cmd; 155 union nvme_result result; 156 u8 genctr; 157 u8 retries; 158 u8 flags; 159 u16 status; 160 struct nvme_ctrl *ctrl; 161 }; 162 163 /* 164 * Mark a bio as coming in through the mpath node. 165 */ 166 #define REQ_NVME_MPATH REQ_DRV 167 168 enum { 169 NVME_REQ_CANCELLED = (1 << 0), 170 NVME_REQ_USERCMD = (1 << 1), 171 }; 172 173 static inline struct nvme_request *nvme_req(struct request *req) 174 { 175 return blk_mq_rq_to_pdu(req); 176 } 177 178 static inline u16 nvme_req_qid(struct request *req) 179 { 180 if (!req->q->queuedata) 181 return 0; 182 183 return req->mq_hctx->queue_num + 1; 184 } 185 186 /* The below value is the specific amount of delay needed before checking 187 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 188 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 189 * found empirically. 190 */ 191 #define NVME_QUIRK_DELAY_AMOUNT 2300 192 193 /* 194 * enum nvme_ctrl_state: Controller state 195 * 196 * @NVME_CTRL_NEW: New controller just allocated, initial state 197 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 198 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 199 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 200 * transport 201 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 202 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 203 * disabled/failed immediately. This state comes 204 * after all async event processing took place and 205 * before ns removal and the controller deletion 206 * progress 207 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 208 * shutdown or removal. In this case we forcibly 209 * kill all inflight I/O as they have no chance to 210 * complete 211 */ 212 enum nvme_ctrl_state { 213 NVME_CTRL_NEW, 214 NVME_CTRL_LIVE, 215 NVME_CTRL_RESETTING, 216 NVME_CTRL_CONNECTING, 217 NVME_CTRL_DELETING, 218 NVME_CTRL_DELETING_NOIO, 219 NVME_CTRL_DEAD, 220 }; 221 222 struct nvme_fault_inject { 223 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 224 struct fault_attr attr; 225 struct dentry *parent; 226 bool dont_retry; /* DNR, do not retry */ 227 u16 status; /* status code */ 228 #endif 229 }; 230 231 struct nvme_ctrl { 232 bool comp_seen; 233 enum nvme_ctrl_state state; 234 bool identified; 235 spinlock_t lock; 236 struct mutex scan_lock; 237 const struct nvme_ctrl_ops *ops; 238 struct request_queue *admin_q; 239 struct request_queue *connect_q; 240 struct request_queue *fabrics_q; 241 struct device *dev; 242 int instance; 243 int numa_node; 244 struct blk_mq_tag_set *tagset; 245 struct blk_mq_tag_set *admin_tagset; 246 struct list_head namespaces; 247 struct rw_semaphore namespaces_rwsem; 248 struct device ctrl_device; 249 struct device *device; /* char device */ 250 #ifdef CONFIG_NVME_HWMON 251 struct device *hwmon_device; 252 #endif 253 struct cdev cdev; 254 struct work_struct reset_work; 255 struct work_struct delete_work; 256 wait_queue_head_t state_wq; 257 258 struct nvme_subsystem *subsys; 259 struct list_head subsys_entry; 260 261 struct opal_dev *opal_dev; 262 263 char name[12]; 264 u16 cntlid; 265 266 u32 ctrl_config; 267 u16 mtfa; 268 u32 queue_count; 269 270 u64 cap; 271 u32 max_hw_sectors; 272 u32 max_segments; 273 u32 max_integrity_segments; 274 u32 max_discard_sectors; 275 u32 max_discard_segments; 276 u32 max_zeroes_sectors; 277 #ifdef CONFIG_BLK_DEV_ZONED 278 u32 max_zone_append; 279 #endif 280 u16 crdt[3]; 281 u16 oncs; 282 u16 oacs; 283 u16 sqsize; 284 u32 max_namespaces; 285 atomic_t abort_limit; 286 u8 vwc; 287 u32 vs; 288 u32 sgls; 289 u16 kas; 290 u8 npss; 291 u8 apsta; 292 u16 wctemp; 293 u16 cctemp; 294 u32 oaes; 295 u32 aen_result; 296 u32 ctratt; 297 unsigned int shutdown_timeout; 298 unsigned int kato; 299 bool subsystem; 300 unsigned long quirks; 301 struct nvme_id_power_state psd[32]; 302 struct nvme_effects_log *effects; 303 struct xarray cels; 304 struct work_struct scan_work; 305 struct work_struct async_event_work; 306 struct delayed_work ka_work; 307 struct delayed_work failfast_work; 308 struct nvme_command ka_cmd; 309 struct work_struct fw_act_work; 310 unsigned long events; 311 312 #ifdef CONFIG_NVME_MULTIPATH 313 /* asymmetric namespace access: */ 314 u8 anacap; 315 u8 anatt; 316 u32 anagrpmax; 317 u32 nanagrpid; 318 struct mutex ana_lock; 319 struct nvme_ana_rsp_hdr *ana_log_buf; 320 size_t ana_log_size; 321 struct timer_list anatt_timer; 322 struct work_struct ana_work; 323 #endif 324 325 /* Power saving configuration */ 326 u64 ps_max_latency_us; 327 bool apst_enabled; 328 329 /* PCIe only: */ 330 u32 hmpre; 331 u32 hmmin; 332 u32 hmminds; 333 u16 hmmaxd; 334 335 /* Fabrics only */ 336 u32 ioccsz; 337 u32 iorcsz; 338 u16 icdoff; 339 u16 maxcmd; 340 int nr_reconnects; 341 unsigned long flags; 342 #define NVME_CTRL_FAILFAST_EXPIRED 0 343 #define NVME_CTRL_ADMIN_Q_STOPPED 1 344 struct nvmf_ctrl_options *opts; 345 346 struct page *discard_page; 347 unsigned long discard_page_busy; 348 349 struct nvme_fault_inject fault_inject; 350 351 enum nvme_ctrl_type cntrltype; 352 enum nvme_dctype dctype; 353 }; 354 355 enum nvme_iopolicy { 356 NVME_IOPOLICY_NUMA, 357 NVME_IOPOLICY_RR, 358 }; 359 360 struct nvme_subsystem { 361 int instance; 362 struct device dev; 363 /* 364 * Because we unregister the device on the last put we need 365 * a separate refcount. 366 */ 367 struct kref ref; 368 struct list_head entry; 369 struct mutex lock; 370 struct list_head ctrls; 371 struct list_head nsheads; 372 char subnqn[NVMF_NQN_SIZE]; 373 char serial[20]; 374 char model[40]; 375 char firmware_rev[8]; 376 u8 cmic; 377 enum nvme_subsys_type subtype; 378 u16 vendor_id; 379 u16 awupf; /* 0's based awupf value. */ 380 struct ida ns_ida; 381 #ifdef CONFIG_NVME_MULTIPATH 382 enum nvme_iopolicy iopolicy; 383 #endif 384 }; 385 386 /* 387 * Container structure for uniqueue namespace identifiers. 388 */ 389 struct nvme_ns_ids { 390 u8 eui64[8]; 391 u8 nguid[16]; 392 uuid_t uuid; 393 u8 csi; 394 }; 395 396 /* 397 * Anchor structure for namespaces. There is one for each namespace in a 398 * NVMe subsystem that any of our controllers can see, and the namespace 399 * structure for each controller is chained of it. For private namespaces 400 * there is a 1:1 relation to our namespace structures, that is ->list 401 * only ever has a single entry for private namespaces. 402 */ 403 struct nvme_ns_head { 404 struct list_head list; 405 struct srcu_struct srcu; 406 struct nvme_subsystem *subsys; 407 unsigned ns_id; 408 struct nvme_ns_ids ids; 409 struct list_head entry; 410 struct kref ref; 411 bool shared; 412 int instance; 413 struct nvme_effects_log *effects; 414 415 struct cdev cdev; 416 struct device cdev_device; 417 418 struct gendisk *disk; 419 #ifdef CONFIG_NVME_MULTIPATH 420 struct bio_list requeue_list; 421 spinlock_t requeue_lock; 422 struct work_struct requeue_work; 423 struct mutex lock; 424 unsigned long flags; 425 #define NVME_NSHEAD_DISK_LIVE 0 426 struct nvme_ns __rcu *current_path[]; 427 #endif 428 }; 429 430 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 431 { 432 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 433 } 434 435 enum nvme_ns_features { 436 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 437 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 438 }; 439 440 struct nvme_ns { 441 struct list_head list; 442 443 struct nvme_ctrl *ctrl; 444 struct request_queue *queue; 445 struct gendisk *disk; 446 #ifdef CONFIG_NVME_MULTIPATH 447 enum nvme_ana_state ana_state; 448 u32 ana_grpid; 449 #endif 450 struct list_head siblings; 451 struct kref kref; 452 struct nvme_ns_head *head; 453 454 int lba_shift; 455 u16 ms; 456 u16 pi_size; 457 u16 sgs; 458 u32 sws; 459 u8 pi_type; 460 u8 guard_type; 461 #ifdef CONFIG_BLK_DEV_ZONED 462 u64 zsze; 463 #endif 464 unsigned long features; 465 unsigned long flags; 466 #define NVME_NS_REMOVING 0 467 #define NVME_NS_DEAD 1 468 #define NVME_NS_ANA_PENDING 2 469 #define NVME_NS_FORCE_RO 3 470 #define NVME_NS_READY 4 471 #define NVME_NS_STOPPED 5 472 473 struct cdev cdev; 474 struct device cdev_device; 475 476 struct nvme_fault_inject fault_inject; 477 478 }; 479 480 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 481 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 482 { 483 return ns->pi_type && ns->ms == ns->pi_size; 484 } 485 486 struct nvme_ctrl_ops { 487 const char *name; 488 struct module *module; 489 unsigned int flags; 490 #define NVME_F_FABRICS (1 << 0) 491 #define NVME_F_METADATA_SUPPORTED (1 << 1) 492 #define NVME_F_PCI_P2PDMA (1 << 2) 493 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 494 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 495 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 496 void (*free_ctrl)(struct nvme_ctrl *ctrl); 497 void (*submit_async_event)(struct nvme_ctrl *ctrl); 498 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 499 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 500 }; 501 502 /* 503 * nvme command_id is constructed as such: 504 * | xxxx | xxxxxxxxxxxx | 505 * gen request tag 506 */ 507 #define nvme_genctr_mask(gen) (gen & 0xf) 508 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 509 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 510 #define nvme_tag_from_cid(cid) (cid & 0xfff) 511 512 static inline u16 nvme_cid(struct request *rq) 513 { 514 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 515 } 516 517 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 518 u16 command_id) 519 { 520 u8 genctr = nvme_genctr_from_cid(command_id); 521 u16 tag = nvme_tag_from_cid(command_id); 522 struct request *rq; 523 524 rq = blk_mq_tag_to_rq(tags, tag); 525 if (unlikely(!rq)) { 526 pr_err("could not locate request for tag %#x\n", 527 tag); 528 return NULL; 529 } 530 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 531 dev_err(nvme_req(rq)->ctrl->device, 532 "request %#x genctr mismatch (got %#x expected %#x)\n", 533 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 534 return NULL; 535 } 536 return rq; 537 } 538 539 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 540 u16 command_id) 541 { 542 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 543 } 544 545 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 546 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 547 const char *dev_name); 548 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 549 void nvme_should_fail(struct request *req); 550 #else 551 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 552 const char *dev_name) 553 { 554 } 555 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 556 { 557 } 558 static inline void nvme_should_fail(struct request *req) {} 559 #endif 560 561 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 562 { 563 if (!ctrl->subsystem) 564 return -ENOTTY; 565 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 566 } 567 568 /* 569 * Convert a 512B sector number to a device logical block number. 570 */ 571 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 572 { 573 return sector >> (ns->lba_shift - SECTOR_SHIFT); 574 } 575 576 /* 577 * Convert a device logical block number to a 512B sector number. 578 */ 579 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 580 { 581 return lba << (ns->lba_shift - SECTOR_SHIFT); 582 } 583 584 /* 585 * Convert byte length to nvme's 0-based num dwords 586 */ 587 static inline u32 nvme_bytes_to_numd(size_t len) 588 { 589 return (len >> 2) - 1; 590 } 591 592 static inline bool nvme_is_ana_error(u16 status) 593 { 594 switch (status & 0x7ff) { 595 case NVME_SC_ANA_TRANSITION: 596 case NVME_SC_ANA_INACCESSIBLE: 597 case NVME_SC_ANA_PERSISTENT_LOSS: 598 return true; 599 default: 600 return false; 601 } 602 } 603 604 static inline bool nvme_is_path_error(u16 status) 605 { 606 /* check for a status code type of 'path related status' */ 607 return (status & 0x700) == 0x300; 608 } 609 610 /* 611 * Fill in the status and result information from the CQE, and then figure out 612 * if blk-mq will need to use IPI magic to complete the request, and if yes do 613 * so. If not let the caller complete the request without an indirect function 614 * call. 615 */ 616 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 617 union nvme_result result) 618 { 619 struct nvme_request *rq = nvme_req(req); 620 struct nvme_ctrl *ctrl = rq->ctrl; 621 622 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 623 rq->genctr++; 624 625 rq->status = le16_to_cpu(status) >> 1; 626 rq->result = result; 627 /* inject error when permitted by fault injection framework */ 628 nvme_should_fail(req); 629 if (unlikely(blk_should_fake_timeout(req->q))) 630 return true; 631 return blk_mq_complete_request_remote(req); 632 } 633 634 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 635 { 636 get_device(ctrl->device); 637 } 638 639 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 640 { 641 put_device(ctrl->device); 642 } 643 644 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 645 { 646 return !qid && 647 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 648 } 649 650 void nvme_complete_rq(struct request *req); 651 void nvme_complete_batch_req(struct request *req); 652 653 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 654 void (*fn)(struct request *rq)) 655 { 656 struct request *req; 657 658 rq_list_for_each(&iob->req_list, req) { 659 fn(req); 660 nvme_complete_batch_req(req); 661 } 662 blk_mq_end_request_batch(iob); 663 } 664 665 blk_status_t nvme_host_path_error(struct request *req); 666 bool nvme_cancel_request(struct request *req, void *data, bool reserved); 667 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 668 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 669 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 670 enum nvme_ctrl_state new_state); 671 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 672 int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 673 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 674 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 675 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 676 const struct nvme_ctrl_ops *ops, unsigned long quirks); 677 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 678 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 679 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 680 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl); 681 682 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 683 684 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 685 bool send); 686 687 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 688 volatile union nvme_result *res); 689 690 void nvme_stop_queues(struct nvme_ctrl *ctrl); 691 void nvme_start_queues(struct nvme_ctrl *ctrl); 692 void nvme_stop_admin_queue(struct nvme_ctrl *ctrl); 693 void nvme_start_admin_queue(struct nvme_ctrl *ctrl); 694 void nvme_kill_queues(struct nvme_ctrl *ctrl); 695 void nvme_sync_queues(struct nvme_ctrl *ctrl); 696 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 697 void nvme_unfreeze(struct nvme_ctrl *ctrl); 698 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 699 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 700 void nvme_start_freeze(struct nvme_ctrl *ctrl); 701 702 static inline unsigned int nvme_req_op(struct nvme_command *cmd) 703 { 704 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 705 } 706 707 #define NVME_QID_ANY -1 708 void nvme_init_request(struct request *req, struct nvme_command *cmd); 709 void nvme_cleanup_cmd(struct request *req); 710 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 711 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 712 struct request *req); 713 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 714 bool queue_live); 715 716 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 717 bool queue_live) 718 { 719 if (likely(ctrl->state == NVME_CTRL_LIVE)) 720 return true; 721 if (ctrl->ops->flags & NVME_F_FABRICS && 722 ctrl->state == NVME_CTRL_DELETING) 723 return queue_live; 724 return __nvme_check_ready(ctrl, rq, queue_live); 725 } 726 727 /* 728 * NSID shall be unique for all shared namespaces, or if at least one of the 729 * following conditions is met: 730 * 1. Namespace Management is supported by the controller 731 * 2. ANA is supported by the controller 732 * 3. NVM Set are supported by the controller 733 * 734 * In other case, private namespace are not required to report a unique NSID. 735 */ 736 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 737 struct nvme_ns_head *head) 738 { 739 return head->shared || 740 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 741 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 742 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 743 } 744 745 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 746 void *buf, unsigned bufflen); 747 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 748 union nvme_result *result, void *buffer, unsigned bufflen, 749 unsigned timeout, int qid, int at_head, 750 blk_mq_req_flags_t flags); 751 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 752 unsigned int dword11, void *buffer, size_t buflen, 753 u32 *result); 754 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 755 unsigned int dword11, void *buffer, size_t buflen, 756 u32 *result); 757 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 758 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 759 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 760 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 761 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 762 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 763 void nvme_queue_scan(struct nvme_ctrl *ctrl); 764 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 765 void *log, size_t size, u64 offset); 766 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 767 void nvme_put_ns_head(struct nvme_ns_head *head); 768 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 769 const struct file_operations *fops, struct module *owner); 770 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 771 int nvme_ioctl(struct block_device *bdev, fmode_t mode, 772 unsigned int cmd, unsigned long arg); 773 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 774 int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode, 775 unsigned int cmd, unsigned long arg); 776 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 777 unsigned long arg); 778 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 779 unsigned long arg); 780 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 781 782 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 783 extern const struct pr_ops nvme_pr_ops; 784 extern const struct block_device_operations nvme_ns_head_ops; 785 786 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 787 #ifdef CONFIG_NVME_MULTIPATH 788 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 789 { 790 return ctrl->ana_log_buf != NULL; 791 } 792 793 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 794 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 795 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 796 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 797 void nvme_failover_req(struct request *req); 798 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 799 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 800 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 801 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 802 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 803 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 804 void nvme_mpath_update(struct nvme_ctrl *ctrl); 805 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 806 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 807 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 808 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 809 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 810 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 811 812 static inline void nvme_trace_bio_complete(struct request *req) 813 { 814 struct nvme_ns *ns = req->q->queuedata; 815 816 if (req->cmd_flags & REQ_NVME_MPATH) 817 trace_block_bio_complete(ns->head->disk->queue, req->bio); 818 } 819 820 extern bool multipath; 821 extern struct device_attribute dev_attr_ana_grpid; 822 extern struct device_attribute dev_attr_ana_state; 823 extern struct device_attribute subsys_attr_iopolicy; 824 825 #else 826 #define multipath false 827 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 828 { 829 return false; 830 } 831 static inline void nvme_failover_req(struct request *req) 832 { 833 } 834 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 835 { 836 } 837 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 838 struct nvme_ns_head *head) 839 { 840 return 0; 841 } 842 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 843 struct nvme_id_ns *id) 844 { 845 } 846 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 847 { 848 } 849 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 850 { 851 return false; 852 } 853 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 854 { 855 } 856 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 857 { 858 } 859 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 860 { 861 } 862 static inline void nvme_trace_bio_complete(struct request *req) 863 { 864 } 865 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 866 { 867 } 868 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 869 struct nvme_id_ctrl *id) 870 { 871 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 872 dev_warn(ctrl->device, 873 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 874 return 0; 875 } 876 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 877 { 878 } 879 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 880 { 881 } 882 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 883 { 884 } 885 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 886 { 887 } 888 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 889 { 890 } 891 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 892 { 893 } 894 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 895 { 896 } 897 #endif /* CONFIG_NVME_MULTIPATH */ 898 899 int nvme_revalidate_zones(struct nvme_ns *ns); 900 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 901 unsigned int nr_zones, report_zones_cb cb, void *data); 902 #ifdef CONFIG_BLK_DEV_ZONED 903 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 904 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 905 struct nvme_command *cmnd, 906 enum nvme_zone_mgmt_action action); 907 #else 908 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 909 struct request *req, struct nvme_command *cmnd, 910 enum nvme_zone_mgmt_action action) 911 { 912 return BLK_STS_NOTSUPP; 913 } 914 915 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 916 { 917 dev_warn(ns->ctrl->device, 918 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 919 return -EPROTONOSUPPORT; 920 } 921 #endif 922 923 static inline int nvme_ctrl_init_connect_q(struct nvme_ctrl *ctrl) 924 { 925 ctrl->connect_q = blk_mq_init_queue(ctrl->tagset); 926 if (IS_ERR(ctrl->connect_q)) 927 return PTR_ERR(ctrl->connect_q); 928 return 0; 929 } 930 931 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 932 { 933 return dev_to_disk(dev)->private_data; 934 } 935 936 #ifdef CONFIG_NVME_HWMON 937 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 938 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 939 #else 940 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 941 { 942 return 0; 943 } 944 945 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 946 { 947 } 948 #endif 949 950 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 951 { 952 return ctrl->sgls & ((1 << 0) | (1 << 1)); 953 } 954 955 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 956 u8 opcode); 957 int nvme_execute_passthru_rq(struct request *rq); 958 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 959 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 960 void nvme_put_ns(struct nvme_ns *ns); 961 962 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 963 { 964 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 965 } 966 967 #ifdef CONFIG_NVME_VERBOSE_ERRORS 968 const unsigned char *nvme_get_error_status_str(u16 status); 969 const unsigned char *nvme_get_opcode_str(u8 opcode); 970 const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 971 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 972 static inline const unsigned char *nvme_get_error_status_str(u16 status) 973 { 974 return "I/O Error"; 975 } 976 static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 977 { 978 return "I/O Cmd"; 979 } 980 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 981 { 982 return "Admin Cmd"; 983 } 984 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 985 986 #endif /* _NVME_H */ 987