1 /* 2 * Copyright (c) 2011-2014, Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 */ 13 14 #ifndef _NVME_H 15 #define _NVME_H 16 17 #include <linux/nvme.h> 18 #include <linux/cdev.h> 19 #include <linux/pci.h> 20 #include <linux/kref.h> 21 #include <linux/blk-mq.h> 22 #include <linux/lightnvm.h> 23 #include <linux/sed-opal.h> 24 #include <linux/fault-inject.h> 25 #include <linux/rcupdate.h> 26 27 extern unsigned int nvme_io_timeout; 28 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 29 30 extern unsigned int admin_timeout; 31 #define ADMIN_TIMEOUT (admin_timeout * HZ) 32 33 #define NVME_DEFAULT_KATO 5 34 #define NVME_KATO_GRACE 10 35 36 extern struct workqueue_struct *nvme_wq; 37 extern struct workqueue_struct *nvme_reset_wq; 38 extern struct workqueue_struct *nvme_delete_wq; 39 40 enum { 41 NVME_NS_LBA = 0, 42 NVME_NS_LIGHTNVM = 1, 43 }; 44 45 /* 46 * List of workarounds for devices that required behavior not specified in 47 * the standard. 48 */ 49 enum nvme_quirks { 50 /* 51 * Prefers I/O aligned to a stripe size specified in a vendor 52 * specific Identify field. 53 */ 54 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 55 56 /* 57 * The controller doesn't handle Identify value others than 0 or 1 58 * correctly. 59 */ 60 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 61 62 /* 63 * The controller deterministically returns O's on reads to 64 * logical blocks that deallocate was called on. 65 */ 66 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 67 68 /* 69 * The controller needs a delay before starts checking the device 70 * readiness, which is done by reading the NVME_CSTS_RDY bit. 71 */ 72 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 73 74 /* 75 * APST should not be used. 76 */ 77 NVME_QUIRK_NO_APST = (1 << 4), 78 79 /* 80 * The deepest sleep state should not be used. 81 */ 82 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 83 84 /* 85 * Supports the LighNVM command set if indicated in vs[1]. 86 */ 87 NVME_QUIRK_LIGHTNVM = (1 << 6), 88 89 /* 90 * Set MEDIUM priority on SQ creation 91 */ 92 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 93 }; 94 95 /* 96 * Common request structure for NVMe passthrough. All drivers must have 97 * this structure as the first member of their request-private data. 98 */ 99 struct nvme_request { 100 struct nvme_command *cmd; 101 union nvme_result result; 102 u8 retries; 103 u8 flags; 104 u16 status; 105 struct nvme_ctrl *ctrl; 106 }; 107 108 /* 109 * Mark a bio as coming in through the mpath node. 110 */ 111 #define REQ_NVME_MPATH REQ_DRV 112 113 enum { 114 NVME_REQ_CANCELLED = (1 << 0), 115 NVME_REQ_USERCMD = (1 << 1), 116 }; 117 118 static inline struct nvme_request *nvme_req(struct request *req) 119 { 120 return blk_mq_rq_to_pdu(req); 121 } 122 123 static inline u16 nvme_req_qid(struct request *req) 124 { 125 if (!req->rq_disk) 126 return 0; 127 return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 128 } 129 130 /* The below value is the specific amount of delay needed before checking 131 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 132 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 133 * found empirically. 134 */ 135 #define NVME_QUIRK_DELAY_AMOUNT 2300 136 137 enum nvme_ctrl_state { 138 NVME_CTRL_NEW, 139 NVME_CTRL_LIVE, 140 NVME_CTRL_ADMIN_ONLY, /* Only admin queue live */ 141 NVME_CTRL_RESETTING, 142 NVME_CTRL_CONNECTING, 143 NVME_CTRL_DELETING, 144 NVME_CTRL_DEAD, 145 }; 146 147 struct nvme_ctrl { 148 bool comp_seen; 149 enum nvme_ctrl_state state; 150 bool identified; 151 spinlock_t lock; 152 const struct nvme_ctrl_ops *ops; 153 struct request_queue *admin_q; 154 struct request_queue *connect_q; 155 struct device *dev; 156 int instance; 157 int numa_node; 158 struct blk_mq_tag_set *tagset; 159 struct blk_mq_tag_set *admin_tagset; 160 struct list_head namespaces; 161 struct rw_semaphore namespaces_rwsem; 162 struct device ctrl_device; 163 struct device *device; /* char device */ 164 struct cdev cdev; 165 struct work_struct reset_work; 166 struct work_struct delete_work; 167 168 struct nvme_subsystem *subsys; 169 struct list_head subsys_entry; 170 171 struct opal_dev *opal_dev; 172 173 char name[12]; 174 u16 cntlid; 175 176 u32 ctrl_config; 177 u16 mtfa; 178 u32 queue_count; 179 180 u64 cap; 181 u32 page_size; 182 u32 max_hw_sectors; 183 u32 max_segments; 184 u16 crdt[3]; 185 u16 oncs; 186 u16 oacs; 187 u16 nssa; 188 u16 nr_streams; 189 u32 max_namespaces; 190 atomic_t abort_limit; 191 u8 vwc; 192 u32 vs; 193 u32 sgls; 194 u16 kas; 195 u8 npss; 196 u8 apsta; 197 u32 oaes; 198 u32 aen_result; 199 u32 ctratt; 200 unsigned int shutdown_timeout; 201 unsigned int kato; 202 bool subsystem; 203 unsigned long quirks; 204 struct nvme_id_power_state psd[32]; 205 struct nvme_effects_log *effects; 206 struct work_struct scan_work; 207 struct work_struct async_event_work; 208 struct delayed_work ka_work; 209 struct nvme_command ka_cmd; 210 struct work_struct fw_act_work; 211 unsigned long events; 212 213 #ifdef CONFIG_NVME_MULTIPATH 214 /* asymmetric namespace access: */ 215 u8 anacap; 216 u8 anatt; 217 u32 anagrpmax; 218 u32 nanagrpid; 219 struct mutex ana_lock; 220 struct nvme_ana_rsp_hdr *ana_log_buf; 221 size_t ana_log_size; 222 struct timer_list anatt_timer; 223 struct work_struct ana_work; 224 #endif 225 226 /* Power saving configuration */ 227 u64 ps_max_latency_us; 228 bool apst_enabled; 229 230 /* PCIe only: */ 231 u32 hmpre; 232 u32 hmmin; 233 u32 hmminds; 234 u16 hmmaxd; 235 236 /* Fabrics only */ 237 u16 sqsize; 238 u32 ioccsz; 239 u32 iorcsz; 240 u16 icdoff; 241 u16 maxcmd; 242 int nr_reconnects; 243 struct nvmf_ctrl_options *opts; 244 245 struct page *discard_page; 246 unsigned long discard_page_busy; 247 }; 248 249 struct nvme_subsystem { 250 int instance; 251 struct device dev; 252 /* 253 * Because we unregister the device on the last put we need 254 * a separate refcount. 255 */ 256 struct kref ref; 257 struct list_head entry; 258 struct mutex lock; 259 struct list_head ctrls; 260 struct list_head nsheads; 261 char subnqn[NVMF_NQN_SIZE]; 262 char serial[20]; 263 char model[40]; 264 char firmware_rev[8]; 265 u8 cmic; 266 u16 vendor_id; 267 struct ida ns_ida; 268 }; 269 270 /* 271 * Container structure for uniqueue namespace identifiers. 272 */ 273 struct nvme_ns_ids { 274 u8 eui64[8]; 275 u8 nguid[16]; 276 uuid_t uuid; 277 }; 278 279 /* 280 * Anchor structure for namespaces. There is one for each namespace in a 281 * NVMe subsystem that any of our controllers can see, and the namespace 282 * structure for each controller is chained of it. For private namespaces 283 * there is a 1:1 relation to our namespace structures, that is ->list 284 * only ever has a single entry for private namespaces. 285 */ 286 struct nvme_ns_head { 287 struct list_head list; 288 struct srcu_struct srcu; 289 struct nvme_subsystem *subsys; 290 unsigned ns_id; 291 struct nvme_ns_ids ids; 292 struct list_head entry; 293 struct kref ref; 294 int instance; 295 #ifdef CONFIG_NVME_MULTIPATH 296 struct gendisk *disk; 297 struct bio_list requeue_list; 298 spinlock_t requeue_lock; 299 struct work_struct requeue_work; 300 struct mutex lock; 301 struct nvme_ns __rcu *current_path[]; 302 #endif 303 }; 304 305 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 306 struct nvme_fault_inject { 307 struct fault_attr attr; 308 struct dentry *parent; 309 bool dont_retry; /* DNR, do not retry */ 310 u16 status; /* status code */ 311 }; 312 #endif 313 314 struct nvme_ns { 315 struct list_head list; 316 317 struct nvme_ctrl *ctrl; 318 struct request_queue *queue; 319 struct gendisk *disk; 320 #ifdef CONFIG_NVME_MULTIPATH 321 enum nvme_ana_state ana_state; 322 u32 ana_grpid; 323 #endif 324 struct list_head siblings; 325 struct nvm_dev *ndev; 326 struct kref kref; 327 struct nvme_ns_head *head; 328 329 int lba_shift; 330 u16 ms; 331 u16 sgs; 332 u32 sws; 333 bool ext; 334 u8 pi_type; 335 unsigned long flags; 336 #define NVME_NS_REMOVING 0 337 #define NVME_NS_DEAD 1 338 #define NVME_NS_ANA_PENDING 2 339 u16 noiob; 340 341 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 342 struct nvme_fault_inject fault_inject; 343 #endif 344 345 }; 346 347 struct nvme_ctrl_ops { 348 const char *name; 349 struct module *module; 350 unsigned int flags; 351 #define NVME_F_FABRICS (1 << 0) 352 #define NVME_F_METADATA_SUPPORTED (1 << 1) 353 #define NVME_F_PCI_P2PDMA (1 << 2) 354 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 355 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 356 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 357 void (*free_ctrl)(struct nvme_ctrl *ctrl); 358 void (*submit_async_event)(struct nvme_ctrl *ctrl); 359 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 360 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 361 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 362 }; 363 364 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 365 void nvme_fault_inject_init(struct nvme_ns *ns); 366 void nvme_fault_inject_fini(struct nvme_ns *ns); 367 void nvme_should_fail(struct request *req); 368 #else 369 static inline void nvme_fault_inject_init(struct nvme_ns *ns) {} 370 static inline void nvme_fault_inject_fini(struct nvme_ns *ns) {} 371 static inline void nvme_should_fail(struct request *req) {} 372 #endif 373 374 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 375 { 376 if (!ctrl->subsystem) 377 return -ENOTTY; 378 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 379 } 380 381 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 382 { 383 return (sector >> (ns->lba_shift - 9)); 384 } 385 386 static inline void nvme_end_request(struct request *req, __le16 status, 387 union nvme_result result) 388 { 389 struct nvme_request *rq = nvme_req(req); 390 391 rq->status = le16_to_cpu(status) >> 1; 392 rq->result = result; 393 /* inject error when permitted by fault injection framework */ 394 nvme_should_fail(req); 395 blk_mq_complete_request(req); 396 } 397 398 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 399 { 400 get_device(ctrl->device); 401 } 402 403 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 404 { 405 put_device(ctrl->device); 406 } 407 408 void nvme_complete_rq(struct request *req); 409 bool nvme_cancel_request(struct request *req, void *data, bool reserved); 410 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 411 enum nvme_ctrl_state new_state); 412 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 413 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 414 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 415 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 416 const struct nvme_ctrl_ops *ops, unsigned long quirks); 417 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 418 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 419 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 420 void nvme_put_ctrl(struct nvme_ctrl *ctrl); 421 int nvme_init_identify(struct nvme_ctrl *ctrl); 422 423 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 424 425 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 426 bool send); 427 428 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 429 volatile union nvme_result *res); 430 431 void nvme_stop_queues(struct nvme_ctrl *ctrl); 432 void nvme_start_queues(struct nvme_ctrl *ctrl); 433 void nvme_kill_queues(struct nvme_ctrl *ctrl); 434 void nvme_unfreeze(struct nvme_ctrl *ctrl); 435 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 436 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 437 void nvme_start_freeze(struct nvme_ctrl *ctrl); 438 439 #define NVME_QID_ANY -1 440 struct request *nvme_alloc_request(struct request_queue *q, 441 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 442 void nvme_cleanup_cmd(struct request *req); 443 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 444 struct nvme_command *cmd); 445 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 446 void *buf, unsigned bufflen); 447 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 448 union nvme_result *result, void *buffer, unsigned bufflen, 449 unsigned timeout, int qid, int at_head, 450 blk_mq_req_flags_t flags, bool poll); 451 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 452 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 453 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 454 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 455 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 456 int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 457 458 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 459 void *log, size_t size, u64 offset); 460 461 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 462 extern const struct block_device_operations nvme_ns_head_ops; 463 464 #ifdef CONFIG_NVME_MULTIPATH 465 bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl); 466 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 467 struct nvme_ctrl *ctrl, int *flags); 468 void nvme_failover_req(struct request *req); 469 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 470 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 471 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 472 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 473 int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 474 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 475 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 476 void nvme_mpath_clear_current_path(struct nvme_ns *ns); 477 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 478 479 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 480 { 481 struct nvme_ns_head *head = ns->head; 482 483 if (head->disk && list_empty(&head->list)) 484 kblockd_schedule_work(&head->requeue_work); 485 } 486 487 extern struct device_attribute dev_attr_ana_grpid; 488 extern struct device_attribute dev_attr_ana_state; 489 490 #else 491 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 492 { 493 return false; 494 } 495 /* 496 * Without the multipath code enabled, multiple controller per subsystems are 497 * visible as devices and thus we cannot use the subsystem instance. 498 */ 499 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 500 struct nvme_ctrl *ctrl, int *flags) 501 { 502 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 503 } 504 505 static inline void nvme_failover_req(struct request *req) 506 { 507 } 508 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 509 { 510 } 511 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 512 struct nvme_ns_head *head) 513 { 514 return 0; 515 } 516 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 517 struct nvme_id_ns *id) 518 { 519 } 520 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 521 { 522 } 523 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns) 524 { 525 } 526 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 527 { 528 } 529 static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 530 struct nvme_id_ctrl *id) 531 { 532 if (ctrl->subsys->cmic & (1 << 3)) 533 dev_warn(ctrl->device, 534 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 535 return 0; 536 } 537 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 538 { 539 } 540 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 541 { 542 } 543 #endif /* CONFIG_NVME_MULTIPATH */ 544 545 #ifdef CONFIG_NVM 546 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 547 void nvme_nvm_unregister(struct nvme_ns *ns); 548 extern const struct attribute_group nvme_nvm_attr_group; 549 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 550 #else 551 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 552 int node) 553 { 554 return 0; 555 } 556 557 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 558 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 559 unsigned long arg) 560 { 561 return -ENOTTY; 562 } 563 #endif /* CONFIG_NVM */ 564 565 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 566 { 567 return dev_to_disk(dev)->private_data; 568 } 569 570 int __init nvme_core_init(void); 571 void __exit nvme_core_exit(void); 572 573 #endif /* _NVME_H */ 574