1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern const struct pr_ops nvme_pr_ops; 23 24 extern unsigned int nvme_io_timeout; 25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 26 27 extern unsigned int admin_timeout; 28 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 29 30 #define NVME_DEFAULT_KATO 5 31 32 #ifdef CONFIG_ARCH_NO_SG_CHAIN 33 #define NVME_INLINE_SG_CNT 0 34 #define NVME_INLINE_METADATA_SG_CNT 0 35 #else 36 #define NVME_INLINE_SG_CNT 2 37 #define NVME_INLINE_METADATA_SG_CNT 1 38 #endif 39 40 /* 41 * Default to a 4K page size, with the intention to update this 42 * path in the future to accommodate architectures with differing 43 * kernel and IO page sizes. 44 */ 45 #define NVME_CTRL_PAGE_SHIFT 12 46 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 47 48 extern struct workqueue_struct *nvme_wq; 49 extern struct workqueue_struct *nvme_reset_wq; 50 extern struct workqueue_struct *nvme_delete_wq; 51 52 /* 53 * List of workarounds for devices that required behavior not specified in 54 * the standard. 55 */ 56 enum nvme_quirks { 57 /* 58 * Prefers I/O aligned to a stripe size specified in a vendor 59 * specific Identify field. 60 */ 61 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 62 63 /* 64 * The controller doesn't handle Identify value others than 0 or 1 65 * correctly. 66 */ 67 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 68 69 /* 70 * The controller deterministically returns O's on reads to 71 * logical blocks that deallocate was called on. 72 */ 73 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 74 75 /* 76 * The controller needs a delay before starts checking the device 77 * readiness, which is done by reading the NVME_CSTS_RDY bit. 78 */ 79 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 80 81 /* 82 * APST should not be used. 83 */ 84 NVME_QUIRK_NO_APST = (1 << 4), 85 86 /* 87 * The deepest sleep state should not be used. 88 */ 89 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 90 91 /* 92 * Problems seen with concurrent commands 93 */ 94 NVME_QUIRK_QDEPTH_ONE = (1 << 6), 95 96 /* 97 * Set MEDIUM priority on SQ creation 98 */ 99 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 100 101 /* 102 * Ignore device provided subnqn. 103 */ 104 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 105 106 /* 107 * Broken Write Zeroes. 108 */ 109 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 110 111 /* 112 * Force simple suspend/resume path. 113 */ 114 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 115 116 /* 117 * Use only one interrupt vector for all queues 118 */ 119 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 120 121 /* 122 * Use non-standard 128 bytes SQEs. 123 */ 124 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 125 126 /* 127 * Prevent tag overlap between queues 128 */ 129 NVME_QUIRK_SHARED_TAGS = (1 << 13), 130 131 /* 132 * Don't change the value of the temperature threshold feature 133 */ 134 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 135 136 /* 137 * The controller doesn't handle the Identify Namespace 138 * Identification Descriptor list subcommand despite claiming 139 * NVMe 1.3 compliance. 140 */ 141 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 142 143 /* 144 * The controller does not properly handle DMA addresses over 145 * 48 bits. 146 */ 147 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 148 149 /* 150 * The controller requires the command_id value be limited, so skip 151 * encoding the generation sequence number. 152 */ 153 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 154 155 /* 156 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 157 */ 158 NVME_QUIRK_BOGUS_NID = (1 << 18), 159 160 /* 161 * No temperature thresholds for channels other than 0 (Composite). 162 */ 163 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 164 165 /* 166 * Disables simple suspend/resume path. 167 */ 168 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 169 170 /* 171 * MSI (but not MSI-X) interrupts are broken and never fire. 172 */ 173 NVME_QUIRK_BROKEN_MSI = (1 << 21), 174 }; 175 176 /* 177 * Common request structure for NVMe passthrough. All drivers must have 178 * this structure as the first member of their request-private data. 179 */ 180 struct nvme_request { 181 struct nvme_command *cmd; 182 union nvme_result result; 183 u8 genctr; 184 u8 retries; 185 u8 flags; 186 u16 status; 187 #ifdef CONFIG_NVME_MULTIPATH 188 unsigned long start_time; 189 #endif 190 struct nvme_ctrl *ctrl; 191 }; 192 193 /* 194 * Mark a bio as coming in through the mpath node. 195 */ 196 #define REQ_NVME_MPATH REQ_DRV 197 198 enum { 199 NVME_REQ_CANCELLED = (1 << 0), 200 NVME_REQ_USERCMD = (1 << 1), 201 NVME_MPATH_IO_STATS = (1 << 2), 202 }; 203 204 static inline struct nvme_request *nvme_req(struct request *req) 205 { 206 return blk_mq_rq_to_pdu(req); 207 } 208 209 static inline u16 nvme_req_qid(struct request *req) 210 { 211 if (!req->q->queuedata) 212 return 0; 213 214 return req->mq_hctx->queue_num + 1; 215 } 216 217 /* The below value is the specific amount of delay needed before checking 218 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 219 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 220 * found empirically. 221 */ 222 #define NVME_QUIRK_DELAY_AMOUNT 2300 223 224 /* 225 * enum nvme_ctrl_state: Controller state 226 * 227 * @NVME_CTRL_NEW: New controller just allocated, initial state 228 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 229 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 230 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 231 * transport 232 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 233 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 234 * disabled/failed immediately. This state comes 235 * after all async event processing took place and 236 * before ns removal and the controller deletion 237 * progress 238 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 239 * shutdown or removal. In this case we forcibly 240 * kill all inflight I/O as they have no chance to 241 * complete 242 */ 243 enum nvme_ctrl_state { 244 NVME_CTRL_NEW, 245 NVME_CTRL_LIVE, 246 NVME_CTRL_RESETTING, 247 NVME_CTRL_CONNECTING, 248 NVME_CTRL_DELETING, 249 NVME_CTRL_DELETING_NOIO, 250 NVME_CTRL_DEAD, 251 }; 252 253 struct nvme_fault_inject { 254 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 255 struct fault_attr attr; 256 struct dentry *parent; 257 bool dont_retry; /* DNR, do not retry */ 258 u16 status; /* status code */ 259 #endif 260 }; 261 262 enum nvme_ctrl_flags { 263 NVME_CTRL_FAILFAST_EXPIRED = 0, 264 NVME_CTRL_ADMIN_Q_STOPPED = 1, 265 NVME_CTRL_STARTED_ONCE = 2, 266 NVME_CTRL_STOPPED = 3, 267 NVME_CTRL_SKIP_ID_CNS_CS = 4, 268 NVME_CTRL_DIRTY_CAPABILITY = 5, 269 NVME_CTRL_FROZEN = 6, 270 }; 271 272 struct nvme_ctrl { 273 bool comp_seen; 274 bool identified; 275 enum nvme_ctrl_state state; 276 spinlock_t lock; 277 struct mutex scan_lock; 278 const struct nvme_ctrl_ops *ops; 279 struct request_queue *admin_q; 280 struct request_queue *connect_q; 281 struct request_queue *fabrics_q; 282 struct device *dev; 283 int instance; 284 int numa_node; 285 struct blk_mq_tag_set *tagset; 286 struct blk_mq_tag_set *admin_tagset; 287 struct list_head namespaces; 288 struct mutex namespaces_lock; 289 struct srcu_struct srcu; 290 struct device ctrl_device; 291 struct device *device; /* char device */ 292 #ifdef CONFIG_NVME_HWMON 293 struct device *hwmon_device; 294 #endif 295 struct cdev cdev; 296 struct work_struct reset_work; 297 struct work_struct delete_work; 298 wait_queue_head_t state_wq; 299 300 struct nvme_subsystem *subsys; 301 struct list_head subsys_entry; 302 303 struct opal_dev *opal_dev; 304 305 char name[12]; 306 u16 cntlid; 307 308 u16 mtfa; 309 u32 ctrl_config; 310 u32 queue_count; 311 312 u64 cap; 313 u32 max_hw_sectors; 314 u32 max_segments; 315 u32 max_integrity_segments; 316 u32 max_discard_sectors; 317 u32 max_discard_segments; 318 u32 max_zeroes_sectors; 319 #ifdef CONFIG_BLK_DEV_ZONED 320 u32 max_zone_append; 321 #endif 322 u16 crdt[3]; 323 u16 oncs; 324 u32 dmrsl; 325 u16 oacs; 326 u16 sqsize; 327 u32 max_namespaces; 328 atomic_t abort_limit; 329 u8 vwc; 330 u32 vs; 331 u32 sgls; 332 u16 kas; 333 u8 npss; 334 u8 apsta; 335 u16 wctemp; 336 u16 cctemp; 337 u32 oaes; 338 u32 aen_result; 339 u32 ctratt; 340 unsigned int shutdown_timeout; 341 unsigned int kato; 342 bool subsystem; 343 unsigned long quirks; 344 struct nvme_id_power_state psd[32]; 345 struct nvme_effects_log *effects; 346 struct xarray cels; 347 struct work_struct scan_work; 348 struct work_struct async_event_work; 349 struct delayed_work ka_work; 350 struct delayed_work failfast_work; 351 struct nvme_command ka_cmd; 352 unsigned long ka_last_check_time; 353 struct work_struct fw_act_work; 354 unsigned long events; 355 356 #ifdef CONFIG_NVME_MULTIPATH 357 /* asymmetric namespace access: */ 358 u8 anacap; 359 u8 anatt; 360 u32 anagrpmax; 361 u32 nanagrpid; 362 struct mutex ana_lock; 363 struct nvme_ana_rsp_hdr *ana_log_buf; 364 size_t ana_log_size; 365 struct timer_list anatt_timer; 366 struct work_struct ana_work; 367 #endif 368 369 #ifdef CONFIG_NVME_AUTH 370 struct work_struct dhchap_auth_work; 371 struct mutex dhchap_auth_mutex; 372 struct nvme_dhchap_queue_context *dhchap_ctxs; 373 struct nvme_dhchap_key *host_key; 374 struct nvme_dhchap_key *ctrl_key; 375 u16 transaction; 376 #endif 377 378 /* Power saving configuration */ 379 u64 ps_max_latency_us; 380 bool apst_enabled; 381 382 /* PCIe only: */ 383 u16 hmmaxd; 384 u32 hmpre; 385 u32 hmmin; 386 u32 hmminds; 387 388 /* Fabrics only */ 389 u32 ioccsz; 390 u32 iorcsz; 391 u16 icdoff; 392 u16 maxcmd; 393 int nr_reconnects; 394 unsigned long flags; 395 struct nvmf_ctrl_options *opts; 396 397 struct page *discard_page; 398 unsigned long discard_page_busy; 399 400 struct nvme_fault_inject fault_inject; 401 402 enum nvme_ctrl_type cntrltype; 403 enum nvme_dctype dctype; 404 }; 405 406 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl) 407 { 408 return READ_ONCE(ctrl->state); 409 } 410 411 enum nvme_iopolicy { 412 NVME_IOPOLICY_NUMA, 413 NVME_IOPOLICY_RR, 414 }; 415 416 struct nvme_subsystem { 417 int instance; 418 struct device dev; 419 /* 420 * Because we unregister the device on the last put we need 421 * a separate refcount. 422 */ 423 struct kref ref; 424 struct list_head entry; 425 struct mutex lock; 426 struct list_head ctrls; 427 struct list_head nsheads; 428 char subnqn[NVMF_NQN_SIZE]; 429 char serial[20]; 430 char model[40]; 431 char firmware_rev[8]; 432 u8 cmic; 433 enum nvme_subsys_type subtype; 434 u16 vendor_id; 435 u16 awupf; /* 0's based awupf value. */ 436 struct ida ns_ida; 437 #ifdef CONFIG_NVME_MULTIPATH 438 enum nvme_iopolicy iopolicy; 439 #endif 440 }; 441 442 /* 443 * Container structure for uniqueue namespace identifiers. 444 */ 445 struct nvme_ns_ids { 446 u8 eui64[8]; 447 u8 nguid[16]; 448 uuid_t uuid; 449 u8 csi; 450 }; 451 452 /* 453 * Anchor structure for namespaces. There is one for each namespace in a 454 * NVMe subsystem that any of our controllers can see, and the namespace 455 * structure for each controller is chained of it. For private namespaces 456 * there is a 1:1 relation to our namespace structures, that is ->list 457 * only ever has a single entry for private namespaces. 458 */ 459 struct nvme_ns_head { 460 struct list_head list; 461 struct srcu_struct srcu; 462 struct nvme_subsystem *subsys; 463 unsigned ns_id; 464 struct nvme_ns_ids ids; 465 struct list_head entry; 466 struct kref ref; 467 bool shared; 468 int instance; 469 struct nvme_effects_log *effects; 470 471 struct cdev cdev; 472 struct device cdev_device; 473 474 struct gendisk *disk; 475 #ifdef CONFIG_NVME_MULTIPATH 476 struct bio_list requeue_list; 477 spinlock_t requeue_lock; 478 struct work_struct requeue_work; 479 struct work_struct partition_scan_work; 480 struct mutex lock; 481 unsigned long flags; 482 #define NVME_NSHEAD_DISK_LIVE 0 483 struct nvme_ns __rcu *current_path[]; 484 #endif 485 }; 486 487 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 488 { 489 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 490 } 491 492 enum nvme_ns_features { 493 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 494 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 495 NVME_NS_DEAC = 1 << 2, /* DEAC bit in Write Zeores supported */ 496 }; 497 498 struct nvme_ns { 499 struct list_head list; 500 501 struct nvme_ctrl *ctrl; 502 struct request_queue *queue; 503 struct gendisk *disk; 504 #ifdef CONFIG_NVME_MULTIPATH 505 enum nvme_ana_state ana_state; 506 u32 ana_grpid; 507 #endif 508 struct list_head siblings; 509 struct kref kref; 510 struct nvme_ns_head *head; 511 512 int lba_shift; 513 u16 ms; 514 u16 pi_size; 515 u16 sgs; 516 u32 sws; 517 u8 pi_type; 518 u8 guard_type; 519 #ifdef CONFIG_BLK_DEV_ZONED 520 u64 zsze; 521 #endif 522 unsigned long features; 523 unsigned long flags; 524 #define NVME_NS_REMOVING 0 525 #define NVME_NS_ANA_PENDING 2 526 #define NVME_NS_FORCE_RO 3 527 #define NVME_NS_READY 4 528 529 struct cdev cdev; 530 struct device cdev_device; 531 532 struct nvme_fault_inject fault_inject; 533 534 }; 535 536 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 537 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 538 { 539 return ns->pi_type && ns->ms == ns->pi_size; 540 } 541 542 struct nvme_ctrl_ops { 543 const char *name; 544 struct module *module; 545 unsigned int flags; 546 #define NVME_F_FABRICS (1 << 0) 547 #define NVME_F_METADATA_SUPPORTED (1 << 1) 548 #define NVME_F_BLOCKING (1 << 2) 549 550 const struct attribute_group **dev_attr_groups; 551 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 552 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 553 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 554 void (*free_ctrl)(struct nvme_ctrl *ctrl); 555 void (*submit_async_event)(struct nvme_ctrl *ctrl); 556 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 557 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 558 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 559 void (*print_device_info)(struct nvme_ctrl *ctrl); 560 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 561 }; 562 563 /* 564 * nvme command_id is constructed as such: 565 * | xxxx | xxxxxxxxxxxx | 566 * gen request tag 567 */ 568 #define nvme_genctr_mask(gen) (gen & 0xf) 569 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 570 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 571 #define nvme_tag_from_cid(cid) (cid & 0xfff) 572 573 static inline u16 nvme_cid(struct request *rq) 574 { 575 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 576 } 577 578 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 579 u16 command_id) 580 { 581 u8 genctr = nvme_genctr_from_cid(command_id); 582 u16 tag = nvme_tag_from_cid(command_id); 583 struct request *rq; 584 585 rq = blk_mq_tag_to_rq(tags, tag); 586 if (unlikely(!rq)) { 587 pr_err("could not locate request for tag %#x\n", 588 tag); 589 return NULL; 590 } 591 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 592 dev_err(nvme_req(rq)->ctrl->device, 593 "request %#x genctr mismatch (got %#x expected %#x)\n", 594 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 595 return NULL; 596 } 597 return rq; 598 } 599 600 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 601 u16 command_id) 602 { 603 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 604 } 605 606 /* 607 * Return the length of the string without the space padding 608 */ 609 static inline int nvme_strlen(char *s, int len) 610 { 611 while (s[len - 1] == ' ') 612 len--; 613 return len; 614 } 615 616 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 617 { 618 struct nvme_subsystem *subsys = ctrl->subsys; 619 620 if (ctrl->ops->print_device_info) { 621 ctrl->ops->print_device_info(ctrl); 622 return; 623 } 624 625 dev_err(ctrl->device, 626 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 627 nvme_strlen(subsys->model, sizeof(subsys->model)), 628 subsys->model, nvme_strlen(subsys->firmware_rev, 629 sizeof(subsys->firmware_rev)), 630 subsys->firmware_rev); 631 } 632 633 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 634 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 635 const char *dev_name); 636 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 637 void nvme_should_fail(struct request *req); 638 #else 639 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 640 const char *dev_name) 641 { 642 } 643 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 644 { 645 } 646 static inline void nvme_should_fail(struct request *req) {} 647 #endif 648 649 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 650 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 651 652 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 653 { 654 int ret; 655 656 if (!ctrl->subsystem) 657 return -ENOTTY; 658 if (!nvme_wait_reset(ctrl)) 659 return -EBUSY; 660 661 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 662 if (ret) 663 return ret; 664 665 return nvme_try_sched_reset(ctrl); 666 } 667 668 /* 669 * Convert a 512B sector number to a device logical block number. 670 */ 671 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 672 { 673 return sector >> (ns->lba_shift - SECTOR_SHIFT); 674 } 675 676 /* 677 * Convert a device logical block number to a 512B sector number. 678 */ 679 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 680 { 681 return lba << (ns->lba_shift - SECTOR_SHIFT); 682 } 683 684 /* 685 * Convert byte length to nvme's 0-based num dwords 686 */ 687 static inline u32 nvme_bytes_to_numd(size_t len) 688 { 689 return (len >> 2) - 1; 690 } 691 692 static inline bool nvme_is_ana_error(u16 status) 693 { 694 switch (status & 0x7ff) { 695 case NVME_SC_ANA_TRANSITION: 696 case NVME_SC_ANA_INACCESSIBLE: 697 case NVME_SC_ANA_PERSISTENT_LOSS: 698 return true; 699 default: 700 return false; 701 } 702 } 703 704 static inline bool nvme_is_path_error(u16 status) 705 { 706 /* check for a status code type of 'path related status' */ 707 return (status & 0x700) == 0x300; 708 } 709 710 /* 711 * Fill in the status and result information from the CQE, and then figure out 712 * if blk-mq will need to use IPI magic to complete the request, and if yes do 713 * so. If not let the caller complete the request without an indirect function 714 * call. 715 */ 716 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 717 union nvme_result result) 718 { 719 struct nvme_request *rq = nvme_req(req); 720 struct nvme_ctrl *ctrl = rq->ctrl; 721 722 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 723 rq->genctr++; 724 725 rq->status = le16_to_cpu(status) >> 1; 726 rq->result = result; 727 /* inject error when permitted by fault injection framework */ 728 nvme_should_fail(req); 729 if (unlikely(blk_should_fake_timeout(req->q))) 730 return true; 731 return blk_mq_complete_request_remote(req); 732 } 733 734 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 735 { 736 get_device(ctrl->device); 737 } 738 739 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 740 { 741 put_device(ctrl->device); 742 } 743 744 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 745 { 746 return !qid && 747 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 748 } 749 750 /* 751 * Returns true for sink states that can't ever transition back to live. 752 */ 753 static inline bool nvme_state_terminal(struct nvme_ctrl *ctrl) 754 { 755 switch (nvme_ctrl_state(ctrl)) { 756 case NVME_CTRL_NEW: 757 case NVME_CTRL_LIVE: 758 case NVME_CTRL_RESETTING: 759 case NVME_CTRL_CONNECTING: 760 return false; 761 case NVME_CTRL_DELETING: 762 case NVME_CTRL_DELETING_NOIO: 763 case NVME_CTRL_DEAD: 764 return true; 765 default: 766 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 767 return true; 768 } 769 } 770 771 void nvme_end_req(struct request *req); 772 void nvme_complete_rq(struct request *req); 773 void nvme_complete_batch_req(struct request *req); 774 775 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 776 void (*fn)(struct request *rq)) 777 { 778 struct request *req; 779 780 rq_list_for_each(&iob->req_list, req) { 781 fn(req); 782 nvme_complete_batch_req(req); 783 } 784 blk_mq_end_request_batch(iob); 785 } 786 787 blk_status_t nvme_host_path_error(struct request *req); 788 bool nvme_cancel_request(struct request *req, void *data); 789 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 790 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 791 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 792 enum nvme_ctrl_state new_state); 793 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 794 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 795 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 796 const struct nvme_ctrl_ops *ops, unsigned long quirks); 797 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 798 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 799 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 800 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 801 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 802 const struct blk_mq_ops *ops, unsigned int cmd_size); 803 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 804 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 805 const struct blk_mq_ops *ops, unsigned int nr_maps, 806 unsigned int cmd_size); 807 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 808 809 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 810 811 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 812 volatile union nvme_result *res); 813 814 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 815 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 816 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 817 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 818 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 819 void nvme_sync_queues(struct nvme_ctrl *ctrl); 820 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 821 void nvme_unfreeze(struct nvme_ctrl *ctrl); 822 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 823 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 824 void nvme_start_freeze(struct nvme_ctrl *ctrl); 825 826 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 827 { 828 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 829 } 830 831 #define NVME_QID_ANY -1 832 void nvme_init_request(struct request *req, struct nvme_command *cmd); 833 void nvme_cleanup_cmd(struct request *req); 834 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 835 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 836 struct request *req); 837 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 838 bool queue_live); 839 840 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 841 bool queue_live) 842 { 843 if (likely(ctrl->state == NVME_CTRL_LIVE)) 844 return true; 845 if (ctrl->ops->flags & NVME_F_FABRICS && 846 ctrl->state == NVME_CTRL_DELETING) 847 return queue_live; 848 return __nvme_check_ready(ctrl, rq, queue_live); 849 } 850 851 /* 852 * NSID shall be unique for all shared namespaces, or if at least one of the 853 * following conditions is met: 854 * 1. Namespace Management is supported by the controller 855 * 2. ANA is supported by the controller 856 * 3. NVM Set are supported by the controller 857 * 858 * In other case, private namespace are not required to report a unique NSID. 859 */ 860 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 861 struct nvme_ns_head *head) 862 { 863 return head->shared || 864 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 865 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 866 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 867 } 868 869 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 870 void *buf, unsigned bufflen); 871 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 872 union nvme_result *result, void *buffer, unsigned bufflen, 873 int qid, int at_head, 874 blk_mq_req_flags_t flags); 875 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 876 unsigned int dword11, void *buffer, size_t buflen, 877 u32 *result); 878 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 879 unsigned int dword11, void *buffer, size_t buflen, 880 u32 *result); 881 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 882 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 883 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 884 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 885 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 886 void nvme_queue_scan(struct nvme_ctrl *ctrl); 887 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 888 void *log, size_t size, u64 offset); 889 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 890 void nvme_put_ns_head(struct nvme_ns_head *head); 891 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 892 const struct file_operations *fops, struct module *owner); 893 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 894 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 895 unsigned int cmd, unsigned long arg); 896 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 897 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 898 unsigned int cmd, unsigned long arg); 899 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 900 unsigned long arg); 901 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 902 unsigned long arg); 903 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 904 struct io_comp_batch *iob, unsigned int poll_flags); 905 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 906 unsigned int issue_flags); 907 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 908 unsigned int issue_flags); 909 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 910 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 911 912 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 913 extern const struct pr_ops nvme_pr_ops; 914 extern const struct block_device_operations nvme_ns_head_ops; 915 extern const struct attribute_group nvme_dev_attrs_group; 916 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 917 extern const struct attribute_group *nvme_dev_attr_groups[]; 918 extern const struct block_device_operations nvme_bdev_ops; 919 920 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 921 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 922 #ifdef CONFIG_NVME_MULTIPATH 923 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 924 { 925 return ctrl->ana_log_buf != NULL; 926 } 927 928 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 929 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 930 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 931 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 932 void nvme_failover_req(struct request *req); 933 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 934 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 935 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 936 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 937 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 938 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 939 void nvme_mpath_update(struct nvme_ctrl *ctrl); 940 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 941 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 942 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 943 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 944 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 945 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 946 void nvme_mpath_start_request(struct request *rq); 947 void nvme_mpath_end_request(struct request *rq); 948 949 static inline void nvme_trace_bio_complete(struct request *req) 950 { 951 struct nvme_ns *ns = req->q->queuedata; 952 953 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 954 trace_block_bio_complete(ns->head->disk->queue, req->bio); 955 } 956 957 extern bool multipath; 958 extern struct device_attribute dev_attr_ana_grpid; 959 extern struct device_attribute dev_attr_ana_state; 960 extern struct device_attribute subsys_attr_iopolicy; 961 962 #else 963 #define multipath false 964 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 965 { 966 return false; 967 } 968 static inline void nvme_failover_req(struct request *req) 969 { 970 } 971 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 972 { 973 } 974 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 975 struct nvme_ns_head *head) 976 { 977 return 0; 978 } 979 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 980 { 981 } 982 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 983 { 984 } 985 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 986 { 987 return false; 988 } 989 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 990 { 991 } 992 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 993 { 994 } 995 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 996 { 997 } 998 static inline void nvme_trace_bio_complete(struct request *req) 999 { 1000 } 1001 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 1002 { 1003 } 1004 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 1005 struct nvme_id_ctrl *id) 1006 { 1007 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 1008 dev_warn(ctrl->device, 1009 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 1010 return 0; 1011 } 1012 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 1013 { 1014 } 1015 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 1016 { 1017 } 1018 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 1019 { 1020 } 1021 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 1022 { 1023 } 1024 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 1025 { 1026 } 1027 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 1028 { 1029 } 1030 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 1031 { 1032 } 1033 static inline void nvme_mpath_start_request(struct request *rq) 1034 { 1035 } 1036 static inline void nvme_mpath_end_request(struct request *rq) 1037 { 1038 } 1039 #endif /* CONFIG_NVME_MULTIPATH */ 1040 1041 int nvme_revalidate_zones(struct nvme_ns *ns); 1042 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 1043 unsigned int nr_zones, report_zones_cb cb, void *data); 1044 #ifdef CONFIG_BLK_DEV_ZONED 1045 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 1046 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1047 struct nvme_command *cmnd, 1048 enum nvme_zone_mgmt_action action); 1049 #else 1050 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1051 struct request *req, struct nvme_command *cmnd, 1052 enum nvme_zone_mgmt_action action) 1053 { 1054 return BLK_STS_NOTSUPP; 1055 } 1056 1057 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 1058 { 1059 dev_warn(ns->ctrl->device, 1060 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 1061 return -EPROTONOSUPPORT; 1062 } 1063 #endif 1064 1065 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1066 { 1067 return dev_to_disk(dev)->private_data; 1068 } 1069 1070 #ifdef CONFIG_NVME_HWMON 1071 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1072 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1073 #else 1074 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1075 { 1076 return 0; 1077 } 1078 1079 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1080 { 1081 } 1082 #endif 1083 1084 static inline void nvme_start_request(struct request *rq) 1085 { 1086 if (rq->cmd_flags & REQ_NVME_MPATH) 1087 nvme_mpath_start_request(rq); 1088 blk_mq_start_request(rq); 1089 } 1090 1091 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1092 { 1093 return ctrl->sgls & ((1 << 0) | (1 << 1)); 1094 } 1095 1096 #ifdef CONFIG_NVME_AUTH 1097 int __init nvme_init_auth(void); 1098 void __exit nvme_exit_auth(void); 1099 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1100 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1101 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1102 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1103 void nvme_auth_free(struct nvme_ctrl *ctrl); 1104 #else 1105 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1106 { 1107 return 0; 1108 } 1109 static inline int __init nvme_init_auth(void) 1110 { 1111 return 0; 1112 } 1113 static inline void __exit nvme_exit_auth(void) 1114 { 1115 } 1116 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1117 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1118 { 1119 return -EPROTONOSUPPORT; 1120 } 1121 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1122 { 1123 return NVME_SC_AUTH_REQUIRED; 1124 } 1125 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1126 #endif 1127 1128 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1129 u8 opcode); 1130 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1131 int nvme_execute_rq(struct request *rq, bool at_head); 1132 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1133 struct nvme_command *cmd, int status); 1134 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1135 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1136 bool nvme_get_ns(struct nvme_ns *ns); 1137 void nvme_put_ns(struct nvme_ns *ns); 1138 1139 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1140 { 1141 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1142 } 1143 1144 #ifdef CONFIG_NVME_VERBOSE_ERRORS 1145 const unsigned char *nvme_get_error_status_str(u16 status); 1146 const unsigned char *nvme_get_opcode_str(u8 opcode); 1147 const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1148 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode); 1149 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1150 static inline const unsigned char *nvme_get_error_status_str(u16 status) 1151 { 1152 return "I/O Error"; 1153 } 1154 static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1155 { 1156 return "I/O Cmd"; 1157 } 1158 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1159 { 1160 return "Admin Cmd"; 1161 } 1162 1163 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode) 1164 { 1165 return "Fabrics Cmd"; 1166 } 1167 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1168 1169 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype) 1170 { 1171 if (opcode == nvme_fabrics_command) 1172 return nvme_get_fabrics_opcode_str(fctype); 1173 return qid ? nvme_get_opcode_str(opcode) : 1174 nvme_get_admin_opcode_str(opcode); 1175 } 1176 #endif /* _NVME_H */ 1177