1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern unsigned int nvme_io_timeout; 23 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 24 25 extern unsigned int admin_timeout; 26 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 27 28 #define NVME_DEFAULT_KATO 5 29 30 #ifdef CONFIG_ARCH_NO_SG_CHAIN 31 #define NVME_INLINE_SG_CNT 0 32 #define NVME_INLINE_METADATA_SG_CNT 0 33 #else 34 #define NVME_INLINE_SG_CNT 2 35 #define NVME_INLINE_METADATA_SG_CNT 1 36 #endif 37 38 /* 39 * Default to a 4K page size, with the intention to update this 40 * path in the future to accommodate architectures with differing 41 * kernel and IO page sizes. 42 */ 43 #define NVME_CTRL_PAGE_SHIFT 12 44 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 45 46 extern struct workqueue_struct *nvme_wq; 47 extern struct workqueue_struct *nvme_reset_wq; 48 extern struct workqueue_struct *nvme_delete_wq; 49 50 /* 51 * List of workarounds for devices that required behavior not specified in 52 * the standard. 53 */ 54 enum nvme_quirks { 55 /* 56 * Prefers I/O aligned to a stripe size specified in a vendor 57 * specific Identify field. 58 */ 59 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 60 61 /* 62 * The controller doesn't handle Identify value others than 0 or 1 63 * correctly. 64 */ 65 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 66 67 /* 68 * The controller deterministically returns O's on reads to 69 * logical blocks that deallocate was called on. 70 */ 71 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 72 73 /* 74 * The controller needs a delay before starts checking the device 75 * readiness, which is done by reading the NVME_CSTS_RDY bit. 76 */ 77 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 78 79 /* 80 * APST should not be used. 81 */ 82 NVME_QUIRK_NO_APST = (1 << 4), 83 84 /* 85 * The deepest sleep state should not be used. 86 */ 87 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 88 89 /* 90 * Set MEDIUM priority on SQ creation 91 */ 92 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 93 94 /* 95 * Ignore device provided subnqn. 96 */ 97 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 98 99 /* 100 * Broken Write Zeroes. 101 */ 102 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 103 104 /* 105 * Force simple suspend/resume path. 106 */ 107 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 108 109 /* 110 * Use only one interrupt vector for all queues 111 */ 112 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 113 114 /* 115 * Use non-standard 128 bytes SQEs. 116 */ 117 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 118 119 /* 120 * Prevent tag overlap between queues 121 */ 122 NVME_QUIRK_SHARED_TAGS = (1 << 13), 123 124 /* 125 * Don't change the value of the temperature threshold feature 126 */ 127 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 128 129 /* 130 * The controller doesn't handle the Identify Namespace 131 * Identification Descriptor list subcommand despite claiming 132 * NVMe 1.3 compliance. 133 */ 134 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 135 136 /* 137 * The controller does not properly handle DMA addresses over 138 * 48 bits. 139 */ 140 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 141 142 /* 143 * The controller requires the command_id value be limited, so skip 144 * encoding the generation sequence number. 145 */ 146 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 147 148 /* 149 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 150 */ 151 NVME_QUIRK_BOGUS_NID = (1 << 18), 152 }; 153 154 /* 155 * Common request structure for NVMe passthrough. All drivers must have 156 * this structure as the first member of their request-private data. 157 */ 158 struct nvme_request { 159 struct nvme_command *cmd; 160 union nvme_result result; 161 u8 genctr; 162 u8 retries; 163 u8 flags; 164 u16 status; 165 struct nvme_ctrl *ctrl; 166 }; 167 168 /* 169 * Mark a bio as coming in through the mpath node. 170 */ 171 #define REQ_NVME_MPATH REQ_DRV 172 173 enum { 174 NVME_REQ_CANCELLED = (1 << 0), 175 NVME_REQ_USERCMD = (1 << 1), 176 }; 177 178 static inline struct nvme_request *nvme_req(struct request *req) 179 { 180 return blk_mq_rq_to_pdu(req); 181 } 182 183 static inline u16 nvme_req_qid(struct request *req) 184 { 185 if (!req->q->queuedata) 186 return 0; 187 188 return req->mq_hctx->queue_num + 1; 189 } 190 191 /* The below value is the specific amount of delay needed before checking 192 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 193 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 194 * found empirically. 195 */ 196 #define NVME_QUIRK_DELAY_AMOUNT 2300 197 198 /* 199 * enum nvme_ctrl_state: Controller state 200 * 201 * @NVME_CTRL_NEW: New controller just allocated, initial state 202 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 203 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 204 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 205 * transport 206 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 207 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 208 * disabled/failed immediately. This state comes 209 * after all async event processing took place and 210 * before ns removal and the controller deletion 211 * progress 212 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 213 * shutdown or removal. In this case we forcibly 214 * kill all inflight I/O as they have no chance to 215 * complete 216 */ 217 enum nvme_ctrl_state { 218 NVME_CTRL_NEW, 219 NVME_CTRL_LIVE, 220 NVME_CTRL_RESETTING, 221 NVME_CTRL_CONNECTING, 222 NVME_CTRL_DELETING, 223 NVME_CTRL_DELETING_NOIO, 224 NVME_CTRL_DEAD, 225 }; 226 227 struct nvme_fault_inject { 228 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 229 struct fault_attr attr; 230 struct dentry *parent; 231 bool dont_retry; /* DNR, do not retry */ 232 u16 status; /* status code */ 233 #endif 234 }; 235 236 enum nvme_ctrl_flags { 237 NVME_CTRL_FAILFAST_EXPIRED = 0, 238 NVME_CTRL_ADMIN_Q_STOPPED = 1, 239 NVME_CTRL_STARTED_ONCE = 2, 240 }; 241 242 struct nvme_ctrl { 243 bool comp_seen; 244 enum nvme_ctrl_state state; 245 bool identified; 246 spinlock_t lock; 247 struct mutex scan_lock; 248 const struct nvme_ctrl_ops *ops; 249 struct request_queue *admin_q; 250 struct request_queue *connect_q; 251 struct request_queue *fabrics_q; 252 struct device *dev; 253 int instance; 254 int numa_node; 255 struct blk_mq_tag_set *tagset; 256 struct blk_mq_tag_set *admin_tagset; 257 struct list_head namespaces; 258 struct rw_semaphore namespaces_rwsem; 259 struct device ctrl_device; 260 struct device *device; /* char device */ 261 #ifdef CONFIG_NVME_HWMON 262 struct device *hwmon_device; 263 #endif 264 struct cdev cdev; 265 struct work_struct reset_work; 266 struct work_struct delete_work; 267 wait_queue_head_t state_wq; 268 269 struct nvme_subsystem *subsys; 270 struct list_head subsys_entry; 271 272 struct opal_dev *opal_dev; 273 274 char name[12]; 275 u16 cntlid; 276 277 u32 ctrl_config; 278 u16 mtfa; 279 u32 queue_count; 280 281 u64 cap; 282 u32 max_hw_sectors; 283 u32 max_segments; 284 u32 max_integrity_segments; 285 u32 max_discard_sectors; 286 u32 max_discard_segments; 287 u32 max_zeroes_sectors; 288 #ifdef CONFIG_BLK_DEV_ZONED 289 u32 max_zone_append; 290 #endif 291 u16 crdt[3]; 292 u16 oncs; 293 u32 dmrsl; 294 u16 oacs; 295 u16 sqsize; 296 u32 max_namespaces; 297 atomic_t abort_limit; 298 u8 vwc; 299 u32 vs; 300 u32 sgls; 301 u16 kas; 302 u8 npss; 303 u8 apsta; 304 u16 wctemp; 305 u16 cctemp; 306 u32 oaes; 307 u32 aen_result; 308 u32 ctratt; 309 unsigned int shutdown_timeout; 310 unsigned int kato; 311 bool subsystem; 312 unsigned long quirks; 313 struct nvme_id_power_state psd[32]; 314 struct nvme_effects_log *effects; 315 struct xarray cels; 316 struct work_struct scan_work; 317 struct work_struct async_event_work; 318 struct delayed_work ka_work; 319 struct delayed_work failfast_work; 320 struct nvme_command ka_cmd; 321 struct work_struct fw_act_work; 322 unsigned long events; 323 324 #ifdef CONFIG_NVME_MULTIPATH 325 /* asymmetric namespace access: */ 326 u8 anacap; 327 u8 anatt; 328 u32 anagrpmax; 329 u32 nanagrpid; 330 struct mutex ana_lock; 331 struct nvme_ana_rsp_hdr *ana_log_buf; 332 size_t ana_log_size; 333 struct timer_list anatt_timer; 334 struct work_struct ana_work; 335 #endif 336 337 #ifdef CONFIG_NVME_AUTH 338 struct work_struct dhchap_auth_work; 339 struct list_head dhchap_auth_list; 340 struct mutex dhchap_auth_mutex; 341 struct nvme_dhchap_key *host_key; 342 struct nvme_dhchap_key *ctrl_key; 343 u16 transaction; 344 #endif 345 346 /* Power saving configuration */ 347 u64 ps_max_latency_us; 348 bool apst_enabled; 349 350 /* PCIe only: */ 351 u32 hmpre; 352 u32 hmmin; 353 u32 hmminds; 354 u16 hmmaxd; 355 356 /* Fabrics only */ 357 u32 ioccsz; 358 u32 iorcsz; 359 u16 icdoff; 360 u16 maxcmd; 361 int nr_reconnects; 362 unsigned long flags; 363 struct nvmf_ctrl_options *opts; 364 365 struct page *discard_page; 366 unsigned long discard_page_busy; 367 368 struct nvme_fault_inject fault_inject; 369 370 enum nvme_ctrl_type cntrltype; 371 enum nvme_dctype dctype; 372 }; 373 374 enum nvme_iopolicy { 375 NVME_IOPOLICY_NUMA, 376 NVME_IOPOLICY_RR, 377 }; 378 379 struct nvme_subsystem { 380 int instance; 381 struct device dev; 382 /* 383 * Because we unregister the device on the last put we need 384 * a separate refcount. 385 */ 386 struct kref ref; 387 struct list_head entry; 388 struct mutex lock; 389 struct list_head ctrls; 390 struct list_head nsheads; 391 char subnqn[NVMF_NQN_SIZE]; 392 char serial[20]; 393 char model[40]; 394 char firmware_rev[8]; 395 u8 cmic; 396 enum nvme_subsys_type subtype; 397 u16 vendor_id; 398 u16 awupf; /* 0's based awupf value. */ 399 struct ida ns_ida; 400 #ifdef CONFIG_NVME_MULTIPATH 401 enum nvme_iopolicy iopolicy; 402 #endif 403 }; 404 405 /* 406 * Container structure for uniqueue namespace identifiers. 407 */ 408 struct nvme_ns_ids { 409 u8 eui64[8]; 410 u8 nguid[16]; 411 uuid_t uuid; 412 u8 csi; 413 }; 414 415 /* 416 * Anchor structure for namespaces. There is one for each namespace in a 417 * NVMe subsystem that any of our controllers can see, and the namespace 418 * structure for each controller is chained of it. For private namespaces 419 * there is a 1:1 relation to our namespace structures, that is ->list 420 * only ever has a single entry for private namespaces. 421 */ 422 struct nvme_ns_head { 423 struct list_head list; 424 struct srcu_struct srcu; 425 struct nvme_subsystem *subsys; 426 unsigned ns_id; 427 struct nvme_ns_ids ids; 428 struct list_head entry; 429 struct kref ref; 430 bool shared; 431 int instance; 432 struct nvme_effects_log *effects; 433 434 struct cdev cdev; 435 struct device cdev_device; 436 437 struct gendisk *disk; 438 #ifdef CONFIG_NVME_MULTIPATH 439 struct bio_list requeue_list; 440 spinlock_t requeue_lock; 441 struct work_struct requeue_work; 442 struct mutex lock; 443 unsigned long flags; 444 #define NVME_NSHEAD_DISK_LIVE 0 445 struct nvme_ns __rcu *current_path[]; 446 #endif 447 }; 448 449 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 450 { 451 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 452 } 453 454 enum nvme_ns_features { 455 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 456 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 457 }; 458 459 struct nvme_ns { 460 struct list_head list; 461 462 struct nvme_ctrl *ctrl; 463 struct request_queue *queue; 464 struct gendisk *disk; 465 #ifdef CONFIG_NVME_MULTIPATH 466 enum nvme_ana_state ana_state; 467 u32 ana_grpid; 468 #endif 469 struct list_head siblings; 470 struct kref kref; 471 struct nvme_ns_head *head; 472 473 int lba_shift; 474 u16 ms; 475 u16 pi_size; 476 u16 sgs; 477 u32 sws; 478 u8 pi_type; 479 u8 guard_type; 480 #ifdef CONFIG_BLK_DEV_ZONED 481 u64 zsze; 482 #endif 483 unsigned long features; 484 unsigned long flags; 485 #define NVME_NS_REMOVING 0 486 #define NVME_NS_DEAD 1 487 #define NVME_NS_ANA_PENDING 2 488 #define NVME_NS_FORCE_RO 3 489 #define NVME_NS_READY 4 490 #define NVME_NS_STOPPED 5 491 492 struct cdev cdev; 493 struct device cdev_device; 494 495 struct nvme_fault_inject fault_inject; 496 497 }; 498 499 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 500 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 501 { 502 return ns->pi_type && ns->ms == ns->pi_size; 503 } 504 505 struct nvme_ctrl_ops { 506 const char *name; 507 struct module *module; 508 unsigned int flags; 509 #define NVME_F_FABRICS (1 << 0) 510 #define NVME_F_METADATA_SUPPORTED (1 << 1) 511 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 512 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 513 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 514 void (*free_ctrl)(struct nvme_ctrl *ctrl); 515 void (*submit_async_event)(struct nvme_ctrl *ctrl); 516 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 517 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 518 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 519 void (*print_device_info)(struct nvme_ctrl *ctrl); 520 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 521 }; 522 523 /* 524 * nvme command_id is constructed as such: 525 * | xxxx | xxxxxxxxxxxx | 526 * gen request tag 527 */ 528 #define nvme_genctr_mask(gen) (gen & 0xf) 529 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 530 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 531 #define nvme_tag_from_cid(cid) (cid & 0xfff) 532 533 static inline u16 nvme_cid(struct request *rq) 534 { 535 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 536 } 537 538 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 539 u16 command_id) 540 { 541 u8 genctr = nvme_genctr_from_cid(command_id); 542 u16 tag = nvme_tag_from_cid(command_id); 543 struct request *rq; 544 545 rq = blk_mq_tag_to_rq(tags, tag); 546 if (unlikely(!rq)) { 547 pr_err("could not locate request for tag %#x\n", 548 tag); 549 return NULL; 550 } 551 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 552 dev_err(nvme_req(rq)->ctrl->device, 553 "request %#x genctr mismatch (got %#x expected %#x)\n", 554 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 555 return NULL; 556 } 557 return rq; 558 } 559 560 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 561 u16 command_id) 562 { 563 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 564 } 565 566 /* 567 * Return the length of the string without the space padding 568 */ 569 static inline int nvme_strlen(char *s, int len) 570 { 571 while (s[len - 1] == ' ') 572 len--; 573 return len; 574 } 575 576 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 577 { 578 struct nvme_subsystem *subsys = ctrl->subsys; 579 580 if (ctrl->ops->print_device_info) { 581 ctrl->ops->print_device_info(ctrl); 582 return; 583 } 584 585 dev_err(ctrl->device, 586 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 587 nvme_strlen(subsys->model, sizeof(subsys->model)), 588 subsys->model, nvme_strlen(subsys->firmware_rev, 589 sizeof(subsys->firmware_rev)), 590 subsys->firmware_rev); 591 } 592 593 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 594 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 595 const char *dev_name); 596 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 597 void nvme_should_fail(struct request *req); 598 #else 599 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 600 const char *dev_name) 601 { 602 } 603 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 604 { 605 } 606 static inline void nvme_should_fail(struct request *req) {} 607 #endif 608 609 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 610 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 611 612 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 613 { 614 int ret; 615 616 if (!ctrl->subsystem) 617 return -ENOTTY; 618 if (!nvme_wait_reset(ctrl)) 619 return -EBUSY; 620 621 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 622 if (ret) 623 return ret; 624 625 return nvme_try_sched_reset(ctrl); 626 } 627 628 /* 629 * Convert a 512B sector number to a device logical block number. 630 */ 631 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 632 { 633 return sector >> (ns->lba_shift - SECTOR_SHIFT); 634 } 635 636 /* 637 * Convert a device logical block number to a 512B sector number. 638 */ 639 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 640 { 641 return lba << (ns->lba_shift - SECTOR_SHIFT); 642 } 643 644 /* 645 * Convert byte length to nvme's 0-based num dwords 646 */ 647 static inline u32 nvme_bytes_to_numd(size_t len) 648 { 649 return (len >> 2) - 1; 650 } 651 652 static inline bool nvme_is_ana_error(u16 status) 653 { 654 switch (status & 0x7ff) { 655 case NVME_SC_ANA_TRANSITION: 656 case NVME_SC_ANA_INACCESSIBLE: 657 case NVME_SC_ANA_PERSISTENT_LOSS: 658 return true; 659 default: 660 return false; 661 } 662 } 663 664 static inline bool nvme_is_path_error(u16 status) 665 { 666 /* check for a status code type of 'path related status' */ 667 return (status & 0x700) == 0x300; 668 } 669 670 /* 671 * Fill in the status and result information from the CQE, and then figure out 672 * if blk-mq will need to use IPI magic to complete the request, and if yes do 673 * so. If not let the caller complete the request without an indirect function 674 * call. 675 */ 676 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 677 union nvme_result result) 678 { 679 struct nvme_request *rq = nvme_req(req); 680 struct nvme_ctrl *ctrl = rq->ctrl; 681 682 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 683 rq->genctr++; 684 685 rq->status = le16_to_cpu(status) >> 1; 686 rq->result = result; 687 /* inject error when permitted by fault injection framework */ 688 nvme_should_fail(req); 689 if (unlikely(blk_should_fake_timeout(req->q))) 690 return true; 691 return blk_mq_complete_request_remote(req); 692 } 693 694 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 695 { 696 get_device(ctrl->device); 697 } 698 699 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 700 { 701 put_device(ctrl->device); 702 } 703 704 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 705 { 706 return !qid && 707 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 708 } 709 710 void nvme_complete_rq(struct request *req); 711 void nvme_complete_batch_req(struct request *req); 712 713 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 714 void (*fn)(struct request *rq)) 715 { 716 struct request *req; 717 718 rq_list_for_each(&iob->req_list, req) { 719 fn(req); 720 nvme_complete_batch_req(req); 721 } 722 blk_mq_end_request_batch(iob); 723 } 724 725 blk_status_t nvme_host_path_error(struct request *req); 726 bool nvme_cancel_request(struct request *req, void *data); 727 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 728 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 729 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 730 enum nvme_ctrl_state new_state); 731 int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 732 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 733 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 734 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 735 const struct nvme_ctrl_ops *ops, unsigned long quirks); 736 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 737 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 738 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 739 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl); 740 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 741 const struct blk_mq_ops *ops, unsigned int flags, 742 unsigned int cmd_size); 743 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 744 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 745 const struct blk_mq_ops *ops, unsigned int flags, 746 unsigned int cmd_size); 747 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 748 749 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 750 751 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 752 bool send); 753 754 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 755 volatile union nvme_result *res); 756 757 void nvme_stop_queues(struct nvme_ctrl *ctrl); 758 void nvme_start_queues(struct nvme_ctrl *ctrl); 759 void nvme_stop_admin_queue(struct nvme_ctrl *ctrl); 760 void nvme_start_admin_queue(struct nvme_ctrl *ctrl); 761 void nvme_kill_queues(struct nvme_ctrl *ctrl); 762 void nvme_sync_queues(struct nvme_ctrl *ctrl); 763 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 764 void nvme_unfreeze(struct nvme_ctrl *ctrl); 765 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 766 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 767 void nvme_start_freeze(struct nvme_ctrl *ctrl); 768 769 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 770 { 771 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 772 } 773 774 #define NVME_QID_ANY -1 775 void nvme_init_request(struct request *req, struct nvme_command *cmd); 776 void nvme_cleanup_cmd(struct request *req); 777 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 778 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 779 struct request *req); 780 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 781 bool queue_live); 782 783 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 784 bool queue_live) 785 { 786 if (likely(ctrl->state == NVME_CTRL_LIVE)) 787 return true; 788 if (ctrl->ops->flags & NVME_F_FABRICS && 789 ctrl->state == NVME_CTRL_DELETING) 790 return queue_live; 791 return __nvme_check_ready(ctrl, rq, queue_live); 792 } 793 794 /* 795 * NSID shall be unique for all shared namespaces, or if at least one of the 796 * following conditions is met: 797 * 1. Namespace Management is supported by the controller 798 * 2. ANA is supported by the controller 799 * 3. NVM Set are supported by the controller 800 * 801 * In other case, private namespace are not required to report a unique NSID. 802 */ 803 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 804 struct nvme_ns_head *head) 805 { 806 return head->shared || 807 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 808 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 809 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 810 } 811 812 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 813 void *buf, unsigned bufflen); 814 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 815 union nvme_result *result, void *buffer, unsigned bufflen, 816 int qid, int at_head, 817 blk_mq_req_flags_t flags); 818 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 819 unsigned int dword11, void *buffer, size_t buflen, 820 u32 *result); 821 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 822 unsigned int dword11, void *buffer, size_t buflen, 823 u32 *result); 824 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 825 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 826 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 827 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 828 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 829 void nvme_queue_scan(struct nvme_ctrl *ctrl); 830 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 831 void *log, size_t size, u64 offset); 832 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 833 void nvme_put_ns_head(struct nvme_ns_head *head); 834 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 835 const struct file_operations *fops, struct module *owner); 836 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 837 int nvme_ioctl(struct block_device *bdev, fmode_t mode, 838 unsigned int cmd, unsigned long arg); 839 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 840 int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode, 841 unsigned int cmd, unsigned long arg); 842 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 843 unsigned long arg); 844 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 845 unsigned long arg); 846 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 847 struct io_comp_batch *iob, unsigned int poll_flags); 848 int nvme_ns_head_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 849 struct io_comp_batch *iob, unsigned int poll_flags); 850 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 851 unsigned int issue_flags); 852 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 853 unsigned int issue_flags); 854 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 855 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 856 857 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 858 extern const struct pr_ops nvme_pr_ops; 859 extern const struct block_device_operations nvme_ns_head_ops; 860 861 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 862 #ifdef CONFIG_NVME_MULTIPATH 863 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 864 { 865 return ctrl->ana_log_buf != NULL; 866 } 867 868 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 869 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 870 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 871 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 872 void nvme_failover_req(struct request *req); 873 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 874 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 875 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 876 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 877 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 878 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 879 void nvme_mpath_update(struct nvme_ctrl *ctrl); 880 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 881 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 882 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 883 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 884 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 885 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 886 887 static inline void nvme_trace_bio_complete(struct request *req) 888 { 889 struct nvme_ns *ns = req->q->queuedata; 890 891 if (req->cmd_flags & REQ_NVME_MPATH) 892 trace_block_bio_complete(ns->head->disk->queue, req->bio); 893 } 894 895 extern bool multipath; 896 extern struct device_attribute dev_attr_ana_grpid; 897 extern struct device_attribute dev_attr_ana_state; 898 extern struct device_attribute subsys_attr_iopolicy; 899 900 #else 901 #define multipath false 902 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 903 { 904 return false; 905 } 906 static inline void nvme_failover_req(struct request *req) 907 { 908 } 909 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 910 { 911 } 912 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 913 struct nvme_ns_head *head) 914 { 915 return 0; 916 } 917 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 918 { 919 } 920 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 921 { 922 } 923 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 924 { 925 return false; 926 } 927 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 928 { 929 } 930 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 931 { 932 } 933 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 934 { 935 } 936 static inline void nvme_trace_bio_complete(struct request *req) 937 { 938 } 939 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 940 { 941 } 942 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 943 struct nvme_id_ctrl *id) 944 { 945 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 946 dev_warn(ctrl->device, 947 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 948 return 0; 949 } 950 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 951 { 952 } 953 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 954 { 955 } 956 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 957 { 958 } 959 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 960 { 961 } 962 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 963 { 964 } 965 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 966 { 967 } 968 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 969 { 970 } 971 #endif /* CONFIG_NVME_MULTIPATH */ 972 973 int nvme_revalidate_zones(struct nvme_ns *ns); 974 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 975 unsigned int nr_zones, report_zones_cb cb, void *data); 976 #ifdef CONFIG_BLK_DEV_ZONED 977 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 978 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 979 struct nvme_command *cmnd, 980 enum nvme_zone_mgmt_action action); 981 #else 982 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 983 struct request *req, struct nvme_command *cmnd, 984 enum nvme_zone_mgmt_action action) 985 { 986 return BLK_STS_NOTSUPP; 987 } 988 989 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 990 { 991 dev_warn(ns->ctrl->device, 992 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 993 return -EPROTONOSUPPORT; 994 } 995 #endif 996 997 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 998 { 999 return dev_to_disk(dev)->private_data; 1000 } 1001 1002 #ifdef CONFIG_NVME_HWMON 1003 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1004 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1005 #else 1006 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1007 { 1008 return 0; 1009 } 1010 1011 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1012 { 1013 } 1014 #endif 1015 1016 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1017 { 1018 return ctrl->sgls & ((1 << 0) | (1 << 1)); 1019 } 1020 1021 #ifdef CONFIG_NVME_AUTH 1022 void nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1023 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1024 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1025 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1026 void nvme_auth_reset(struct nvme_ctrl *ctrl); 1027 void nvme_auth_free(struct nvme_ctrl *ctrl); 1028 #else 1029 static inline void nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) {}; 1030 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1031 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1032 { 1033 return -EPROTONOSUPPORT; 1034 } 1035 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1036 { 1037 return NVME_SC_AUTH_REQUIRED; 1038 } 1039 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1040 #endif 1041 1042 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1043 u8 opcode); 1044 int nvme_execute_passthru_rq(struct request *rq, u32 *effects); 1045 void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects, 1046 struct nvme_command *cmd, int status); 1047 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1048 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1049 void nvme_put_ns(struct nvme_ns *ns); 1050 1051 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1052 { 1053 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1054 } 1055 1056 #ifdef CONFIG_NVME_VERBOSE_ERRORS 1057 const unsigned char *nvme_get_error_status_str(u16 status); 1058 const unsigned char *nvme_get_opcode_str(u8 opcode); 1059 const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1060 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1061 static inline const unsigned char *nvme_get_error_status_str(u16 status) 1062 { 1063 return "I/O Error"; 1064 } 1065 static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1066 { 1067 return "I/O Cmd"; 1068 } 1069 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1070 { 1071 return "Admin Cmd"; 1072 } 1073 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1074 1075 #endif /* _NVME_H */ 1076