1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern const struct pr_ops nvme_pr_ops; 23 24 extern unsigned int nvme_io_timeout; 25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 26 27 extern unsigned int admin_timeout; 28 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 29 30 #define NVME_DEFAULT_KATO 5 31 32 #ifdef CONFIG_ARCH_NO_SG_CHAIN 33 #define NVME_INLINE_SG_CNT 0 34 #define NVME_INLINE_METADATA_SG_CNT 0 35 #else 36 #define NVME_INLINE_SG_CNT 2 37 #define NVME_INLINE_METADATA_SG_CNT 1 38 #endif 39 40 /* 41 * Default to a 4K page size, with the intention to update this 42 * path in the future to accommodate architectures with differing 43 * kernel and IO page sizes. 44 */ 45 #define NVME_CTRL_PAGE_SHIFT 12 46 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 47 48 extern struct workqueue_struct *nvme_wq; 49 extern struct workqueue_struct *nvme_reset_wq; 50 extern struct workqueue_struct *nvme_delete_wq; 51 52 /* 53 * List of workarounds for devices that required behavior not specified in 54 * the standard. 55 */ 56 enum nvme_quirks { 57 /* 58 * Prefers I/O aligned to a stripe size specified in a vendor 59 * specific Identify field. 60 */ 61 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 62 63 /* 64 * The controller doesn't handle Identify value others than 0 or 1 65 * correctly. 66 */ 67 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 68 69 /* 70 * The controller deterministically returns O's on reads to 71 * logical blocks that deallocate was called on. 72 */ 73 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 74 75 /* 76 * The controller needs a delay before starts checking the device 77 * readiness, which is done by reading the NVME_CSTS_RDY bit. 78 */ 79 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 80 81 /* 82 * APST should not be used. 83 */ 84 NVME_QUIRK_NO_APST = (1 << 4), 85 86 /* 87 * The deepest sleep state should not be used. 88 */ 89 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 90 91 /* 92 * Set MEDIUM priority on SQ creation 93 */ 94 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 95 96 /* 97 * Ignore device provided subnqn. 98 */ 99 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 100 101 /* 102 * Broken Write Zeroes. 103 */ 104 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 105 106 /* 107 * Force simple suspend/resume path. 108 */ 109 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 110 111 /* 112 * Use only one interrupt vector for all queues 113 */ 114 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 115 116 /* 117 * Use non-standard 128 bytes SQEs. 118 */ 119 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 120 121 /* 122 * Prevent tag overlap between queues 123 */ 124 NVME_QUIRK_SHARED_TAGS = (1 << 13), 125 126 /* 127 * Don't change the value of the temperature threshold feature 128 */ 129 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 130 131 /* 132 * The controller doesn't handle the Identify Namespace 133 * Identification Descriptor list subcommand despite claiming 134 * NVMe 1.3 compliance. 135 */ 136 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 137 138 /* 139 * The controller does not properly handle DMA addresses over 140 * 48 bits. 141 */ 142 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 143 144 /* 145 * The controller requires the command_id value be limited, so skip 146 * encoding the generation sequence number. 147 */ 148 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 149 150 /* 151 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 152 */ 153 NVME_QUIRK_BOGUS_NID = (1 << 18), 154 155 /* 156 * No temperature thresholds for channels other than 0 (Composite). 157 */ 158 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 159 }; 160 161 /* 162 * Common request structure for NVMe passthrough. All drivers must have 163 * this structure as the first member of their request-private data. 164 */ 165 struct nvme_request { 166 struct nvme_command *cmd; 167 union nvme_result result; 168 u8 genctr; 169 u8 retries; 170 u8 flags; 171 u16 status; 172 #ifdef CONFIG_NVME_MULTIPATH 173 unsigned long start_time; 174 #endif 175 struct nvme_ctrl *ctrl; 176 }; 177 178 /* 179 * Mark a bio as coming in through the mpath node. 180 */ 181 #define REQ_NVME_MPATH REQ_DRV 182 183 enum { 184 NVME_REQ_CANCELLED = (1 << 0), 185 NVME_REQ_USERCMD = (1 << 1), 186 NVME_MPATH_IO_STATS = (1 << 2), 187 }; 188 189 static inline struct nvme_request *nvme_req(struct request *req) 190 { 191 return blk_mq_rq_to_pdu(req); 192 } 193 194 static inline u16 nvme_req_qid(struct request *req) 195 { 196 if (!req->q->queuedata) 197 return 0; 198 199 return req->mq_hctx->queue_num + 1; 200 } 201 202 /* The below value is the specific amount of delay needed before checking 203 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 204 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 205 * found empirically. 206 */ 207 #define NVME_QUIRK_DELAY_AMOUNT 2300 208 209 /* 210 * enum nvme_ctrl_state: Controller state 211 * 212 * @NVME_CTRL_NEW: New controller just allocated, initial state 213 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 214 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 215 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 216 * transport 217 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 218 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 219 * disabled/failed immediately. This state comes 220 * after all async event processing took place and 221 * before ns removal and the controller deletion 222 * progress 223 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 224 * shutdown or removal. In this case we forcibly 225 * kill all inflight I/O as they have no chance to 226 * complete 227 */ 228 enum nvme_ctrl_state { 229 NVME_CTRL_NEW, 230 NVME_CTRL_LIVE, 231 NVME_CTRL_RESETTING, 232 NVME_CTRL_CONNECTING, 233 NVME_CTRL_DELETING, 234 NVME_CTRL_DELETING_NOIO, 235 NVME_CTRL_DEAD, 236 }; 237 238 struct nvme_fault_inject { 239 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 240 struct fault_attr attr; 241 struct dentry *parent; 242 bool dont_retry; /* DNR, do not retry */ 243 u16 status; /* status code */ 244 #endif 245 }; 246 247 enum nvme_ctrl_flags { 248 NVME_CTRL_FAILFAST_EXPIRED = 0, 249 NVME_CTRL_ADMIN_Q_STOPPED = 1, 250 NVME_CTRL_STARTED_ONCE = 2, 251 NVME_CTRL_STOPPED = 3, 252 NVME_CTRL_SKIP_ID_CNS_CS = 4, 253 NVME_CTRL_DIRTY_CAPABILITY = 5, 254 }; 255 256 struct nvme_ctrl { 257 bool comp_seen; 258 bool identified; 259 enum nvme_ctrl_state state; 260 spinlock_t lock; 261 struct mutex scan_lock; 262 const struct nvme_ctrl_ops *ops; 263 struct request_queue *admin_q; 264 struct request_queue *connect_q; 265 struct request_queue *fabrics_q; 266 struct device *dev; 267 int instance; 268 int numa_node; 269 struct blk_mq_tag_set *tagset; 270 struct blk_mq_tag_set *admin_tagset; 271 struct list_head namespaces; 272 struct rw_semaphore namespaces_rwsem; 273 struct device ctrl_device; 274 struct device *device; /* char device */ 275 #ifdef CONFIG_NVME_HWMON 276 struct device *hwmon_device; 277 #endif 278 struct cdev cdev; 279 struct work_struct reset_work; 280 struct work_struct delete_work; 281 wait_queue_head_t state_wq; 282 283 struct nvme_subsystem *subsys; 284 struct list_head subsys_entry; 285 286 struct opal_dev *opal_dev; 287 288 char name[12]; 289 u16 cntlid; 290 291 u16 mtfa; 292 u32 ctrl_config; 293 u32 queue_count; 294 295 u64 cap; 296 u32 max_hw_sectors; 297 u32 max_segments; 298 u32 max_integrity_segments; 299 u32 max_discard_sectors; 300 u32 max_discard_segments; 301 u32 max_zeroes_sectors; 302 #ifdef CONFIG_BLK_DEV_ZONED 303 u32 max_zone_append; 304 #endif 305 u16 crdt[3]; 306 u16 oncs; 307 u32 dmrsl; 308 u16 oacs; 309 u16 sqsize; 310 u32 max_namespaces; 311 atomic_t abort_limit; 312 u8 vwc; 313 u32 vs; 314 u32 sgls; 315 u16 kas; 316 u8 npss; 317 u8 apsta; 318 u16 wctemp; 319 u16 cctemp; 320 u32 oaes; 321 u32 aen_result; 322 u32 ctratt; 323 unsigned int shutdown_timeout; 324 unsigned int kato; 325 bool subsystem; 326 unsigned long quirks; 327 struct nvme_id_power_state psd[32]; 328 struct nvme_effects_log *effects; 329 struct xarray cels; 330 struct work_struct scan_work; 331 struct work_struct async_event_work; 332 struct delayed_work ka_work; 333 struct delayed_work failfast_work; 334 struct nvme_command ka_cmd; 335 unsigned long ka_last_check_time; 336 struct work_struct fw_act_work; 337 unsigned long events; 338 339 #ifdef CONFIG_NVME_MULTIPATH 340 /* asymmetric namespace access: */ 341 u8 anacap; 342 u8 anatt; 343 u32 anagrpmax; 344 u32 nanagrpid; 345 struct mutex ana_lock; 346 struct nvme_ana_rsp_hdr *ana_log_buf; 347 size_t ana_log_size; 348 struct timer_list anatt_timer; 349 struct work_struct ana_work; 350 #endif 351 352 #ifdef CONFIG_NVME_AUTH 353 struct work_struct dhchap_auth_work; 354 struct mutex dhchap_auth_mutex; 355 struct nvme_dhchap_queue_context *dhchap_ctxs; 356 struct nvme_dhchap_key *host_key; 357 struct nvme_dhchap_key *ctrl_key; 358 u16 transaction; 359 #endif 360 361 /* Power saving configuration */ 362 u64 ps_max_latency_us; 363 bool apst_enabled; 364 365 /* PCIe only: */ 366 u16 hmmaxd; 367 u32 hmpre; 368 u32 hmmin; 369 u32 hmminds; 370 371 /* Fabrics only */ 372 u32 ioccsz; 373 u32 iorcsz; 374 u16 icdoff; 375 u16 maxcmd; 376 int nr_reconnects; 377 unsigned long flags; 378 struct nvmf_ctrl_options *opts; 379 380 struct page *discard_page; 381 unsigned long discard_page_busy; 382 383 struct nvme_fault_inject fault_inject; 384 385 enum nvme_ctrl_type cntrltype; 386 enum nvme_dctype dctype; 387 }; 388 389 enum nvme_iopolicy { 390 NVME_IOPOLICY_NUMA, 391 NVME_IOPOLICY_RR, 392 }; 393 394 struct nvme_subsystem { 395 int instance; 396 struct device dev; 397 /* 398 * Because we unregister the device on the last put we need 399 * a separate refcount. 400 */ 401 struct kref ref; 402 struct list_head entry; 403 struct mutex lock; 404 struct list_head ctrls; 405 struct list_head nsheads; 406 char subnqn[NVMF_NQN_SIZE]; 407 char serial[20]; 408 char model[40]; 409 char firmware_rev[8]; 410 u8 cmic; 411 enum nvme_subsys_type subtype; 412 u16 vendor_id; 413 u16 awupf; /* 0's based awupf value. */ 414 struct ida ns_ida; 415 #ifdef CONFIG_NVME_MULTIPATH 416 enum nvme_iopolicy iopolicy; 417 #endif 418 }; 419 420 /* 421 * Container structure for uniqueue namespace identifiers. 422 */ 423 struct nvme_ns_ids { 424 u8 eui64[8]; 425 u8 nguid[16]; 426 uuid_t uuid; 427 u8 csi; 428 }; 429 430 /* 431 * Anchor structure for namespaces. There is one for each namespace in a 432 * NVMe subsystem that any of our controllers can see, and the namespace 433 * structure for each controller is chained of it. For private namespaces 434 * there is a 1:1 relation to our namespace structures, that is ->list 435 * only ever has a single entry for private namespaces. 436 */ 437 struct nvme_ns_head { 438 struct list_head list; 439 struct srcu_struct srcu; 440 struct nvme_subsystem *subsys; 441 unsigned ns_id; 442 struct nvme_ns_ids ids; 443 struct list_head entry; 444 struct kref ref; 445 bool shared; 446 int instance; 447 struct nvme_effects_log *effects; 448 449 struct cdev cdev; 450 struct device cdev_device; 451 452 struct gendisk *disk; 453 #ifdef CONFIG_NVME_MULTIPATH 454 struct bio_list requeue_list; 455 spinlock_t requeue_lock; 456 struct work_struct requeue_work; 457 struct mutex lock; 458 unsigned long flags; 459 #define NVME_NSHEAD_DISK_LIVE 0 460 struct nvme_ns __rcu *current_path[]; 461 #endif 462 }; 463 464 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 465 { 466 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 467 } 468 469 enum nvme_ns_features { 470 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 471 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 472 NVME_NS_DEAC, /* DEAC bit in Write Zeores supported */ 473 }; 474 475 struct nvme_ns { 476 struct list_head list; 477 478 struct nvme_ctrl *ctrl; 479 struct request_queue *queue; 480 struct gendisk *disk; 481 #ifdef CONFIG_NVME_MULTIPATH 482 enum nvme_ana_state ana_state; 483 u32 ana_grpid; 484 #endif 485 struct list_head siblings; 486 struct kref kref; 487 struct nvme_ns_head *head; 488 489 int lba_shift; 490 u16 ms; 491 u16 pi_size; 492 u16 sgs; 493 u32 sws; 494 u8 pi_type; 495 u8 guard_type; 496 #ifdef CONFIG_BLK_DEV_ZONED 497 u64 zsze; 498 #endif 499 unsigned long features; 500 unsigned long flags; 501 #define NVME_NS_REMOVING 0 502 #define NVME_NS_ANA_PENDING 2 503 #define NVME_NS_FORCE_RO 3 504 #define NVME_NS_READY 4 505 506 struct cdev cdev; 507 struct device cdev_device; 508 509 struct nvme_fault_inject fault_inject; 510 511 }; 512 513 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 514 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 515 { 516 return ns->pi_type && ns->ms == ns->pi_size; 517 } 518 519 struct nvme_ctrl_ops { 520 const char *name; 521 struct module *module; 522 unsigned int flags; 523 #define NVME_F_FABRICS (1 << 0) 524 #define NVME_F_METADATA_SUPPORTED (1 << 1) 525 #define NVME_F_BLOCKING (1 << 2) 526 527 const struct attribute_group **dev_attr_groups; 528 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 529 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 530 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 531 void (*free_ctrl)(struct nvme_ctrl *ctrl); 532 void (*submit_async_event)(struct nvme_ctrl *ctrl); 533 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 534 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 535 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 536 void (*print_device_info)(struct nvme_ctrl *ctrl); 537 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 538 }; 539 540 /* 541 * nvme command_id is constructed as such: 542 * | xxxx | xxxxxxxxxxxx | 543 * gen request tag 544 */ 545 #define nvme_genctr_mask(gen) (gen & 0xf) 546 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 547 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 548 #define nvme_tag_from_cid(cid) (cid & 0xfff) 549 550 static inline u16 nvme_cid(struct request *rq) 551 { 552 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 553 } 554 555 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 556 u16 command_id) 557 { 558 u8 genctr = nvme_genctr_from_cid(command_id); 559 u16 tag = nvme_tag_from_cid(command_id); 560 struct request *rq; 561 562 rq = blk_mq_tag_to_rq(tags, tag); 563 if (unlikely(!rq)) { 564 pr_err("could not locate request for tag %#x\n", 565 tag); 566 return NULL; 567 } 568 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 569 dev_err(nvme_req(rq)->ctrl->device, 570 "request %#x genctr mismatch (got %#x expected %#x)\n", 571 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 572 return NULL; 573 } 574 return rq; 575 } 576 577 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 578 u16 command_id) 579 { 580 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 581 } 582 583 /* 584 * Return the length of the string without the space padding 585 */ 586 static inline int nvme_strlen(char *s, int len) 587 { 588 while (s[len - 1] == ' ') 589 len--; 590 return len; 591 } 592 593 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 594 { 595 struct nvme_subsystem *subsys = ctrl->subsys; 596 597 if (ctrl->ops->print_device_info) { 598 ctrl->ops->print_device_info(ctrl); 599 return; 600 } 601 602 dev_err(ctrl->device, 603 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 604 nvme_strlen(subsys->model, sizeof(subsys->model)), 605 subsys->model, nvme_strlen(subsys->firmware_rev, 606 sizeof(subsys->firmware_rev)), 607 subsys->firmware_rev); 608 } 609 610 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 611 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 612 const char *dev_name); 613 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 614 void nvme_should_fail(struct request *req); 615 #else 616 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 617 const char *dev_name) 618 { 619 } 620 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 621 { 622 } 623 static inline void nvme_should_fail(struct request *req) {} 624 #endif 625 626 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 627 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 628 629 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 630 { 631 int ret; 632 633 if (!ctrl->subsystem) 634 return -ENOTTY; 635 if (!nvme_wait_reset(ctrl)) 636 return -EBUSY; 637 638 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 639 if (ret) 640 return ret; 641 642 return nvme_try_sched_reset(ctrl); 643 } 644 645 /* 646 * Convert a 512B sector number to a device logical block number. 647 */ 648 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 649 { 650 return sector >> (ns->lba_shift - SECTOR_SHIFT); 651 } 652 653 /* 654 * Convert a device logical block number to a 512B sector number. 655 */ 656 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 657 { 658 return lba << (ns->lba_shift - SECTOR_SHIFT); 659 } 660 661 /* 662 * Convert byte length to nvme's 0-based num dwords 663 */ 664 static inline u32 nvme_bytes_to_numd(size_t len) 665 { 666 return (len >> 2) - 1; 667 } 668 669 static inline bool nvme_is_ana_error(u16 status) 670 { 671 switch (status & 0x7ff) { 672 case NVME_SC_ANA_TRANSITION: 673 case NVME_SC_ANA_INACCESSIBLE: 674 case NVME_SC_ANA_PERSISTENT_LOSS: 675 return true; 676 default: 677 return false; 678 } 679 } 680 681 static inline bool nvme_is_path_error(u16 status) 682 { 683 /* check for a status code type of 'path related status' */ 684 return (status & 0x700) == 0x300; 685 } 686 687 /* 688 * Fill in the status and result information from the CQE, and then figure out 689 * if blk-mq will need to use IPI magic to complete the request, and if yes do 690 * so. If not let the caller complete the request without an indirect function 691 * call. 692 */ 693 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 694 union nvme_result result) 695 { 696 struct nvme_request *rq = nvme_req(req); 697 struct nvme_ctrl *ctrl = rq->ctrl; 698 699 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 700 rq->genctr++; 701 702 rq->status = le16_to_cpu(status) >> 1; 703 rq->result = result; 704 /* inject error when permitted by fault injection framework */ 705 nvme_should_fail(req); 706 if (unlikely(blk_should_fake_timeout(req->q))) 707 return true; 708 return blk_mq_complete_request_remote(req); 709 } 710 711 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 712 { 713 get_device(ctrl->device); 714 } 715 716 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 717 { 718 put_device(ctrl->device); 719 } 720 721 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 722 { 723 return !qid && 724 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 725 } 726 727 void nvme_complete_rq(struct request *req); 728 void nvme_complete_batch_req(struct request *req); 729 730 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 731 void (*fn)(struct request *rq)) 732 { 733 struct request *req; 734 735 rq_list_for_each(&iob->req_list, req) { 736 fn(req); 737 nvme_complete_batch_req(req); 738 } 739 blk_mq_end_request_batch(iob); 740 } 741 742 blk_status_t nvme_host_path_error(struct request *req); 743 bool nvme_cancel_request(struct request *req, void *data); 744 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 745 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 746 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 747 enum nvme_ctrl_state new_state); 748 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 749 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 750 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 751 const struct nvme_ctrl_ops *ops, unsigned long quirks); 752 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 753 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 754 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 755 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 756 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 757 const struct blk_mq_ops *ops, unsigned int cmd_size); 758 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 759 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 760 const struct blk_mq_ops *ops, unsigned int nr_maps, 761 unsigned int cmd_size); 762 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 763 764 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 765 766 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 767 volatile union nvme_result *res); 768 769 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 770 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 771 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 772 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 773 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 774 void nvme_sync_queues(struct nvme_ctrl *ctrl); 775 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 776 void nvme_unfreeze(struct nvme_ctrl *ctrl); 777 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 778 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 779 void nvme_start_freeze(struct nvme_ctrl *ctrl); 780 781 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 782 { 783 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 784 } 785 786 #define NVME_QID_ANY -1 787 void nvme_init_request(struct request *req, struct nvme_command *cmd); 788 void nvme_cleanup_cmd(struct request *req); 789 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 790 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 791 struct request *req); 792 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 793 bool queue_live); 794 795 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 796 bool queue_live) 797 { 798 if (likely(ctrl->state == NVME_CTRL_LIVE)) 799 return true; 800 if (ctrl->ops->flags & NVME_F_FABRICS && 801 ctrl->state == NVME_CTRL_DELETING) 802 return queue_live; 803 return __nvme_check_ready(ctrl, rq, queue_live); 804 } 805 806 /* 807 * NSID shall be unique for all shared namespaces, or if at least one of the 808 * following conditions is met: 809 * 1. Namespace Management is supported by the controller 810 * 2. ANA is supported by the controller 811 * 3. NVM Set are supported by the controller 812 * 813 * In other case, private namespace are not required to report a unique NSID. 814 */ 815 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 816 struct nvme_ns_head *head) 817 { 818 return head->shared || 819 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 820 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 821 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 822 } 823 824 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 825 void *buf, unsigned bufflen); 826 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 827 union nvme_result *result, void *buffer, unsigned bufflen, 828 int qid, int at_head, 829 blk_mq_req_flags_t flags); 830 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 831 unsigned int dword11, void *buffer, size_t buflen, 832 u32 *result); 833 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 834 unsigned int dword11, void *buffer, size_t buflen, 835 u32 *result); 836 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 837 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 838 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 839 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 840 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 841 void nvme_queue_scan(struct nvme_ctrl *ctrl); 842 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 843 void *log, size_t size, u64 offset); 844 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 845 void nvme_put_ns_head(struct nvme_ns_head *head); 846 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 847 const struct file_operations *fops, struct module *owner); 848 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 849 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 850 unsigned int cmd, unsigned long arg); 851 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 852 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 853 unsigned int cmd, unsigned long arg); 854 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 855 unsigned long arg); 856 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 857 unsigned long arg); 858 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 859 struct io_comp_batch *iob, unsigned int poll_flags); 860 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 861 unsigned int issue_flags); 862 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 863 unsigned int issue_flags); 864 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 865 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 866 867 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 868 extern const struct pr_ops nvme_pr_ops; 869 extern const struct block_device_operations nvme_ns_head_ops; 870 extern const struct attribute_group nvme_dev_attrs_group; 871 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 872 extern const struct attribute_group *nvme_dev_attr_groups[]; 873 extern const struct block_device_operations nvme_bdev_ops; 874 875 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 876 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 877 #ifdef CONFIG_NVME_MULTIPATH 878 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 879 { 880 return ctrl->ana_log_buf != NULL; 881 } 882 883 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 884 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 885 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 886 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 887 void nvme_failover_req(struct request *req); 888 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 889 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 890 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 891 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 892 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 893 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 894 void nvme_mpath_update(struct nvme_ctrl *ctrl); 895 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 896 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 897 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 898 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 899 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 900 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 901 void nvme_mpath_start_request(struct request *rq); 902 void nvme_mpath_end_request(struct request *rq); 903 904 static inline void nvme_trace_bio_complete(struct request *req) 905 { 906 struct nvme_ns *ns = req->q->queuedata; 907 908 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 909 trace_block_bio_complete(ns->head->disk->queue, req->bio); 910 } 911 912 extern bool multipath; 913 extern struct device_attribute dev_attr_ana_grpid; 914 extern struct device_attribute dev_attr_ana_state; 915 extern struct device_attribute subsys_attr_iopolicy; 916 917 #else 918 #define multipath false 919 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 920 { 921 return false; 922 } 923 static inline void nvme_failover_req(struct request *req) 924 { 925 } 926 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 927 { 928 } 929 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 930 struct nvme_ns_head *head) 931 { 932 return 0; 933 } 934 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 935 { 936 } 937 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 938 { 939 } 940 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 941 { 942 return false; 943 } 944 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 945 { 946 } 947 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 948 { 949 } 950 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 951 { 952 } 953 static inline void nvme_trace_bio_complete(struct request *req) 954 { 955 } 956 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 957 { 958 } 959 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 960 struct nvme_id_ctrl *id) 961 { 962 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 963 dev_warn(ctrl->device, 964 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 965 return 0; 966 } 967 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 968 { 969 } 970 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 971 { 972 } 973 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 974 { 975 } 976 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 977 { 978 } 979 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 980 { 981 } 982 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 983 { 984 } 985 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 986 { 987 } 988 static inline void nvme_mpath_start_request(struct request *rq) 989 { 990 } 991 static inline void nvme_mpath_end_request(struct request *rq) 992 { 993 } 994 #endif /* CONFIG_NVME_MULTIPATH */ 995 996 int nvme_revalidate_zones(struct nvme_ns *ns); 997 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 998 unsigned int nr_zones, report_zones_cb cb, void *data); 999 #ifdef CONFIG_BLK_DEV_ZONED 1000 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 1001 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1002 struct nvme_command *cmnd, 1003 enum nvme_zone_mgmt_action action); 1004 #else 1005 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1006 struct request *req, struct nvme_command *cmnd, 1007 enum nvme_zone_mgmt_action action) 1008 { 1009 return BLK_STS_NOTSUPP; 1010 } 1011 1012 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 1013 { 1014 dev_warn(ns->ctrl->device, 1015 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 1016 return -EPROTONOSUPPORT; 1017 } 1018 #endif 1019 1020 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1021 { 1022 return dev_to_disk(dev)->private_data; 1023 } 1024 1025 #ifdef CONFIG_NVME_HWMON 1026 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1027 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1028 #else 1029 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1030 { 1031 return 0; 1032 } 1033 1034 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1035 { 1036 } 1037 #endif 1038 1039 static inline void nvme_start_request(struct request *rq) 1040 { 1041 if (rq->cmd_flags & REQ_NVME_MPATH) 1042 nvme_mpath_start_request(rq); 1043 blk_mq_start_request(rq); 1044 } 1045 1046 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1047 { 1048 return ctrl->sgls & ((1 << 0) | (1 << 1)); 1049 } 1050 1051 #ifdef CONFIG_NVME_AUTH 1052 int __init nvme_init_auth(void); 1053 void __exit nvme_exit_auth(void); 1054 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1055 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1056 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1057 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1058 void nvme_auth_free(struct nvme_ctrl *ctrl); 1059 #else 1060 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1061 { 1062 return 0; 1063 } 1064 static inline int __init nvme_init_auth(void) 1065 { 1066 return 0; 1067 } 1068 static inline void __exit nvme_exit_auth(void) 1069 { 1070 } 1071 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1072 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1073 { 1074 return -EPROTONOSUPPORT; 1075 } 1076 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1077 { 1078 return NVME_SC_AUTH_REQUIRED; 1079 } 1080 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1081 #endif 1082 1083 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1084 u8 opcode); 1085 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1086 int nvme_execute_rq(struct request *rq, bool at_head); 1087 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1088 struct nvme_command *cmd, int status); 1089 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1090 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1091 void nvme_put_ns(struct nvme_ns *ns); 1092 1093 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1094 { 1095 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1096 } 1097 1098 #ifdef CONFIG_NVME_VERBOSE_ERRORS 1099 const unsigned char *nvme_get_error_status_str(u16 status); 1100 const unsigned char *nvme_get_opcode_str(u8 opcode); 1101 const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1102 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode); 1103 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1104 static inline const unsigned char *nvme_get_error_status_str(u16 status) 1105 { 1106 return "I/O Error"; 1107 } 1108 static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1109 { 1110 return "I/O Cmd"; 1111 } 1112 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1113 { 1114 return "Admin Cmd"; 1115 } 1116 1117 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode) 1118 { 1119 return "Fabrics Cmd"; 1120 } 1121 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1122 1123 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype) 1124 { 1125 if (opcode == nvme_fabrics_command) 1126 return nvme_get_fabrics_opcode_str(fctype); 1127 return qid ? nvme_get_opcode_str(opcode) : 1128 nvme_get_admin_opcode_str(opcode); 1129 } 1130 #endif /* _NVME_H */ 1131