1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/lightnvm.h> 15 #include <linux/sed-opal.h> 16 #include <linux/fault-inject.h> 17 #include <linux/rcupdate.h> 18 #include <linux/wait.h> 19 20 #include <trace/events/block.h> 21 22 extern unsigned int nvme_io_timeout; 23 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 24 25 extern unsigned int admin_timeout; 26 #define ADMIN_TIMEOUT (admin_timeout * HZ) 27 28 #define NVME_DEFAULT_KATO 5 29 #define NVME_KATO_GRACE 10 30 31 #ifdef CONFIG_ARCH_NO_SG_CHAIN 32 #define NVME_INLINE_SG_CNT 0 33 #else 34 #define NVME_INLINE_SG_CNT 2 35 #endif 36 37 extern struct workqueue_struct *nvme_wq; 38 extern struct workqueue_struct *nvme_reset_wq; 39 extern struct workqueue_struct *nvme_delete_wq; 40 41 enum { 42 NVME_NS_LBA = 0, 43 NVME_NS_LIGHTNVM = 1, 44 }; 45 46 /* 47 * List of workarounds for devices that required behavior not specified in 48 * the standard. 49 */ 50 enum nvme_quirks { 51 /* 52 * Prefers I/O aligned to a stripe size specified in a vendor 53 * specific Identify field. 54 */ 55 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 56 57 /* 58 * The controller doesn't handle Identify value others than 0 or 1 59 * correctly. 60 */ 61 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 62 63 /* 64 * The controller deterministically returns O's on reads to 65 * logical blocks that deallocate was called on. 66 */ 67 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 68 69 /* 70 * The controller needs a delay before starts checking the device 71 * readiness, which is done by reading the NVME_CSTS_RDY bit. 72 */ 73 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 74 75 /* 76 * APST should not be used. 77 */ 78 NVME_QUIRK_NO_APST = (1 << 4), 79 80 /* 81 * The deepest sleep state should not be used. 82 */ 83 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 84 85 /* 86 * Supports the LighNVM command set if indicated in vs[1]. 87 */ 88 NVME_QUIRK_LIGHTNVM = (1 << 6), 89 90 /* 91 * Set MEDIUM priority on SQ creation 92 */ 93 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 94 95 /* 96 * Ignore device provided subnqn. 97 */ 98 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 99 100 /* 101 * Broken Write Zeroes. 102 */ 103 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 104 105 /* 106 * Force simple suspend/resume path. 107 */ 108 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 109 110 /* 111 * Use only one interrupt vector for all queues 112 */ 113 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 114 115 /* 116 * Use non-standard 128 bytes SQEs. 117 */ 118 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 119 120 /* 121 * Prevent tag overlap between queues 122 */ 123 NVME_QUIRK_SHARED_TAGS = (1 << 13), 124 125 /* 126 * Don't change the value of the temperature threshold feature 127 */ 128 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 129 }; 130 131 /* 132 * Common request structure for NVMe passthrough. All drivers must have 133 * this structure as the first member of their request-private data. 134 */ 135 struct nvme_request { 136 struct nvme_command *cmd; 137 union nvme_result result; 138 u8 retries; 139 u8 flags; 140 u16 status; 141 struct nvme_ctrl *ctrl; 142 }; 143 144 /* 145 * Mark a bio as coming in through the mpath node. 146 */ 147 #define REQ_NVME_MPATH REQ_DRV 148 149 enum { 150 NVME_REQ_CANCELLED = (1 << 0), 151 NVME_REQ_USERCMD = (1 << 1), 152 }; 153 154 static inline struct nvme_request *nvme_req(struct request *req) 155 { 156 return blk_mq_rq_to_pdu(req); 157 } 158 159 static inline u16 nvme_req_qid(struct request *req) 160 { 161 if (!req->rq_disk) 162 return 0; 163 return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 164 } 165 166 /* The below value is the specific amount of delay needed before checking 167 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 168 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 169 * found empirically. 170 */ 171 #define NVME_QUIRK_DELAY_AMOUNT 2300 172 173 enum nvme_ctrl_state { 174 NVME_CTRL_NEW, 175 NVME_CTRL_LIVE, 176 NVME_CTRL_RESETTING, 177 NVME_CTRL_CONNECTING, 178 NVME_CTRL_DELETING, 179 NVME_CTRL_DEAD, 180 }; 181 182 struct nvme_fault_inject { 183 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 184 struct fault_attr attr; 185 struct dentry *parent; 186 bool dont_retry; /* DNR, do not retry */ 187 u16 status; /* status code */ 188 #endif 189 }; 190 191 struct nvme_ctrl { 192 bool comp_seen; 193 enum nvme_ctrl_state state; 194 bool identified; 195 spinlock_t lock; 196 struct mutex scan_lock; 197 const struct nvme_ctrl_ops *ops; 198 struct request_queue *admin_q; 199 struct request_queue *connect_q; 200 struct request_queue *fabrics_q; 201 struct device *dev; 202 int instance; 203 int numa_node; 204 struct blk_mq_tag_set *tagset; 205 struct blk_mq_tag_set *admin_tagset; 206 struct list_head namespaces; 207 struct rw_semaphore namespaces_rwsem; 208 struct device ctrl_device; 209 struct device *device; /* char device */ 210 struct cdev cdev; 211 struct work_struct reset_work; 212 struct work_struct delete_work; 213 wait_queue_head_t state_wq; 214 215 struct nvme_subsystem *subsys; 216 struct list_head subsys_entry; 217 218 struct opal_dev *opal_dev; 219 220 char name[12]; 221 u16 cntlid; 222 223 u32 ctrl_config; 224 u16 mtfa; 225 u32 queue_count; 226 227 u64 cap; 228 u32 page_size; 229 u32 max_hw_sectors; 230 u32 max_segments; 231 u16 crdt[3]; 232 u16 oncs; 233 u16 oacs; 234 u16 nssa; 235 u16 nr_streams; 236 u16 sqsize; 237 u32 max_namespaces; 238 atomic_t abort_limit; 239 u8 vwc; 240 u32 vs; 241 u32 sgls; 242 u16 kas; 243 u8 npss; 244 u8 apsta; 245 u16 wctemp; 246 u16 cctemp; 247 u32 oaes; 248 u32 aen_result; 249 u32 ctratt; 250 unsigned int shutdown_timeout; 251 unsigned int kato; 252 bool subsystem; 253 unsigned long quirks; 254 struct nvme_id_power_state psd[32]; 255 struct nvme_effects_log *effects; 256 struct work_struct scan_work; 257 struct work_struct async_event_work; 258 struct delayed_work ka_work; 259 struct nvme_command ka_cmd; 260 struct work_struct fw_act_work; 261 unsigned long events; 262 263 #ifdef CONFIG_NVME_MULTIPATH 264 /* asymmetric namespace access: */ 265 u8 anacap; 266 u8 anatt; 267 u32 anagrpmax; 268 u32 nanagrpid; 269 struct mutex ana_lock; 270 struct nvme_ana_rsp_hdr *ana_log_buf; 271 size_t ana_log_size; 272 struct timer_list anatt_timer; 273 struct work_struct ana_work; 274 #endif 275 276 /* Power saving configuration */ 277 u64 ps_max_latency_us; 278 bool apst_enabled; 279 280 /* PCIe only: */ 281 u32 hmpre; 282 u32 hmmin; 283 u32 hmminds; 284 u16 hmmaxd; 285 286 /* Fabrics only */ 287 u32 ioccsz; 288 u32 iorcsz; 289 u16 icdoff; 290 u16 maxcmd; 291 int nr_reconnects; 292 struct nvmf_ctrl_options *opts; 293 294 struct page *discard_page; 295 unsigned long discard_page_busy; 296 297 struct nvme_fault_inject fault_inject; 298 }; 299 300 enum nvme_iopolicy { 301 NVME_IOPOLICY_NUMA, 302 NVME_IOPOLICY_RR, 303 }; 304 305 struct nvme_subsystem { 306 int instance; 307 struct device dev; 308 /* 309 * Because we unregister the device on the last put we need 310 * a separate refcount. 311 */ 312 struct kref ref; 313 struct list_head entry; 314 struct mutex lock; 315 struct list_head ctrls; 316 struct list_head nsheads; 317 char subnqn[NVMF_NQN_SIZE]; 318 char serial[20]; 319 char model[40]; 320 char firmware_rev[8]; 321 u8 cmic; 322 u16 vendor_id; 323 u16 awupf; /* 0's based awupf value. */ 324 struct ida ns_ida; 325 #ifdef CONFIG_NVME_MULTIPATH 326 enum nvme_iopolicy iopolicy; 327 #endif 328 }; 329 330 /* 331 * Container structure for uniqueue namespace identifiers. 332 */ 333 struct nvme_ns_ids { 334 u8 eui64[8]; 335 u8 nguid[16]; 336 uuid_t uuid; 337 }; 338 339 /* 340 * Anchor structure for namespaces. There is one for each namespace in a 341 * NVMe subsystem that any of our controllers can see, and the namespace 342 * structure for each controller is chained of it. For private namespaces 343 * there is a 1:1 relation to our namespace structures, that is ->list 344 * only ever has a single entry for private namespaces. 345 */ 346 struct nvme_ns_head { 347 struct list_head list; 348 struct srcu_struct srcu; 349 struct nvme_subsystem *subsys; 350 unsigned ns_id; 351 struct nvme_ns_ids ids; 352 struct list_head entry; 353 struct kref ref; 354 int instance; 355 #ifdef CONFIG_NVME_MULTIPATH 356 struct gendisk *disk; 357 struct bio_list requeue_list; 358 spinlock_t requeue_lock; 359 struct work_struct requeue_work; 360 struct mutex lock; 361 struct nvme_ns __rcu *current_path[]; 362 #endif 363 }; 364 365 struct nvme_ns { 366 struct list_head list; 367 368 struct nvme_ctrl *ctrl; 369 struct request_queue *queue; 370 struct gendisk *disk; 371 #ifdef CONFIG_NVME_MULTIPATH 372 enum nvme_ana_state ana_state; 373 u32 ana_grpid; 374 #endif 375 struct list_head siblings; 376 struct nvm_dev *ndev; 377 struct kref kref; 378 struct nvme_ns_head *head; 379 380 int lba_shift; 381 u16 ms; 382 u16 sgs; 383 u32 sws; 384 bool ext; 385 u8 pi_type; 386 unsigned long flags; 387 #define NVME_NS_REMOVING 0 388 #define NVME_NS_DEAD 1 389 #define NVME_NS_ANA_PENDING 2 390 u16 noiob; 391 392 struct nvme_fault_inject fault_inject; 393 394 }; 395 396 struct nvme_ctrl_ops { 397 const char *name; 398 struct module *module; 399 unsigned int flags; 400 #define NVME_F_FABRICS (1 << 0) 401 #define NVME_F_METADATA_SUPPORTED (1 << 1) 402 #define NVME_F_PCI_P2PDMA (1 << 2) 403 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 404 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 405 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 406 void (*free_ctrl)(struct nvme_ctrl *ctrl); 407 void (*submit_async_event)(struct nvme_ctrl *ctrl); 408 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 409 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 410 }; 411 412 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 413 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 414 const char *dev_name); 415 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 416 void nvme_should_fail(struct request *req); 417 #else 418 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 419 const char *dev_name) 420 { 421 } 422 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 423 { 424 } 425 static inline void nvme_should_fail(struct request *req) {} 426 #endif 427 428 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 429 { 430 if (!ctrl->subsystem) 431 return -ENOTTY; 432 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 433 } 434 435 /* 436 * Convert a 512B sector number to a device logical block number. 437 */ 438 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 439 { 440 return sector >> (ns->lba_shift - SECTOR_SHIFT); 441 } 442 443 /* 444 * Convert a device logical block number to a 512B sector number. 445 */ 446 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 447 { 448 return lba << (ns->lba_shift - SECTOR_SHIFT); 449 } 450 451 static inline void nvme_end_request(struct request *req, __le16 status, 452 union nvme_result result) 453 { 454 struct nvme_request *rq = nvme_req(req); 455 456 rq->status = le16_to_cpu(status) >> 1; 457 rq->result = result; 458 /* inject error when permitted by fault injection framework */ 459 nvme_should_fail(req); 460 blk_mq_complete_request(req); 461 } 462 463 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 464 { 465 get_device(ctrl->device); 466 } 467 468 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 469 { 470 put_device(ctrl->device); 471 } 472 473 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 474 { 475 return !qid && command_id >= NVME_AQ_BLK_MQ_DEPTH; 476 } 477 478 void nvme_complete_rq(struct request *req); 479 bool nvme_cancel_request(struct request *req, void *data, bool reserved); 480 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 481 enum nvme_ctrl_state new_state); 482 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 483 int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 484 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 485 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 486 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 487 const struct nvme_ctrl_ops *ops, unsigned long quirks); 488 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 489 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 490 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 491 void nvme_put_ctrl(struct nvme_ctrl *ctrl); 492 int nvme_init_identify(struct nvme_ctrl *ctrl); 493 494 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 495 496 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 497 bool send); 498 499 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 500 volatile union nvme_result *res); 501 502 void nvme_stop_queues(struct nvme_ctrl *ctrl); 503 void nvme_start_queues(struct nvme_ctrl *ctrl); 504 void nvme_kill_queues(struct nvme_ctrl *ctrl); 505 void nvme_sync_queues(struct nvme_ctrl *ctrl); 506 void nvme_unfreeze(struct nvme_ctrl *ctrl); 507 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 508 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 509 void nvme_start_freeze(struct nvme_ctrl *ctrl); 510 511 #define NVME_QID_ANY -1 512 struct request *nvme_alloc_request(struct request_queue *q, 513 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 514 void nvme_cleanup_cmd(struct request *req); 515 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 516 struct nvme_command *cmd); 517 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 518 void *buf, unsigned bufflen); 519 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 520 union nvme_result *result, void *buffer, unsigned bufflen, 521 unsigned timeout, int qid, int at_head, 522 blk_mq_req_flags_t flags, bool poll); 523 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 524 unsigned int dword11, void *buffer, size_t buflen, 525 u32 *result); 526 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 527 unsigned int dword11, void *buffer, size_t buflen, 528 u32 *result); 529 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 530 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 531 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 532 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 533 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 534 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 535 536 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 537 void *log, size_t size, u64 offset); 538 539 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 540 extern const struct block_device_operations nvme_ns_head_ops; 541 542 #ifdef CONFIG_NVME_MULTIPATH 543 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 544 { 545 return ctrl->ana_log_buf != NULL; 546 } 547 548 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 549 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 550 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 551 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 552 struct nvme_ctrl *ctrl, int *flags); 553 void nvme_failover_req(struct request *req); 554 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 555 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 556 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 557 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 558 int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 559 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 560 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 561 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 562 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 563 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 564 565 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 566 { 567 struct nvme_ns_head *head = ns->head; 568 569 if (head->disk && list_empty(&head->list)) 570 kblockd_schedule_work(&head->requeue_work); 571 } 572 573 static inline void nvme_trace_bio_complete(struct request *req, 574 blk_status_t status) 575 { 576 struct nvme_ns *ns = req->q->queuedata; 577 578 if (req->cmd_flags & REQ_NVME_MPATH) 579 trace_block_bio_complete(ns->head->disk->queue, 580 req->bio, status); 581 } 582 583 extern struct device_attribute dev_attr_ana_grpid; 584 extern struct device_attribute dev_attr_ana_state; 585 extern struct device_attribute subsys_attr_iopolicy; 586 587 #else 588 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 589 { 590 return false; 591 } 592 /* 593 * Without the multipath code enabled, multiple controller per subsystems are 594 * visible as devices and thus we cannot use the subsystem instance. 595 */ 596 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 597 struct nvme_ctrl *ctrl, int *flags) 598 { 599 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 600 } 601 602 static inline void nvme_failover_req(struct request *req) 603 { 604 } 605 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 606 { 607 } 608 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 609 struct nvme_ns_head *head) 610 { 611 return 0; 612 } 613 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 614 struct nvme_id_ns *id) 615 { 616 } 617 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 618 { 619 } 620 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 621 { 622 return false; 623 } 624 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 625 { 626 } 627 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 628 { 629 } 630 static inline void nvme_trace_bio_complete(struct request *req, 631 blk_status_t status) 632 { 633 } 634 static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 635 struct nvme_id_ctrl *id) 636 { 637 if (ctrl->subsys->cmic & (1 << 3)) 638 dev_warn(ctrl->device, 639 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 640 return 0; 641 } 642 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 643 { 644 } 645 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 646 { 647 } 648 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 649 { 650 } 651 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 652 { 653 } 654 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 655 { 656 } 657 #endif /* CONFIG_NVME_MULTIPATH */ 658 659 #ifdef CONFIG_NVM 660 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 661 void nvme_nvm_unregister(struct nvme_ns *ns); 662 extern const struct attribute_group nvme_nvm_attr_group; 663 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 664 #else 665 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 666 int node) 667 { 668 return 0; 669 } 670 671 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 672 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 673 unsigned long arg) 674 { 675 return -ENOTTY; 676 } 677 #endif /* CONFIG_NVM */ 678 679 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 680 { 681 return dev_to_disk(dev)->private_data; 682 } 683 684 #ifdef CONFIG_NVME_HWMON 685 void nvme_hwmon_init(struct nvme_ctrl *ctrl); 686 #else 687 static inline void nvme_hwmon_init(struct nvme_ctrl *ctrl) { } 688 #endif 689 690 #endif /* _NVME_H */ 691