1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern unsigned int nvme_io_timeout; 23 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 24 25 extern unsigned int admin_timeout; 26 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 27 28 #define NVME_DEFAULT_KATO 5 29 30 #ifdef CONFIG_ARCH_NO_SG_CHAIN 31 #define NVME_INLINE_SG_CNT 0 32 #define NVME_INLINE_METADATA_SG_CNT 0 33 #else 34 #define NVME_INLINE_SG_CNT 2 35 #define NVME_INLINE_METADATA_SG_CNT 1 36 #endif 37 38 /* 39 * Default to a 4K page size, with the intention to update this 40 * path in the future to accommodate architectures with differing 41 * kernel and IO page sizes. 42 */ 43 #define NVME_CTRL_PAGE_SHIFT 12 44 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 45 46 extern struct workqueue_struct *nvme_wq; 47 extern struct workqueue_struct *nvme_reset_wq; 48 extern struct workqueue_struct *nvme_delete_wq; 49 50 /* 51 * List of workarounds for devices that required behavior not specified in 52 * the standard. 53 */ 54 enum nvme_quirks { 55 /* 56 * Prefers I/O aligned to a stripe size specified in a vendor 57 * specific Identify field. 58 */ 59 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 60 61 /* 62 * The controller doesn't handle Identify value others than 0 or 1 63 * correctly. 64 */ 65 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 66 67 /* 68 * The controller deterministically returns O's on reads to 69 * logical blocks that deallocate was called on. 70 */ 71 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 72 73 /* 74 * The controller needs a delay before starts checking the device 75 * readiness, which is done by reading the NVME_CSTS_RDY bit. 76 */ 77 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 78 79 /* 80 * APST should not be used. 81 */ 82 NVME_QUIRK_NO_APST = (1 << 4), 83 84 /* 85 * The deepest sleep state should not be used. 86 */ 87 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 88 89 /* 90 * Set MEDIUM priority on SQ creation 91 */ 92 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 93 94 /* 95 * Ignore device provided subnqn. 96 */ 97 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 98 99 /* 100 * Broken Write Zeroes. 101 */ 102 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 103 104 /* 105 * Force simple suspend/resume path. 106 */ 107 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 108 109 /* 110 * Use only one interrupt vector for all queues 111 */ 112 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 113 114 /* 115 * Use non-standard 128 bytes SQEs. 116 */ 117 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 118 119 /* 120 * Prevent tag overlap between queues 121 */ 122 NVME_QUIRK_SHARED_TAGS = (1 << 13), 123 124 /* 125 * Don't change the value of the temperature threshold feature 126 */ 127 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 128 129 /* 130 * The controller doesn't handle the Identify Namespace 131 * Identification Descriptor list subcommand despite claiming 132 * NVMe 1.3 compliance. 133 */ 134 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 135 136 /* 137 * The controller does not properly handle DMA addresses over 138 * 48 bits. 139 */ 140 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 141 142 /* 143 * The controller requires the command_id value be be limited, so skip 144 * encoding the generation sequence number. 145 */ 146 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 147 }; 148 149 /* 150 * Common request structure for NVMe passthrough. All drivers must have 151 * this structure as the first member of their request-private data. 152 */ 153 struct nvme_request { 154 struct nvme_command *cmd; 155 union nvme_result result; 156 u8 genctr; 157 u8 retries; 158 u8 flags; 159 u16 status; 160 struct nvme_ctrl *ctrl; 161 }; 162 163 /* 164 * Mark a bio as coming in through the mpath node. 165 */ 166 #define REQ_NVME_MPATH REQ_DRV 167 168 enum { 169 NVME_REQ_CANCELLED = (1 << 0), 170 NVME_REQ_USERCMD = (1 << 1), 171 }; 172 173 static inline struct nvme_request *nvme_req(struct request *req) 174 { 175 return blk_mq_rq_to_pdu(req); 176 } 177 178 static inline u16 nvme_req_qid(struct request *req) 179 { 180 if (!req->q->queuedata) 181 return 0; 182 183 return req->mq_hctx->queue_num + 1; 184 } 185 186 /* The below value is the specific amount of delay needed before checking 187 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 188 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 189 * found empirically. 190 */ 191 #define NVME_QUIRK_DELAY_AMOUNT 2300 192 193 /* 194 * enum nvme_ctrl_state: Controller state 195 * 196 * @NVME_CTRL_NEW: New controller just allocated, initial state 197 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 198 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 199 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 200 * transport 201 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 202 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 203 * disabled/failed immediately. This state comes 204 * after all async event processing took place and 205 * before ns removal and the controller deletion 206 * progress 207 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 208 * shutdown or removal. In this case we forcibly 209 * kill all inflight I/O as they have no chance to 210 * complete 211 */ 212 enum nvme_ctrl_state { 213 NVME_CTRL_NEW, 214 NVME_CTRL_LIVE, 215 NVME_CTRL_RESETTING, 216 NVME_CTRL_CONNECTING, 217 NVME_CTRL_DELETING, 218 NVME_CTRL_DELETING_NOIO, 219 NVME_CTRL_DEAD, 220 }; 221 222 struct nvme_fault_inject { 223 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 224 struct fault_attr attr; 225 struct dentry *parent; 226 bool dont_retry; /* DNR, do not retry */ 227 u16 status; /* status code */ 228 #endif 229 }; 230 231 struct nvme_ctrl { 232 bool comp_seen; 233 enum nvme_ctrl_state state; 234 bool identified; 235 spinlock_t lock; 236 struct mutex scan_lock; 237 const struct nvme_ctrl_ops *ops; 238 struct request_queue *admin_q; 239 struct request_queue *connect_q; 240 struct request_queue *fabrics_q; 241 struct device *dev; 242 int instance; 243 int numa_node; 244 struct blk_mq_tag_set *tagset; 245 struct blk_mq_tag_set *admin_tagset; 246 struct list_head namespaces; 247 struct rw_semaphore namespaces_rwsem; 248 struct device ctrl_device; 249 struct device *device; /* char device */ 250 #ifdef CONFIG_NVME_HWMON 251 struct device *hwmon_device; 252 #endif 253 struct cdev cdev; 254 struct work_struct reset_work; 255 struct work_struct delete_work; 256 wait_queue_head_t state_wq; 257 258 struct nvme_subsystem *subsys; 259 struct list_head subsys_entry; 260 261 struct opal_dev *opal_dev; 262 263 char name[12]; 264 u16 cntlid; 265 266 u32 ctrl_config; 267 u16 mtfa; 268 u32 queue_count; 269 270 u64 cap; 271 u32 max_hw_sectors; 272 u32 max_segments; 273 u32 max_integrity_segments; 274 u32 max_discard_sectors; 275 u32 max_discard_segments; 276 u32 max_zeroes_sectors; 277 #ifdef CONFIG_BLK_DEV_ZONED 278 u32 max_zone_append; 279 #endif 280 u16 crdt[3]; 281 u16 oncs; 282 u16 oacs; 283 u16 nssa; 284 u16 nr_streams; 285 u16 sqsize; 286 u32 max_namespaces; 287 atomic_t abort_limit; 288 u8 vwc; 289 u32 vs; 290 u32 sgls; 291 u16 kas; 292 u8 npss; 293 u8 apsta; 294 u16 wctemp; 295 u16 cctemp; 296 u32 oaes; 297 u32 aen_result; 298 u32 ctratt; 299 unsigned int shutdown_timeout; 300 unsigned int kato; 301 bool subsystem; 302 unsigned long quirks; 303 struct nvme_id_power_state psd[32]; 304 struct nvme_effects_log *effects; 305 struct xarray cels; 306 struct work_struct scan_work; 307 struct work_struct async_event_work; 308 struct delayed_work ka_work; 309 struct delayed_work failfast_work; 310 struct nvme_command ka_cmd; 311 struct work_struct fw_act_work; 312 unsigned long events; 313 314 #ifdef CONFIG_NVME_MULTIPATH 315 /* asymmetric namespace access: */ 316 u8 anacap; 317 u8 anatt; 318 u32 anagrpmax; 319 u32 nanagrpid; 320 struct mutex ana_lock; 321 struct nvme_ana_rsp_hdr *ana_log_buf; 322 size_t ana_log_size; 323 struct timer_list anatt_timer; 324 struct work_struct ana_work; 325 #endif 326 327 /* Power saving configuration */ 328 u64 ps_max_latency_us; 329 bool apst_enabled; 330 331 /* PCIe only: */ 332 u32 hmpre; 333 u32 hmmin; 334 u32 hmminds; 335 u16 hmmaxd; 336 337 /* Fabrics only */ 338 u32 ioccsz; 339 u32 iorcsz; 340 u16 icdoff; 341 u16 maxcmd; 342 int nr_reconnects; 343 unsigned long flags; 344 #define NVME_CTRL_FAILFAST_EXPIRED 0 345 #define NVME_CTRL_ADMIN_Q_STOPPED 1 346 struct nvmf_ctrl_options *opts; 347 348 struct page *discard_page; 349 unsigned long discard_page_busy; 350 351 struct nvme_fault_inject fault_inject; 352 }; 353 354 enum nvme_iopolicy { 355 NVME_IOPOLICY_NUMA, 356 NVME_IOPOLICY_RR, 357 }; 358 359 struct nvme_subsystem { 360 int instance; 361 struct device dev; 362 /* 363 * Because we unregister the device on the last put we need 364 * a separate refcount. 365 */ 366 struct kref ref; 367 struct list_head entry; 368 struct mutex lock; 369 struct list_head ctrls; 370 struct list_head nsheads; 371 char subnqn[NVMF_NQN_SIZE]; 372 char serial[20]; 373 char model[40]; 374 char firmware_rev[8]; 375 u8 cmic; 376 enum nvme_subsys_type subtype; 377 u16 vendor_id; 378 u16 awupf; /* 0's based awupf value. */ 379 struct ida ns_ida; 380 #ifdef CONFIG_NVME_MULTIPATH 381 enum nvme_iopolicy iopolicy; 382 #endif 383 }; 384 385 /* 386 * Container structure for uniqueue namespace identifiers. 387 */ 388 struct nvme_ns_ids { 389 u8 eui64[8]; 390 u8 nguid[16]; 391 uuid_t uuid; 392 u8 csi; 393 }; 394 395 /* 396 * Anchor structure for namespaces. There is one for each namespace in a 397 * NVMe subsystem that any of our controllers can see, and the namespace 398 * structure for each controller is chained of it. For private namespaces 399 * there is a 1:1 relation to our namespace structures, that is ->list 400 * only ever has a single entry for private namespaces. 401 */ 402 struct nvme_ns_head { 403 struct list_head list; 404 struct srcu_struct srcu; 405 struct nvme_subsystem *subsys; 406 unsigned ns_id; 407 struct nvme_ns_ids ids; 408 struct list_head entry; 409 struct kref ref; 410 bool shared; 411 int instance; 412 struct nvme_effects_log *effects; 413 414 struct cdev cdev; 415 struct device cdev_device; 416 417 struct gendisk *disk; 418 #ifdef CONFIG_NVME_MULTIPATH 419 struct bio_list requeue_list; 420 spinlock_t requeue_lock; 421 struct work_struct requeue_work; 422 struct mutex lock; 423 unsigned long flags; 424 #define NVME_NSHEAD_DISK_LIVE 0 425 struct nvme_ns __rcu *current_path[]; 426 #endif 427 }; 428 429 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 430 { 431 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 432 } 433 434 enum nvme_ns_features { 435 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 436 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 437 }; 438 439 struct nvme_ns { 440 struct list_head list; 441 442 struct nvme_ctrl *ctrl; 443 struct request_queue *queue; 444 struct gendisk *disk; 445 #ifdef CONFIG_NVME_MULTIPATH 446 enum nvme_ana_state ana_state; 447 u32 ana_grpid; 448 #endif 449 struct list_head siblings; 450 struct kref kref; 451 struct nvme_ns_head *head; 452 453 int lba_shift; 454 u16 ms; 455 u16 sgs; 456 u32 sws; 457 u8 pi_type; 458 #ifdef CONFIG_BLK_DEV_ZONED 459 u64 zsze; 460 #endif 461 unsigned long features; 462 unsigned long flags; 463 #define NVME_NS_REMOVING 0 464 #define NVME_NS_DEAD 1 465 #define NVME_NS_ANA_PENDING 2 466 #define NVME_NS_FORCE_RO 3 467 #define NVME_NS_READY 4 468 #define NVME_NS_STOPPED 5 469 470 struct cdev cdev; 471 struct device cdev_device; 472 473 struct nvme_fault_inject fault_inject; 474 475 }; 476 477 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 478 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 479 { 480 return ns->pi_type && ns->ms == sizeof(struct t10_pi_tuple); 481 } 482 483 struct nvme_ctrl_ops { 484 const char *name; 485 struct module *module; 486 unsigned int flags; 487 #define NVME_F_FABRICS (1 << 0) 488 #define NVME_F_METADATA_SUPPORTED (1 << 1) 489 #define NVME_F_PCI_P2PDMA (1 << 2) 490 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 491 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 492 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 493 void (*free_ctrl)(struct nvme_ctrl *ctrl); 494 void (*submit_async_event)(struct nvme_ctrl *ctrl); 495 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 496 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 497 }; 498 499 /* 500 * nvme command_id is constructed as such: 501 * | xxxx | xxxxxxxxxxxx | 502 * gen request tag 503 */ 504 #define nvme_genctr_mask(gen) (gen & 0xf) 505 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 506 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 507 #define nvme_tag_from_cid(cid) (cid & 0xfff) 508 509 static inline u16 nvme_cid(struct request *rq) 510 { 511 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 512 } 513 514 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 515 u16 command_id) 516 { 517 u8 genctr = nvme_genctr_from_cid(command_id); 518 u16 tag = nvme_tag_from_cid(command_id); 519 struct request *rq; 520 521 rq = blk_mq_tag_to_rq(tags, tag); 522 if (unlikely(!rq)) { 523 pr_err("could not locate request for tag %#x\n", 524 tag); 525 return NULL; 526 } 527 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 528 dev_err(nvme_req(rq)->ctrl->device, 529 "request %#x genctr mismatch (got %#x expected %#x)\n", 530 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 531 return NULL; 532 } 533 return rq; 534 } 535 536 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 537 u16 command_id) 538 { 539 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 540 } 541 542 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 543 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 544 const char *dev_name); 545 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 546 void nvme_should_fail(struct request *req); 547 #else 548 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 549 const char *dev_name) 550 { 551 } 552 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 553 { 554 } 555 static inline void nvme_should_fail(struct request *req) {} 556 #endif 557 558 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 559 { 560 if (!ctrl->subsystem) 561 return -ENOTTY; 562 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 563 } 564 565 /* 566 * Convert a 512B sector number to a device logical block number. 567 */ 568 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 569 { 570 return sector >> (ns->lba_shift - SECTOR_SHIFT); 571 } 572 573 /* 574 * Convert a device logical block number to a 512B sector number. 575 */ 576 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 577 { 578 return lba << (ns->lba_shift - SECTOR_SHIFT); 579 } 580 581 /* 582 * Convert byte length to nvme's 0-based num dwords 583 */ 584 static inline u32 nvme_bytes_to_numd(size_t len) 585 { 586 return (len >> 2) - 1; 587 } 588 589 static inline bool nvme_is_ana_error(u16 status) 590 { 591 switch (status & 0x7ff) { 592 case NVME_SC_ANA_TRANSITION: 593 case NVME_SC_ANA_INACCESSIBLE: 594 case NVME_SC_ANA_PERSISTENT_LOSS: 595 return true; 596 default: 597 return false; 598 } 599 } 600 601 static inline bool nvme_is_path_error(u16 status) 602 { 603 /* check for a status code type of 'path related status' */ 604 return (status & 0x700) == 0x300; 605 } 606 607 /* 608 * Fill in the status and result information from the CQE, and then figure out 609 * if blk-mq will need to use IPI magic to complete the request, and if yes do 610 * so. If not let the caller complete the request without an indirect function 611 * call. 612 */ 613 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 614 union nvme_result result) 615 { 616 struct nvme_request *rq = nvme_req(req); 617 618 rq->status = le16_to_cpu(status) >> 1; 619 rq->result = result; 620 /* inject error when permitted by fault injection framework */ 621 nvme_should_fail(req); 622 if (unlikely(blk_should_fake_timeout(req->q))) 623 return true; 624 return blk_mq_complete_request_remote(req); 625 } 626 627 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 628 { 629 get_device(ctrl->device); 630 } 631 632 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 633 { 634 put_device(ctrl->device); 635 } 636 637 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 638 { 639 return !qid && 640 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 641 } 642 643 void nvme_complete_rq(struct request *req); 644 void nvme_complete_batch_req(struct request *req); 645 646 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 647 void (*fn)(struct request *rq)) 648 { 649 struct request *req; 650 651 rq_list_for_each(&iob->req_list, req) { 652 fn(req); 653 nvme_complete_batch_req(req); 654 } 655 blk_mq_end_request_batch(iob); 656 } 657 658 blk_status_t nvme_host_path_error(struct request *req); 659 bool nvme_cancel_request(struct request *req, void *data, bool reserved); 660 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 661 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 662 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 663 enum nvme_ctrl_state new_state); 664 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 665 int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 666 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 667 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 668 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 669 const struct nvme_ctrl_ops *ops, unsigned long quirks); 670 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 671 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 672 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 673 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl); 674 675 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 676 677 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 678 bool send); 679 680 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 681 volatile union nvme_result *res); 682 683 void nvme_stop_queues(struct nvme_ctrl *ctrl); 684 void nvme_start_queues(struct nvme_ctrl *ctrl); 685 void nvme_stop_admin_queue(struct nvme_ctrl *ctrl); 686 void nvme_start_admin_queue(struct nvme_ctrl *ctrl); 687 void nvme_kill_queues(struct nvme_ctrl *ctrl); 688 void nvme_sync_queues(struct nvme_ctrl *ctrl); 689 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 690 void nvme_unfreeze(struct nvme_ctrl *ctrl); 691 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 692 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 693 void nvme_start_freeze(struct nvme_ctrl *ctrl); 694 695 #define NVME_QID_ANY -1 696 struct request *nvme_alloc_request(struct request_queue *q, 697 struct nvme_command *cmd, blk_mq_req_flags_t flags); 698 void nvme_cleanup_cmd(struct request *req); 699 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 700 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 701 struct request *req); 702 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 703 bool queue_live); 704 705 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 706 bool queue_live) 707 { 708 if (likely(ctrl->state == NVME_CTRL_LIVE)) 709 return true; 710 if (ctrl->ops->flags & NVME_F_FABRICS && 711 ctrl->state == NVME_CTRL_DELETING) 712 return queue_live; 713 return __nvme_check_ready(ctrl, rq, queue_live); 714 } 715 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 716 void *buf, unsigned bufflen); 717 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 718 union nvme_result *result, void *buffer, unsigned bufflen, 719 unsigned timeout, int qid, int at_head, 720 blk_mq_req_flags_t flags); 721 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 722 unsigned int dword11, void *buffer, size_t buflen, 723 u32 *result); 724 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 725 unsigned int dword11, void *buffer, size_t buflen, 726 u32 *result); 727 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 728 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 729 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 730 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 731 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 732 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 733 void nvme_queue_scan(struct nvme_ctrl *ctrl); 734 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 735 void *log, size_t size, u64 offset); 736 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 737 void nvme_put_ns_head(struct nvme_ns_head *head); 738 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 739 const struct file_operations *fops, struct module *owner); 740 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 741 int nvme_ioctl(struct block_device *bdev, fmode_t mode, 742 unsigned int cmd, unsigned long arg); 743 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 744 int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode, 745 unsigned int cmd, unsigned long arg); 746 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 747 unsigned long arg); 748 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 749 unsigned long arg); 750 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 751 752 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 753 extern const struct pr_ops nvme_pr_ops; 754 extern const struct block_device_operations nvme_ns_head_ops; 755 756 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 757 #ifdef CONFIG_NVME_MULTIPATH 758 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 759 { 760 return ctrl->ana_log_buf != NULL; 761 } 762 763 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 764 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 765 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 766 bool nvme_mpath_set_disk_name(struct nvme_ns *ns, char *disk_name, int *flags); 767 void nvme_failover_req(struct request *req); 768 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 769 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 770 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 771 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 772 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 773 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 774 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 775 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 776 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 777 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 778 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 779 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 780 781 static inline void nvme_trace_bio_complete(struct request *req) 782 { 783 struct nvme_ns *ns = req->q->queuedata; 784 785 if (req->cmd_flags & REQ_NVME_MPATH) 786 trace_block_bio_complete(ns->head->disk->queue, req->bio); 787 } 788 789 extern struct device_attribute dev_attr_ana_grpid; 790 extern struct device_attribute dev_attr_ana_state; 791 extern struct device_attribute subsys_attr_iopolicy; 792 793 #else 794 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 795 { 796 return false; 797 } 798 static inline bool nvme_mpath_set_disk_name(struct nvme_ns *ns, char *disk_name, 799 int *flags) 800 { 801 return false; 802 } 803 static inline void nvme_failover_req(struct request *req) 804 { 805 } 806 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 807 { 808 } 809 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 810 struct nvme_ns_head *head) 811 { 812 return 0; 813 } 814 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 815 struct nvme_id_ns *id) 816 { 817 } 818 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 819 { 820 } 821 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 822 { 823 return false; 824 } 825 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 826 { 827 } 828 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 829 { 830 } 831 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 832 { 833 } 834 static inline void nvme_trace_bio_complete(struct request *req) 835 { 836 } 837 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 838 { 839 } 840 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 841 struct nvme_id_ctrl *id) 842 { 843 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 844 dev_warn(ctrl->device, 845 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 846 return 0; 847 } 848 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 849 { 850 } 851 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 852 { 853 } 854 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 855 { 856 } 857 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 858 { 859 } 860 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 861 { 862 } 863 #endif /* CONFIG_NVME_MULTIPATH */ 864 865 int nvme_revalidate_zones(struct nvme_ns *ns); 866 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 867 unsigned int nr_zones, report_zones_cb cb, void *data); 868 #ifdef CONFIG_BLK_DEV_ZONED 869 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 870 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 871 struct nvme_command *cmnd, 872 enum nvme_zone_mgmt_action action); 873 #else 874 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 875 struct request *req, struct nvme_command *cmnd, 876 enum nvme_zone_mgmt_action action) 877 { 878 return BLK_STS_NOTSUPP; 879 } 880 881 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 882 { 883 dev_warn(ns->ctrl->device, 884 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 885 return -EPROTONOSUPPORT; 886 } 887 #endif 888 889 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 890 { 891 return dev_to_disk(dev)->private_data; 892 } 893 894 #ifdef CONFIG_NVME_HWMON 895 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 896 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 897 #else 898 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 899 { 900 return 0; 901 } 902 903 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 904 { 905 } 906 #endif 907 908 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 909 { 910 return ctrl->sgls & ((1 << 0) | (1 << 1)); 911 } 912 913 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 914 u8 opcode); 915 int nvme_execute_passthru_rq(struct request *rq); 916 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 917 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 918 void nvme_put_ns(struct nvme_ns *ns); 919 920 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 921 { 922 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 923 } 924 925 #endif /* _NVME_H */ 926