1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern unsigned int nvme_io_timeout; 23 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 24 25 extern unsigned int admin_timeout; 26 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 27 28 #define NVME_DEFAULT_KATO 5 29 30 #ifdef CONFIG_ARCH_NO_SG_CHAIN 31 #define NVME_INLINE_SG_CNT 0 32 #define NVME_INLINE_METADATA_SG_CNT 0 33 #else 34 #define NVME_INLINE_SG_CNT 2 35 #define NVME_INLINE_METADATA_SG_CNT 1 36 #endif 37 38 /* 39 * Default to a 4K page size, with the intention to update this 40 * path in the future to accommodate architectures with differing 41 * kernel and IO page sizes. 42 */ 43 #define NVME_CTRL_PAGE_SHIFT 12 44 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 45 46 extern struct workqueue_struct *nvme_wq; 47 extern struct workqueue_struct *nvme_reset_wq; 48 extern struct workqueue_struct *nvme_delete_wq; 49 50 /* 51 * List of workarounds for devices that required behavior not specified in 52 * the standard. 53 */ 54 enum nvme_quirks { 55 /* 56 * Prefers I/O aligned to a stripe size specified in a vendor 57 * specific Identify field. 58 */ 59 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 60 61 /* 62 * The controller doesn't handle Identify value others than 0 or 1 63 * correctly. 64 */ 65 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 66 67 /* 68 * The controller deterministically returns O's on reads to 69 * logical blocks that deallocate was called on. 70 */ 71 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 72 73 /* 74 * The controller needs a delay before starts checking the device 75 * readiness, which is done by reading the NVME_CSTS_RDY bit. 76 */ 77 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 78 79 /* 80 * APST should not be used. 81 */ 82 NVME_QUIRK_NO_APST = (1 << 4), 83 84 /* 85 * The deepest sleep state should not be used. 86 */ 87 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 88 89 /* 90 * Set MEDIUM priority on SQ creation 91 */ 92 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 93 94 /* 95 * Ignore device provided subnqn. 96 */ 97 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 98 99 /* 100 * Broken Write Zeroes. 101 */ 102 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 103 104 /* 105 * Force simple suspend/resume path. 106 */ 107 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 108 109 /* 110 * Use only one interrupt vector for all queues 111 */ 112 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 113 114 /* 115 * Use non-standard 128 bytes SQEs. 116 */ 117 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 118 119 /* 120 * Prevent tag overlap between queues 121 */ 122 NVME_QUIRK_SHARED_TAGS = (1 << 13), 123 124 /* 125 * Don't change the value of the temperature threshold feature 126 */ 127 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 128 129 /* 130 * The controller doesn't handle the Identify Namespace 131 * Identification Descriptor list subcommand despite claiming 132 * NVMe 1.3 compliance. 133 */ 134 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 135 136 /* 137 * The controller does not properly handle DMA addresses over 138 * 48 bits. 139 */ 140 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 141 142 /* 143 * The controller requires the command_id value be limited, so skip 144 * encoding the generation sequence number. 145 */ 146 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 147 148 /* 149 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 150 */ 151 NVME_QUIRK_BOGUS_NID = (1 << 18), 152 153 /* 154 * No temperature thresholds for channels other than 0 (Composite). 155 */ 156 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 157 }; 158 159 /* 160 * Common request structure for NVMe passthrough. All drivers must have 161 * this structure as the first member of their request-private data. 162 */ 163 struct nvme_request { 164 struct nvme_command *cmd; 165 union nvme_result result; 166 u8 genctr; 167 u8 retries; 168 u8 flags; 169 u16 status; 170 #ifdef CONFIG_NVME_MULTIPATH 171 unsigned long start_time; 172 #endif 173 struct nvme_ctrl *ctrl; 174 }; 175 176 /* 177 * Mark a bio as coming in through the mpath node. 178 */ 179 #define REQ_NVME_MPATH REQ_DRV 180 181 enum { 182 NVME_REQ_CANCELLED = (1 << 0), 183 NVME_REQ_USERCMD = (1 << 1), 184 NVME_MPATH_IO_STATS = (1 << 2), 185 }; 186 187 static inline struct nvme_request *nvme_req(struct request *req) 188 { 189 return blk_mq_rq_to_pdu(req); 190 } 191 192 static inline u16 nvme_req_qid(struct request *req) 193 { 194 if (!req->q->queuedata) 195 return 0; 196 197 return req->mq_hctx->queue_num + 1; 198 } 199 200 /* The below value is the specific amount of delay needed before checking 201 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 202 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 203 * found empirically. 204 */ 205 #define NVME_QUIRK_DELAY_AMOUNT 2300 206 207 /* 208 * enum nvme_ctrl_state: Controller state 209 * 210 * @NVME_CTRL_NEW: New controller just allocated, initial state 211 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 212 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 213 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 214 * transport 215 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 216 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 217 * disabled/failed immediately. This state comes 218 * after all async event processing took place and 219 * before ns removal and the controller deletion 220 * progress 221 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 222 * shutdown or removal. In this case we forcibly 223 * kill all inflight I/O as they have no chance to 224 * complete 225 */ 226 enum nvme_ctrl_state { 227 NVME_CTRL_NEW, 228 NVME_CTRL_LIVE, 229 NVME_CTRL_RESETTING, 230 NVME_CTRL_CONNECTING, 231 NVME_CTRL_DELETING, 232 NVME_CTRL_DELETING_NOIO, 233 NVME_CTRL_DEAD, 234 }; 235 236 struct nvme_fault_inject { 237 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 238 struct fault_attr attr; 239 struct dentry *parent; 240 bool dont_retry; /* DNR, do not retry */ 241 u16 status; /* status code */ 242 #endif 243 }; 244 245 enum nvme_ctrl_flags { 246 NVME_CTRL_FAILFAST_EXPIRED = 0, 247 NVME_CTRL_ADMIN_Q_STOPPED = 1, 248 NVME_CTRL_STARTED_ONCE = 2, 249 NVME_CTRL_STOPPED = 3, 250 NVME_CTRL_SKIP_ID_CNS_CS = 4, 251 }; 252 253 struct nvme_ctrl { 254 bool comp_seen; 255 bool identified; 256 enum nvme_ctrl_state state; 257 spinlock_t lock; 258 struct mutex scan_lock; 259 const struct nvme_ctrl_ops *ops; 260 struct request_queue *admin_q; 261 struct request_queue *connect_q; 262 struct request_queue *fabrics_q; 263 struct device *dev; 264 int instance; 265 int numa_node; 266 struct blk_mq_tag_set *tagset; 267 struct blk_mq_tag_set *admin_tagset; 268 struct list_head namespaces; 269 struct rw_semaphore namespaces_rwsem; 270 struct device ctrl_device; 271 struct device *device; /* char device */ 272 #ifdef CONFIG_NVME_HWMON 273 struct device *hwmon_device; 274 #endif 275 struct cdev cdev; 276 struct work_struct reset_work; 277 struct work_struct delete_work; 278 wait_queue_head_t state_wq; 279 280 struct nvme_subsystem *subsys; 281 struct list_head subsys_entry; 282 283 struct opal_dev *opal_dev; 284 285 char name[12]; 286 u16 cntlid; 287 288 u16 mtfa; 289 u32 ctrl_config; 290 u32 queue_count; 291 292 u64 cap; 293 u32 max_hw_sectors; 294 u32 max_segments; 295 u32 max_integrity_segments; 296 u32 max_discard_sectors; 297 u32 max_discard_segments; 298 u32 max_zeroes_sectors; 299 #ifdef CONFIG_BLK_DEV_ZONED 300 u32 max_zone_append; 301 #endif 302 u16 crdt[3]; 303 u16 oncs; 304 u32 dmrsl; 305 u16 oacs; 306 u16 sqsize; 307 u32 max_namespaces; 308 atomic_t abort_limit; 309 u8 vwc; 310 u32 vs; 311 u32 sgls; 312 u16 kas; 313 u8 npss; 314 u8 apsta; 315 u16 wctemp; 316 u16 cctemp; 317 u32 oaes; 318 u32 aen_result; 319 u32 ctratt; 320 unsigned int shutdown_timeout; 321 unsigned int kato; 322 bool subsystem; 323 unsigned long quirks; 324 struct nvme_id_power_state psd[32]; 325 struct nvme_effects_log *effects; 326 struct xarray cels; 327 struct work_struct scan_work; 328 struct work_struct async_event_work; 329 struct delayed_work ka_work; 330 struct delayed_work failfast_work; 331 struct nvme_command ka_cmd; 332 unsigned long ka_last_check_time; 333 struct work_struct fw_act_work; 334 unsigned long events; 335 336 #ifdef CONFIG_NVME_MULTIPATH 337 /* asymmetric namespace access: */ 338 u8 anacap; 339 u8 anatt; 340 u32 anagrpmax; 341 u32 nanagrpid; 342 struct mutex ana_lock; 343 struct nvme_ana_rsp_hdr *ana_log_buf; 344 size_t ana_log_size; 345 struct timer_list anatt_timer; 346 struct work_struct ana_work; 347 #endif 348 349 #ifdef CONFIG_NVME_AUTH 350 struct work_struct dhchap_auth_work; 351 struct mutex dhchap_auth_mutex; 352 struct nvme_dhchap_queue_context *dhchap_ctxs; 353 struct nvme_dhchap_key *host_key; 354 struct nvme_dhchap_key *ctrl_key; 355 u16 transaction; 356 #endif 357 358 /* Power saving configuration */ 359 u64 ps_max_latency_us; 360 bool apst_enabled; 361 362 /* PCIe only: */ 363 u16 hmmaxd; 364 u32 hmpre; 365 u32 hmmin; 366 u32 hmminds; 367 368 /* Fabrics only */ 369 u32 ioccsz; 370 u32 iorcsz; 371 u16 icdoff; 372 u16 maxcmd; 373 int nr_reconnects; 374 unsigned long flags; 375 struct nvmf_ctrl_options *opts; 376 377 struct page *discard_page; 378 unsigned long discard_page_busy; 379 380 struct nvme_fault_inject fault_inject; 381 382 enum nvme_ctrl_type cntrltype; 383 enum nvme_dctype dctype; 384 }; 385 386 enum nvme_iopolicy { 387 NVME_IOPOLICY_NUMA, 388 NVME_IOPOLICY_RR, 389 }; 390 391 struct nvme_subsystem { 392 int instance; 393 struct device dev; 394 /* 395 * Because we unregister the device on the last put we need 396 * a separate refcount. 397 */ 398 struct kref ref; 399 struct list_head entry; 400 struct mutex lock; 401 struct list_head ctrls; 402 struct list_head nsheads; 403 char subnqn[NVMF_NQN_SIZE]; 404 char serial[20]; 405 char model[40]; 406 char firmware_rev[8]; 407 u8 cmic; 408 enum nvme_subsys_type subtype; 409 u16 vendor_id; 410 u16 awupf; /* 0's based awupf value. */ 411 struct ida ns_ida; 412 #ifdef CONFIG_NVME_MULTIPATH 413 enum nvme_iopolicy iopolicy; 414 #endif 415 }; 416 417 /* 418 * Container structure for uniqueue namespace identifiers. 419 */ 420 struct nvme_ns_ids { 421 u8 eui64[8]; 422 u8 nguid[16]; 423 uuid_t uuid; 424 u8 csi; 425 }; 426 427 /* 428 * Anchor structure for namespaces. There is one for each namespace in a 429 * NVMe subsystem that any of our controllers can see, and the namespace 430 * structure for each controller is chained of it. For private namespaces 431 * there is a 1:1 relation to our namespace structures, that is ->list 432 * only ever has a single entry for private namespaces. 433 */ 434 struct nvme_ns_head { 435 struct list_head list; 436 struct srcu_struct srcu; 437 struct nvme_subsystem *subsys; 438 unsigned ns_id; 439 struct nvme_ns_ids ids; 440 struct list_head entry; 441 struct kref ref; 442 bool shared; 443 int instance; 444 struct nvme_effects_log *effects; 445 446 struct cdev cdev; 447 struct device cdev_device; 448 449 struct gendisk *disk; 450 #ifdef CONFIG_NVME_MULTIPATH 451 struct bio_list requeue_list; 452 spinlock_t requeue_lock; 453 struct work_struct requeue_work; 454 struct mutex lock; 455 unsigned long flags; 456 #define NVME_NSHEAD_DISK_LIVE 0 457 struct nvme_ns __rcu *current_path[]; 458 #endif 459 }; 460 461 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 462 { 463 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 464 } 465 466 enum nvme_ns_features { 467 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 468 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 469 NVME_NS_DEAC, /* DEAC bit in Write Zeores supported */ 470 }; 471 472 struct nvme_ns { 473 struct list_head list; 474 475 struct nvme_ctrl *ctrl; 476 struct request_queue *queue; 477 struct gendisk *disk; 478 #ifdef CONFIG_NVME_MULTIPATH 479 enum nvme_ana_state ana_state; 480 u32 ana_grpid; 481 #endif 482 struct list_head siblings; 483 struct kref kref; 484 struct nvme_ns_head *head; 485 486 int lba_shift; 487 u16 ms; 488 u16 pi_size; 489 u16 sgs; 490 u32 sws; 491 u8 pi_type; 492 u8 guard_type; 493 #ifdef CONFIG_BLK_DEV_ZONED 494 u64 zsze; 495 #endif 496 unsigned long features; 497 unsigned long flags; 498 #define NVME_NS_REMOVING 0 499 #define NVME_NS_ANA_PENDING 2 500 #define NVME_NS_FORCE_RO 3 501 #define NVME_NS_READY 4 502 503 struct cdev cdev; 504 struct device cdev_device; 505 506 struct nvme_fault_inject fault_inject; 507 508 }; 509 510 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 511 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 512 { 513 return ns->pi_type && ns->ms == ns->pi_size; 514 } 515 516 struct nvme_ctrl_ops { 517 const char *name; 518 struct module *module; 519 unsigned int flags; 520 #define NVME_F_FABRICS (1 << 0) 521 #define NVME_F_METADATA_SUPPORTED (1 << 1) 522 #define NVME_F_BLOCKING (1 << 2) 523 524 const struct attribute_group **dev_attr_groups; 525 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 526 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 527 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 528 void (*free_ctrl)(struct nvme_ctrl *ctrl); 529 void (*submit_async_event)(struct nvme_ctrl *ctrl); 530 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 531 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 532 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 533 void (*print_device_info)(struct nvme_ctrl *ctrl); 534 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 535 }; 536 537 /* 538 * nvme command_id is constructed as such: 539 * | xxxx | xxxxxxxxxxxx | 540 * gen request tag 541 */ 542 #define nvme_genctr_mask(gen) (gen & 0xf) 543 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 544 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 545 #define nvme_tag_from_cid(cid) (cid & 0xfff) 546 547 static inline u16 nvme_cid(struct request *rq) 548 { 549 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 550 } 551 552 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 553 u16 command_id) 554 { 555 u8 genctr = nvme_genctr_from_cid(command_id); 556 u16 tag = nvme_tag_from_cid(command_id); 557 struct request *rq; 558 559 rq = blk_mq_tag_to_rq(tags, tag); 560 if (unlikely(!rq)) { 561 pr_err("could not locate request for tag %#x\n", 562 tag); 563 return NULL; 564 } 565 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 566 dev_err(nvme_req(rq)->ctrl->device, 567 "request %#x genctr mismatch (got %#x expected %#x)\n", 568 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 569 return NULL; 570 } 571 return rq; 572 } 573 574 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 575 u16 command_id) 576 { 577 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 578 } 579 580 /* 581 * Return the length of the string without the space padding 582 */ 583 static inline int nvme_strlen(char *s, int len) 584 { 585 while (s[len - 1] == ' ') 586 len--; 587 return len; 588 } 589 590 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 591 { 592 struct nvme_subsystem *subsys = ctrl->subsys; 593 594 if (ctrl->ops->print_device_info) { 595 ctrl->ops->print_device_info(ctrl); 596 return; 597 } 598 599 dev_err(ctrl->device, 600 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 601 nvme_strlen(subsys->model, sizeof(subsys->model)), 602 subsys->model, nvme_strlen(subsys->firmware_rev, 603 sizeof(subsys->firmware_rev)), 604 subsys->firmware_rev); 605 } 606 607 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 608 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 609 const char *dev_name); 610 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 611 void nvme_should_fail(struct request *req); 612 #else 613 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 614 const char *dev_name) 615 { 616 } 617 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 618 { 619 } 620 static inline void nvme_should_fail(struct request *req) {} 621 #endif 622 623 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 624 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 625 626 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 627 { 628 int ret; 629 630 if (!ctrl->subsystem) 631 return -ENOTTY; 632 if (!nvme_wait_reset(ctrl)) 633 return -EBUSY; 634 635 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 636 if (ret) 637 return ret; 638 639 return nvme_try_sched_reset(ctrl); 640 } 641 642 /* 643 * Convert a 512B sector number to a device logical block number. 644 */ 645 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 646 { 647 return sector >> (ns->lba_shift - SECTOR_SHIFT); 648 } 649 650 /* 651 * Convert a device logical block number to a 512B sector number. 652 */ 653 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 654 { 655 return lba << (ns->lba_shift - SECTOR_SHIFT); 656 } 657 658 /* 659 * Convert byte length to nvme's 0-based num dwords 660 */ 661 static inline u32 nvme_bytes_to_numd(size_t len) 662 { 663 return (len >> 2) - 1; 664 } 665 666 static inline bool nvme_is_ana_error(u16 status) 667 { 668 switch (status & 0x7ff) { 669 case NVME_SC_ANA_TRANSITION: 670 case NVME_SC_ANA_INACCESSIBLE: 671 case NVME_SC_ANA_PERSISTENT_LOSS: 672 return true; 673 default: 674 return false; 675 } 676 } 677 678 static inline bool nvme_is_path_error(u16 status) 679 { 680 /* check for a status code type of 'path related status' */ 681 return (status & 0x700) == 0x300; 682 } 683 684 /* 685 * Fill in the status and result information from the CQE, and then figure out 686 * if blk-mq will need to use IPI magic to complete the request, and if yes do 687 * so. If not let the caller complete the request without an indirect function 688 * call. 689 */ 690 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 691 union nvme_result result) 692 { 693 struct nvme_request *rq = nvme_req(req); 694 struct nvme_ctrl *ctrl = rq->ctrl; 695 696 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 697 rq->genctr++; 698 699 rq->status = le16_to_cpu(status) >> 1; 700 rq->result = result; 701 /* inject error when permitted by fault injection framework */ 702 nvme_should_fail(req); 703 if (unlikely(blk_should_fake_timeout(req->q))) 704 return true; 705 return blk_mq_complete_request_remote(req); 706 } 707 708 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 709 { 710 get_device(ctrl->device); 711 } 712 713 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 714 { 715 put_device(ctrl->device); 716 } 717 718 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 719 { 720 return !qid && 721 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 722 } 723 724 void nvme_complete_rq(struct request *req); 725 void nvme_complete_batch_req(struct request *req); 726 727 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 728 void (*fn)(struct request *rq)) 729 { 730 struct request *req; 731 732 rq_list_for_each(&iob->req_list, req) { 733 fn(req); 734 nvme_complete_batch_req(req); 735 } 736 blk_mq_end_request_batch(iob); 737 } 738 739 blk_status_t nvme_host_path_error(struct request *req); 740 bool nvme_cancel_request(struct request *req, void *data); 741 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 742 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 743 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 744 enum nvme_ctrl_state new_state); 745 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 746 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 747 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 748 const struct nvme_ctrl_ops *ops, unsigned long quirks); 749 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 750 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 751 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 752 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 753 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 754 const struct blk_mq_ops *ops, unsigned int cmd_size); 755 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 756 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 757 const struct blk_mq_ops *ops, unsigned int nr_maps, 758 unsigned int cmd_size); 759 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 760 761 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 762 763 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 764 volatile union nvme_result *res); 765 766 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 767 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 768 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 769 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 770 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 771 void nvme_sync_queues(struct nvme_ctrl *ctrl); 772 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 773 void nvme_unfreeze(struct nvme_ctrl *ctrl); 774 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 775 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 776 void nvme_start_freeze(struct nvme_ctrl *ctrl); 777 778 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 779 { 780 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 781 } 782 783 #define NVME_QID_ANY -1 784 void nvme_init_request(struct request *req, struct nvme_command *cmd); 785 void nvme_cleanup_cmd(struct request *req); 786 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 787 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 788 struct request *req); 789 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 790 bool queue_live); 791 792 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 793 bool queue_live) 794 { 795 if (likely(ctrl->state == NVME_CTRL_LIVE)) 796 return true; 797 if (ctrl->ops->flags & NVME_F_FABRICS && 798 ctrl->state == NVME_CTRL_DELETING) 799 return queue_live; 800 return __nvme_check_ready(ctrl, rq, queue_live); 801 } 802 803 /* 804 * NSID shall be unique for all shared namespaces, or if at least one of the 805 * following conditions is met: 806 * 1. Namespace Management is supported by the controller 807 * 2. ANA is supported by the controller 808 * 3. NVM Set are supported by the controller 809 * 810 * In other case, private namespace are not required to report a unique NSID. 811 */ 812 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 813 struct nvme_ns_head *head) 814 { 815 return head->shared || 816 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 817 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 818 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 819 } 820 821 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 822 void *buf, unsigned bufflen); 823 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 824 union nvme_result *result, void *buffer, unsigned bufflen, 825 int qid, int at_head, 826 blk_mq_req_flags_t flags); 827 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 828 unsigned int dword11, void *buffer, size_t buflen, 829 u32 *result); 830 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 831 unsigned int dword11, void *buffer, size_t buflen, 832 u32 *result); 833 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 834 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 835 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 836 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 837 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 838 void nvme_queue_scan(struct nvme_ctrl *ctrl); 839 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 840 void *log, size_t size, u64 offset); 841 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 842 void nvme_put_ns_head(struct nvme_ns_head *head); 843 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 844 const struct file_operations *fops, struct module *owner); 845 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 846 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 847 unsigned int cmd, unsigned long arg); 848 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 849 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 850 unsigned int cmd, unsigned long arg); 851 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 852 unsigned long arg); 853 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 854 unsigned long arg); 855 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 856 struct io_comp_batch *iob, unsigned int poll_flags); 857 int nvme_ns_head_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 858 struct io_comp_batch *iob, unsigned int poll_flags); 859 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 860 unsigned int issue_flags); 861 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 862 unsigned int issue_flags); 863 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 864 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 865 866 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 867 extern const struct pr_ops nvme_pr_ops; 868 extern const struct block_device_operations nvme_ns_head_ops; 869 extern const struct attribute_group nvme_dev_attrs_group; 870 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 871 extern const struct attribute_group *nvme_dev_attr_groups[]; 872 extern const struct block_device_operations nvme_bdev_ops; 873 874 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 875 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 876 #ifdef CONFIG_NVME_MULTIPATH 877 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 878 { 879 return ctrl->ana_log_buf != NULL; 880 } 881 882 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 883 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 884 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 885 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 886 void nvme_failover_req(struct request *req); 887 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 888 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 889 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 890 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 891 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 892 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 893 void nvme_mpath_update(struct nvme_ctrl *ctrl); 894 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 895 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 896 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 897 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 898 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 899 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 900 void nvme_mpath_start_request(struct request *rq); 901 void nvme_mpath_end_request(struct request *rq); 902 903 static inline void nvme_trace_bio_complete(struct request *req) 904 { 905 struct nvme_ns *ns = req->q->queuedata; 906 907 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 908 trace_block_bio_complete(ns->head->disk->queue, req->bio); 909 } 910 911 extern bool multipath; 912 extern struct device_attribute dev_attr_ana_grpid; 913 extern struct device_attribute dev_attr_ana_state; 914 extern struct device_attribute subsys_attr_iopolicy; 915 916 #else 917 #define multipath false 918 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 919 { 920 return false; 921 } 922 static inline void nvme_failover_req(struct request *req) 923 { 924 } 925 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 926 { 927 } 928 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 929 struct nvme_ns_head *head) 930 { 931 return 0; 932 } 933 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 934 { 935 } 936 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 937 { 938 } 939 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 940 { 941 return false; 942 } 943 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 944 { 945 } 946 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 947 { 948 } 949 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 950 { 951 } 952 static inline void nvme_trace_bio_complete(struct request *req) 953 { 954 } 955 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 956 { 957 } 958 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 959 struct nvme_id_ctrl *id) 960 { 961 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 962 dev_warn(ctrl->device, 963 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 964 return 0; 965 } 966 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 967 { 968 } 969 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 970 { 971 } 972 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 973 { 974 } 975 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 976 { 977 } 978 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 979 { 980 } 981 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 982 { 983 } 984 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 985 { 986 } 987 static inline void nvme_mpath_start_request(struct request *rq) 988 { 989 } 990 static inline void nvme_mpath_end_request(struct request *rq) 991 { 992 } 993 #endif /* CONFIG_NVME_MULTIPATH */ 994 995 int nvme_revalidate_zones(struct nvme_ns *ns); 996 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 997 unsigned int nr_zones, report_zones_cb cb, void *data); 998 #ifdef CONFIG_BLK_DEV_ZONED 999 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 1000 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1001 struct nvme_command *cmnd, 1002 enum nvme_zone_mgmt_action action); 1003 #else 1004 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1005 struct request *req, struct nvme_command *cmnd, 1006 enum nvme_zone_mgmt_action action) 1007 { 1008 return BLK_STS_NOTSUPP; 1009 } 1010 1011 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 1012 { 1013 dev_warn(ns->ctrl->device, 1014 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 1015 return -EPROTONOSUPPORT; 1016 } 1017 #endif 1018 1019 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1020 { 1021 return dev_to_disk(dev)->private_data; 1022 } 1023 1024 #ifdef CONFIG_NVME_HWMON 1025 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1026 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1027 #else 1028 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1029 { 1030 return 0; 1031 } 1032 1033 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1034 { 1035 } 1036 #endif 1037 1038 static inline void nvme_start_request(struct request *rq) 1039 { 1040 if (rq->cmd_flags & REQ_NVME_MPATH) 1041 nvme_mpath_start_request(rq); 1042 blk_mq_start_request(rq); 1043 } 1044 1045 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1046 { 1047 return ctrl->sgls & ((1 << 0) | (1 << 1)); 1048 } 1049 1050 #ifdef CONFIG_NVME_AUTH 1051 int __init nvme_init_auth(void); 1052 void __exit nvme_exit_auth(void); 1053 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1054 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1055 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1056 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1057 void nvme_auth_free(struct nvme_ctrl *ctrl); 1058 #else 1059 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1060 { 1061 return 0; 1062 } 1063 static inline int __init nvme_init_auth(void) 1064 { 1065 return 0; 1066 } 1067 static inline void __exit nvme_exit_auth(void) 1068 { 1069 } 1070 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1071 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1072 { 1073 return -EPROTONOSUPPORT; 1074 } 1075 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1076 { 1077 return NVME_SC_AUTH_REQUIRED; 1078 } 1079 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1080 #endif 1081 1082 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1083 u8 opcode); 1084 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1085 int nvme_execute_rq(struct request *rq, bool at_head); 1086 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1087 struct nvme_command *cmd, int status); 1088 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1089 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1090 void nvme_put_ns(struct nvme_ns *ns); 1091 1092 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1093 { 1094 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1095 } 1096 1097 #ifdef CONFIG_NVME_VERBOSE_ERRORS 1098 const unsigned char *nvme_get_error_status_str(u16 status); 1099 const unsigned char *nvme_get_opcode_str(u8 opcode); 1100 const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1101 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode); 1102 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1103 static inline const unsigned char *nvme_get_error_status_str(u16 status) 1104 { 1105 return "I/O Error"; 1106 } 1107 static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1108 { 1109 return "I/O Cmd"; 1110 } 1111 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1112 { 1113 return "Admin Cmd"; 1114 } 1115 1116 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode) 1117 { 1118 return "Fabrics Cmd"; 1119 } 1120 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1121 1122 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype) 1123 { 1124 if (opcode == nvme_fabrics_command) 1125 return nvme_get_fabrics_opcode_str(fctype); 1126 return qid ? nvme_get_opcode_str(opcode) : 1127 nvme_get_admin_opcode_str(opcode); 1128 } 1129 #endif /* _NVME_H */ 1130