1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern unsigned int nvme_io_timeout; 23 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 24 25 extern unsigned int admin_timeout; 26 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 27 28 #define NVME_DEFAULT_KATO 5 29 30 #ifdef CONFIG_ARCH_NO_SG_CHAIN 31 #define NVME_INLINE_SG_CNT 0 32 #define NVME_INLINE_METADATA_SG_CNT 0 33 #else 34 #define NVME_INLINE_SG_CNT 2 35 #define NVME_INLINE_METADATA_SG_CNT 1 36 #endif 37 38 /* 39 * Default to a 4K page size, with the intention to update this 40 * path in the future to accommodate architectures with differing 41 * kernel and IO page sizes. 42 */ 43 #define NVME_CTRL_PAGE_SHIFT 12 44 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 45 46 extern struct workqueue_struct *nvme_wq; 47 extern struct workqueue_struct *nvme_reset_wq; 48 extern struct workqueue_struct *nvme_delete_wq; 49 50 /* 51 * List of workarounds for devices that required behavior not specified in 52 * the standard. 53 */ 54 enum nvme_quirks { 55 /* 56 * Prefers I/O aligned to a stripe size specified in a vendor 57 * specific Identify field. 58 */ 59 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 60 61 /* 62 * The controller doesn't handle Identify value others than 0 or 1 63 * correctly. 64 */ 65 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 66 67 /* 68 * The controller deterministically returns O's on reads to 69 * logical blocks that deallocate was called on. 70 */ 71 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 72 73 /* 74 * The controller needs a delay before starts checking the device 75 * readiness, which is done by reading the NVME_CSTS_RDY bit. 76 */ 77 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 78 79 /* 80 * APST should not be used. 81 */ 82 NVME_QUIRK_NO_APST = (1 << 4), 83 84 /* 85 * The deepest sleep state should not be used. 86 */ 87 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 88 89 /* 90 * Set MEDIUM priority on SQ creation 91 */ 92 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 93 94 /* 95 * Ignore device provided subnqn. 96 */ 97 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 98 99 /* 100 * Broken Write Zeroes. 101 */ 102 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 103 104 /* 105 * Force simple suspend/resume path. 106 */ 107 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 108 109 /* 110 * Use only one interrupt vector for all queues 111 */ 112 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 113 114 /* 115 * Use non-standard 128 bytes SQEs. 116 */ 117 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 118 119 /* 120 * Prevent tag overlap between queues 121 */ 122 NVME_QUIRK_SHARED_TAGS = (1 << 13), 123 124 /* 125 * Don't change the value of the temperature threshold feature 126 */ 127 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 128 129 /* 130 * The controller doesn't handle the Identify Namespace 131 * Identification Descriptor list subcommand despite claiming 132 * NVMe 1.3 compliance. 133 */ 134 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 135 136 /* 137 * The controller does not properly handle DMA addresses over 138 * 48 bits. 139 */ 140 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 141 142 /* 143 * The controller requires the command_id value be be limited, so skip 144 * encoding the generation sequence number. 145 */ 146 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 147 148 /* 149 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 150 */ 151 NVME_QUIRK_BOGUS_NID = (1 << 18), 152 }; 153 154 /* 155 * Common request structure for NVMe passthrough. All drivers must have 156 * this structure as the first member of their request-private data. 157 */ 158 struct nvme_request { 159 struct nvme_command *cmd; 160 union nvme_result result; 161 u8 genctr; 162 u8 retries; 163 u8 flags; 164 u16 status; 165 struct nvme_ctrl *ctrl; 166 }; 167 168 /* 169 * Mark a bio as coming in through the mpath node. 170 */ 171 #define REQ_NVME_MPATH REQ_DRV 172 173 enum { 174 NVME_REQ_CANCELLED = (1 << 0), 175 NVME_REQ_USERCMD = (1 << 1), 176 }; 177 178 static inline struct nvme_request *nvme_req(struct request *req) 179 { 180 return blk_mq_rq_to_pdu(req); 181 } 182 183 static inline u16 nvme_req_qid(struct request *req) 184 { 185 if (!req->q->queuedata) 186 return 0; 187 188 return req->mq_hctx->queue_num + 1; 189 } 190 191 /* The below value is the specific amount of delay needed before checking 192 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 193 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 194 * found empirically. 195 */ 196 #define NVME_QUIRK_DELAY_AMOUNT 2300 197 198 /* 199 * enum nvme_ctrl_state: Controller state 200 * 201 * @NVME_CTRL_NEW: New controller just allocated, initial state 202 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 203 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 204 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 205 * transport 206 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 207 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 208 * disabled/failed immediately. This state comes 209 * after all async event processing took place and 210 * before ns removal and the controller deletion 211 * progress 212 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 213 * shutdown or removal. In this case we forcibly 214 * kill all inflight I/O as they have no chance to 215 * complete 216 */ 217 enum nvme_ctrl_state { 218 NVME_CTRL_NEW, 219 NVME_CTRL_LIVE, 220 NVME_CTRL_RESETTING, 221 NVME_CTRL_CONNECTING, 222 NVME_CTRL_DELETING, 223 NVME_CTRL_DELETING_NOIO, 224 NVME_CTRL_DEAD, 225 }; 226 227 struct nvme_fault_inject { 228 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 229 struct fault_attr attr; 230 struct dentry *parent; 231 bool dont_retry; /* DNR, do not retry */ 232 u16 status; /* status code */ 233 #endif 234 }; 235 236 struct nvme_ctrl { 237 bool comp_seen; 238 enum nvme_ctrl_state state; 239 bool identified; 240 spinlock_t lock; 241 struct mutex scan_lock; 242 const struct nvme_ctrl_ops *ops; 243 struct request_queue *admin_q; 244 struct request_queue *connect_q; 245 struct request_queue *fabrics_q; 246 struct device *dev; 247 int instance; 248 int numa_node; 249 struct blk_mq_tag_set *tagset; 250 struct blk_mq_tag_set *admin_tagset; 251 struct list_head namespaces; 252 struct rw_semaphore namespaces_rwsem; 253 struct device ctrl_device; 254 struct device *device; /* char device */ 255 #ifdef CONFIG_NVME_HWMON 256 struct device *hwmon_device; 257 #endif 258 struct cdev cdev; 259 struct work_struct reset_work; 260 struct work_struct delete_work; 261 wait_queue_head_t state_wq; 262 263 struct nvme_subsystem *subsys; 264 struct list_head subsys_entry; 265 266 struct opal_dev *opal_dev; 267 268 char name[12]; 269 u16 cntlid; 270 271 u32 ctrl_config; 272 u16 mtfa; 273 u32 queue_count; 274 275 u64 cap; 276 u32 max_hw_sectors; 277 u32 max_segments; 278 u32 max_integrity_segments; 279 u32 max_discard_sectors; 280 u32 max_discard_segments; 281 u32 max_zeroes_sectors; 282 #ifdef CONFIG_BLK_DEV_ZONED 283 u32 max_zone_append; 284 #endif 285 u16 crdt[3]; 286 u16 oncs; 287 u32 dmrsl; 288 u16 oacs; 289 u16 sqsize; 290 u32 max_namespaces; 291 atomic_t abort_limit; 292 u8 vwc; 293 u32 vs; 294 u32 sgls; 295 u16 kas; 296 u8 npss; 297 u8 apsta; 298 u16 wctemp; 299 u16 cctemp; 300 u32 oaes; 301 u32 aen_result; 302 u32 ctratt; 303 unsigned int shutdown_timeout; 304 unsigned int kato; 305 bool subsystem; 306 unsigned long quirks; 307 struct nvme_id_power_state psd[32]; 308 struct nvme_effects_log *effects; 309 struct xarray cels; 310 struct work_struct scan_work; 311 struct work_struct async_event_work; 312 struct delayed_work ka_work; 313 struct delayed_work failfast_work; 314 struct nvme_command ka_cmd; 315 struct work_struct fw_act_work; 316 unsigned long events; 317 318 #ifdef CONFIG_NVME_MULTIPATH 319 /* asymmetric namespace access: */ 320 u8 anacap; 321 u8 anatt; 322 u32 anagrpmax; 323 u32 nanagrpid; 324 struct mutex ana_lock; 325 struct nvme_ana_rsp_hdr *ana_log_buf; 326 size_t ana_log_size; 327 struct timer_list anatt_timer; 328 struct work_struct ana_work; 329 #endif 330 331 /* Power saving configuration */ 332 u64 ps_max_latency_us; 333 bool apst_enabled; 334 335 /* PCIe only: */ 336 u32 hmpre; 337 u32 hmmin; 338 u32 hmminds; 339 u16 hmmaxd; 340 341 /* Fabrics only */ 342 u32 ioccsz; 343 u32 iorcsz; 344 u16 icdoff; 345 u16 maxcmd; 346 int nr_reconnects; 347 unsigned long flags; 348 #define NVME_CTRL_FAILFAST_EXPIRED 0 349 #define NVME_CTRL_ADMIN_Q_STOPPED 1 350 struct nvmf_ctrl_options *opts; 351 352 struct page *discard_page; 353 unsigned long discard_page_busy; 354 355 struct nvme_fault_inject fault_inject; 356 357 enum nvme_ctrl_type cntrltype; 358 enum nvme_dctype dctype; 359 }; 360 361 enum nvme_iopolicy { 362 NVME_IOPOLICY_NUMA, 363 NVME_IOPOLICY_RR, 364 }; 365 366 struct nvme_subsystem { 367 int instance; 368 struct device dev; 369 /* 370 * Because we unregister the device on the last put we need 371 * a separate refcount. 372 */ 373 struct kref ref; 374 struct list_head entry; 375 struct mutex lock; 376 struct list_head ctrls; 377 struct list_head nsheads; 378 char subnqn[NVMF_NQN_SIZE]; 379 char serial[20]; 380 char model[40]; 381 char firmware_rev[8]; 382 u8 cmic; 383 enum nvme_subsys_type subtype; 384 u16 vendor_id; 385 u16 awupf; /* 0's based awupf value. */ 386 struct ida ns_ida; 387 #ifdef CONFIG_NVME_MULTIPATH 388 enum nvme_iopolicy iopolicy; 389 #endif 390 }; 391 392 /* 393 * Container structure for uniqueue namespace identifiers. 394 */ 395 struct nvme_ns_ids { 396 u8 eui64[8]; 397 u8 nguid[16]; 398 uuid_t uuid; 399 u8 csi; 400 }; 401 402 /* 403 * Anchor structure for namespaces. There is one for each namespace in a 404 * NVMe subsystem that any of our controllers can see, and the namespace 405 * structure for each controller is chained of it. For private namespaces 406 * there is a 1:1 relation to our namespace structures, that is ->list 407 * only ever has a single entry for private namespaces. 408 */ 409 struct nvme_ns_head { 410 struct list_head list; 411 struct srcu_struct srcu; 412 struct nvme_subsystem *subsys; 413 unsigned ns_id; 414 struct nvme_ns_ids ids; 415 struct list_head entry; 416 struct kref ref; 417 bool shared; 418 int instance; 419 struct nvme_effects_log *effects; 420 421 struct cdev cdev; 422 struct device cdev_device; 423 424 struct gendisk *disk; 425 #ifdef CONFIG_NVME_MULTIPATH 426 struct bio_list requeue_list; 427 spinlock_t requeue_lock; 428 struct work_struct requeue_work; 429 struct mutex lock; 430 unsigned long flags; 431 #define NVME_NSHEAD_DISK_LIVE 0 432 struct nvme_ns __rcu *current_path[]; 433 #endif 434 }; 435 436 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 437 { 438 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 439 } 440 441 enum nvme_ns_features { 442 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 443 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 444 }; 445 446 struct nvme_ns { 447 struct list_head list; 448 449 struct nvme_ctrl *ctrl; 450 struct request_queue *queue; 451 struct gendisk *disk; 452 #ifdef CONFIG_NVME_MULTIPATH 453 enum nvme_ana_state ana_state; 454 u32 ana_grpid; 455 #endif 456 struct list_head siblings; 457 struct kref kref; 458 struct nvme_ns_head *head; 459 460 int lba_shift; 461 u16 ms; 462 u16 pi_size; 463 u16 sgs; 464 u32 sws; 465 u8 pi_type; 466 u8 guard_type; 467 #ifdef CONFIG_BLK_DEV_ZONED 468 u64 zsze; 469 #endif 470 unsigned long features; 471 unsigned long flags; 472 #define NVME_NS_REMOVING 0 473 #define NVME_NS_DEAD 1 474 #define NVME_NS_ANA_PENDING 2 475 #define NVME_NS_FORCE_RO 3 476 #define NVME_NS_READY 4 477 #define NVME_NS_STOPPED 5 478 479 struct cdev cdev; 480 struct device cdev_device; 481 482 struct nvme_fault_inject fault_inject; 483 484 }; 485 486 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 487 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 488 { 489 return ns->pi_type && ns->ms == ns->pi_size; 490 } 491 492 struct nvme_ctrl_ops { 493 const char *name; 494 struct module *module; 495 unsigned int flags; 496 #define NVME_F_FABRICS (1 << 0) 497 #define NVME_F_METADATA_SUPPORTED (1 << 1) 498 #define NVME_F_PCI_P2PDMA (1 << 2) 499 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 500 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 501 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 502 void (*free_ctrl)(struct nvme_ctrl *ctrl); 503 void (*submit_async_event)(struct nvme_ctrl *ctrl); 504 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 505 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 506 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 507 void (*print_device_info)(struct nvme_ctrl *ctrl); 508 }; 509 510 /* 511 * nvme command_id is constructed as such: 512 * | xxxx | xxxxxxxxxxxx | 513 * gen request tag 514 */ 515 #define nvme_genctr_mask(gen) (gen & 0xf) 516 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 517 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 518 #define nvme_tag_from_cid(cid) (cid & 0xfff) 519 520 static inline u16 nvme_cid(struct request *rq) 521 { 522 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 523 } 524 525 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 526 u16 command_id) 527 { 528 u8 genctr = nvme_genctr_from_cid(command_id); 529 u16 tag = nvme_tag_from_cid(command_id); 530 struct request *rq; 531 532 rq = blk_mq_tag_to_rq(tags, tag); 533 if (unlikely(!rq)) { 534 pr_err("could not locate request for tag %#x\n", 535 tag); 536 return NULL; 537 } 538 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 539 dev_err(nvme_req(rq)->ctrl->device, 540 "request %#x genctr mismatch (got %#x expected %#x)\n", 541 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 542 return NULL; 543 } 544 return rq; 545 } 546 547 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 548 u16 command_id) 549 { 550 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 551 } 552 553 /* 554 * Return the length of the string without the space padding 555 */ 556 static inline int nvme_strlen(char *s, int len) 557 { 558 while (s[len - 1] == ' ') 559 len--; 560 return len; 561 } 562 563 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 564 { 565 struct nvme_subsystem *subsys = ctrl->subsys; 566 567 if (ctrl->ops->print_device_info) { 568 ctrl->ops->print_device_info(ctrl); 569 return; 570 } 571 572 dev_err(ctrl->device, 573 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 574 nvme_strlen(subsys->model, sizeof(subsys->model)), 575 subsys->model, nvme_strlen(subsys->firmware_rev, 576 sizeof(subsys->firmware_rev)), 577 subsys->firmware_rev); 578 } 579 580 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 581 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 582 const char *dev_name); 583 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 584 void nvme_should_fail(struct request *req); 585 #else 586 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 587 const char *dev_name) 588 { 589 } 590 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 591 { 592 } 593 static inline void nvme_should_fail(struct request *req) {} 594 #endif 595 596 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 597 { 598 if (!ctrl->subsystem) 599 return -ENOTTY; 600 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 601 } 602 603 /* 604 * Convert a 512B sector number to a device logical block number. 605 */ 606 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 607 { 608 return sector >> (ns->lba_shift - SECTOR_SHIFT); 609 } 610 611 /* 612 * Convert a device logical block number to a 512B sector number. 613 */ 614 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 615 { 616 return lba << (ns->lba_shift - SECTOR_SHIFT); 617 } 618 619 /* 620 * Convert byte length to nvme's 0-based num dwords 621 */ 622 static inline u32 nvme_bytes_to_numd(size_t len) 623 { 624 return (len >> 2) - 1; 625 } 626 627 static inline bool nvme_is_ana_error(u16 status) 628 { 629 switch (status & 0x7ff) { 630 case NVME_SC_ANA_TRANSITION: 631 case NVME_SC_ANA_INACCESSIBLE: 632 case NVME_SC_ANA_PERSISTENT_LOSS: 633 return true; 634 default: 635 return false; 636 } 637 } 638 639 static inline bool nvme_is_path_error(u16 status) 640 { 641 /* check for a status code type of 'path related status' */ 642 return (status & 0x700) == 0x300; 643 } 644 645 /* 646 * Fill in the status and result information from the CQE, and then figure out 647 * if blk-mq will need to use IPI magic to complete the request, and if yes do 648 * so. If not let the caller complete the request without an indirect function 649 * call. 650 */ 651 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 652 union nvme_result result) 653 { 654 struct nvme_request *rq = nvme_req(req); 655 struct nvme_ctrl *ctrl = rq->ctrl; 656 657 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 658 rq->genctr++; 659 660 rq->status = le16_to_cpu(status) >> 1; 661 rq->result = result; 662 /* inject error when permitted by fault injection framework */ 663 nvme_should_fail(req); 664 if (unlikely(blk_should_fake_timeout(req->q))) 665 return true; 666 return blk_mq_complete_request_remote(req); 667 } 668 669 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 670 { 671 get_device(ctrl->device); 672 } 673 674 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 675 { 676 put_device(ctrl->device); 677 } 678 679 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 680 { 681 return !qid && 682 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 683 } 684 685 void nvme_complete_rq(struct request *req); 686 void nvme_complete_batch_req(struct request *req); 687 688 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 689 void (*fn)(struct request *rq)) 690 { 691 struct request *req; 692 693 rq_list_for_each(&iob->req_list, req) { 694 fn(req); 695 nvme_complete_batch_req(req); 696 } 697 blk_mq_end_request_batch(iob); 698 } 699 700 blk_status_t nvme_host_path_error(struct request *req); 701 bool nvme_cancel_request(struct request *req, void *data, bool reserved); 702 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 703 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 704 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 705 enum nvme_ctrl_state new_state); 706 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 707 int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 708 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 709 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 710 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 711 const struct nvme_ctrl_ops *ops, unsigned long quirks); 712 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 713 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 714 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 715 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl); 716 717 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 718 719 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 720 bool send); 721 722 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 723 volatile union nvme_result *res); 724 725 void nvme_stop_queues(struct nvme_ctrl *ctrl); 726 void nvme_start_queues(struct nvme_ctrl *ctrl); 727 void nvme_stop_admin_queue(struct nvme_ctrl *ctrl); 728 void nvme_start_admin_queue(struct nvme_ctrl *ctrl); 729 void nvme_kill_queues(struct nvme_ctrl *ctrl); 730 void nvme_sync_queues(struct nvme_ctrl *ctrl); 731 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 732 void nvme_unfreeze(struct nvme_ctrl *ctrl); 733 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 734 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 735 void nvme_start_freeze(struct nvme_ctrl *ctrl); 736 737 static inline unsigned int nvme_req_op(struct nvme_command *cmd) 738 { 739 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 740 } 741 742 #define NVME_QID_ANY -1 743 void nvme_init_request(struct request *req, struct nvme_command *cmd); 744 void nvme_cleanup_cmd(struct request *req); 745 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 746 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 747 struct request *req); 748 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 749 bool queue_live); 750 751 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 752 bool queue_live) 753 { 754 if (likely(ctrl->state == NVME_CTRL_LIVE)) 755 return true; 756 if (ctrl->ops->flags & NVME_F_FABRICS && 757 ctrl->state == NVME_CTRL_DELETING) 758 return queue_live; 759 return __nvme_check_ready(ctrl, rq, queue_live); 760 } 761 762 /* 763 * NSID shall be unique for all shared namespaces, or if at least one of the 764 * following conditions is met: 765 * 1. Namespace Management is supported by the controller 766 * 2. ANA is supported by the controller 767 * 3. NVM Set are supported by the controller 768 * 769 * In other case, private namespace are not required to report a unique NSID. 770 */ 771 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 772 struct nvme_ns_head *head) 773 { 774 return head->shared || 775 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 776 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 777 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 778 } 779 780 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 781 void *buf, unsigned bufflen); 782 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 783 union nvme_result *result, void *buffer, unsigned bufflen, 784 unsigned timeout, int qid, int at_head, 785 blk_mq_req_flags_t flags); 786 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 787 unsigned int dword11, void *buffer, size_t buflen, 788 u32 *result); 789 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 790 unsigned int dword11, void *buffer, size_t buflen, 791 u32 *result); 792 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 793 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 794 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 795 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 796 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 797 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 798 void nvme_queue_scan(struct nvme_ctrl *ctrl); 799 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 800 void *log, size_t size, u64 offset); 801 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 802 void nvme_put_ns_head(struct nvme_ns_head *head); 803 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 804 const struct file_operations *fops, struct module *owner); 805 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 806 int nvme_ioctl(struct block_device *bdev, fmode_t mode, 807 unsigned int cmd, unsigned long arg); 808 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 809 int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode, 810 unsigned int cmd, unsigned long arg); 811 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 812 unsigned long arg); 813 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 814 unsigned long arg); 815 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 816 unsigned int issue_flags); 817 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 818 unsigned int issue_flags); 819 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 820 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 821 822 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 823 extern const struct pr_ops nvme_pr_ops; 824 extern const struct block_device_operations nvme_ns_head_ops; 825 826 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 827 #ifdef CONFIG_NVME_MULTIPATH 828 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 829 { 830 return ctrl->ana_log_buf != NULL; 831 } 832 833 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 834 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 835 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 836 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 837 void nvme_failover_req(struct request *req); 838 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 839 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 840 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 841 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 842 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 843 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 844 void nvme_mpath_update(struct nvme_ctrl *ctrl); 845 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 846 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 847 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 848 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 849 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 850 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 851 852 static inline void nvme_trace_bio_complete(struct request *req) 853 { 854 struct nvme_ns *ns = req->q->queuedata; 855 856 if (req->cmd_flags & REQ_NVME_MPATH) 857 trace_block_bio_complete(ns->head->disk->queue, req->bio); 858 } 859 860 extern bool multipath; 861 extern struct device_attribute dev_attr_ana_grpid; 862 extern struct device_attribute dev_attr_ana_state; 863 extern struct device_attribute subsys_attr_iopolicy; 864 865 #else 866 #define multipath false 867 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 868 { 869 return false; 870 } 871 static inline void nvme_failover_req(struct request *req) 872 { 873 } 874 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 875 { 876 } 877 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 878 struct nvme_ns_head *head) 879 { 880 return 0; 881 } 882 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 883 struct nvme_id_ns *id) 884 { 885 } 886 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 887 { 888 } 889 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 890 { 891 return false; 892 } 893 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 894 { 895 } 896 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 897 { 898 } 899 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 900 { 901 } 902 static inline void nvme_trace_bio_complete(struct request *req) 903 { 904 } 905 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 906 { 907 } 908 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 909 struct nvme_id_ctrl *id) 910 { 911 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 912 dev_warn(ctrl->device, 913 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 914 return 0; 915 } 916 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 917 { 918 } 919 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 920 { 921 } 922 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 923 { 924 } 925 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 926 { 927 } 928 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 929 { 930 } 931 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 932 { 933 } 934 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 935 { 936 } 937 #endif /* CONFIG_NVME_MULTIPATH */ 938 939 int nvme_revalidate_zones(struct nvme_ns *ns); 940 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 941 unsigned int nr_zones, report_zones_cb cb, void *data); 942 #ifdef CONFIG_BLK_DEV_ZONED 943 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 944 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 945 struct nvme_command *cmnd, 946 enum nvme_zone_mgmt_action action); 947 #else 948 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 949 struct request *req, struct nvme_command *cmnd, 950 enum nvme_zone_mgmt_action action) 951 { 952 return BLK_STS_NOTSUPP; 953 } 954 955 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 956 { 957 dev_warn(ns->ctrl->device, 958 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 959 return -EPROTONOSUPPORT; 960 } 961 #endif 962 963 static inline int nvme_ctrl_init_connect_q(struct nvme_ctrl *ctrl) 964 { 965 ctrl->connect_q = blk_mq_init_queue(ctrl->tagset); 966 if (IS_ERR(ctrl->connect_q)) 967 return PTR_ERR(ctrl->connect_q); 968 return 0; 969 } 970 971 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 972 { 973 return dev_to_disk(dev)->private_data; 974 } 975 976 #ifdef CONFIG_NVME_HWMON 977 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 978 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 979 #else 980 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 981 { 982 return 0; 983 } 984 985 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 986 { 987 } 988 #endif 989 990 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 991 { 992 return ctrl->sgls & ((1 << 0) | (1 << 1)); 993 } 994 995 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 996 u8 opcode); 997 int nvme_execute_passthru_rq(struct request *rq); 998 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 999 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1000 void nvme_put_ns(struct nvme_ns *ns); 1001 1002 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1003 { 1004 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1005 } 1006 1007 #ifdef CONFIG_NVME_VERBOSE_ERRORS 1008 const unsigned char *nvme_get_error_status_str(u16 status); 1009 const unsigned char *nvme_get_opcode_str(u8 opcode); 1010 const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1011 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1012 static inline const unsigned char *nvme_get_error_status_str(u16 status) 1013 { 1014 return "I/O Error"; 1015 } 1016 static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1017 { 1018 return "I/O Cmd"; 1019 } 1020 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1021 { 1022 return "Admin Cmd"; 1023 } 1024 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1025 1026 #endif /* _NVME_H */ 1027