1 /* 2 * Copyright (c) 2011-2014, Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 */ 13 14 #ifndef _NVME_H 15 #define _NVME_H 16 17 #include <linux/nvme.h> 18 #include <linux/cdev.h> 19 #include <linux/pci.h> 20 #include <linux/kref.h> 21 #include <linux/blk-mq.h> 22 #include <linux/lightnvm.h> 23 #include <linux/sed-opal.h> 24 25 extern unsigned int nvme_io_timeout; 26 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 27 28 extern unsigned int admin_timeout; 29 #define ADMIN_TIMEOUT (admin_timeout * HZ) 30 31 #define NVME_DEFAULT_KATO 5 32 #define NVME_KATO_GRACE 10 33 34 extern struct workqueue_struct *nvme_wq; 35 36 enum { 37 NVME_NS_LBA = 0, 38 NVME_NS_LIGHTNVM = 1, 39 }; 40 41 /* 42 * List of workarounds for devices that required behavior not specified in 43 * the standard. 44 */ 45 enum nvme_quirks { 46 /* 47 * Prefers I/O aligned to a stripe size specified in a vendor 48 * specific Identify field. 49 */ 50 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 51 52 /* 53 * The controller doesn't handle Identify value others than 0 or 1 54 * correctly. 55 */ 56 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 57 58 /* 59 * The controller deterministically returns O's on reads to 60 * logical blocks that deallocate was called on. 61 */ 62 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 63 64 /* 65 * The controller needs a delay before starts checking the device 66 * readiness, which is done by reading the NVME_CSTS_RDY bit. 67 */ 68 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 69 70 /* 71 * APST should not be used. 72 */ 73 NVME_QUIRK_NO_APST = (1 << 4), 74 75 /* 76 * The deepest sleep state should not be used. 77 */ 78 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 79 80 /* 81 * Supports the LighNVM command set if indicated in vs[1]. 82 */ 83 NVME_QUIRK_LIGHTNVM = (1 << 6), 84 }; 85 86 /* 87 * Common request structure for NVMe passthrough. All drivers must have 88 * this structure as the first member of their request-private data. 89 */ 90 struct nvme_request { 91 struct nvme_command *cmd; 92 union nvme_result result; 93 u8 retries; 94 u8 flags; 95 u16 status; 96 }; 97 98 /* 99 * Mark a bio as coming in through the mpath node. 100 */ 101 #define REQ_NVME_MPATH REQ_DRV 102 103 enum { 104 NVME_REQ_CANCELLED = (1 << 0), 105 }; 106 107 static inline struct nvme_request *nvme_req(struct request *req) 108 { 109 return blk_mq_rq_to_pdu(req); 110 } 111 112 /* The below value is the specific amount of delay needed before checking 113 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 114 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 115 * found empirically. 116 */ 117 #define NVME_QUIRK_DELAY_AMOUNT 2000 118 119 enum nvme_ctrl_state { 120 NVME_CTRL_NEW, 121 NVME_CTRL_LIVE, 122 NVME_CTRL_RESETTING, 123 NVME_CTRL_RECONNECTING, 124 NVME_CTRL_DELETING, 125 NVME_CTRL_DEAD, 126 }; 127 128 struct nvme_ctrl { 129 enum nvme_ctrl_state state; 130 bool identified; 131 spinlock_t lock; 132 const struct nvme_ctrl_ops *ops; 133 struct request_queue *admin_q; 134 struct request_queue *connect_q; 135 struct device *dev; 136 int instance; 137 struct blk_mq_tag_set *tagset; 138 struct blk_mq_tag_set *admin_tagset; 139 struct list_head namespaces; 140 struct mutex namespaces_mutex; 141 struct device ctrl_device; 142 struct device *device; /* char device */ 143 struct cdev cdev; 144 struct work_struct reset_work; 145 struct work_struct delete_work; 146 147 struct nvme_subsystem *subsys; 148 struct list_head subsys_entry; 149 150 struct opal_dev *opal_dev; 151 152 char name[12]; 153 u16 cntlid; 154 155 u32 ctrl_config; 156 u16 mtfa; 157 u32 queue_count; 158 159 u64 cap; 160 u32 page_size; 161 u32 max_hw_sectors; 162 u16 oncs; 163 u16 oacs; 164 u16 nssa; 165 u16 nr_streams; 166 atomic_t abort_limit; 167 u8 vwc; 168 u32 vs; 169 u32 sgls; 170 u16 kas; 171 u8 npss; 172 u8 apsta; 173 u32 aen_result; 174 unsigned int shutdown_timeout; 175 unsigned int kato; 176 bool subsystem; 177 unsigned long quirks; 178 struct nvme_id_power_state psd[32]; 179 struct nvme_effects_log *effects; 180 struct work_struct scan_work; 181 struct work_struct async_event_work; 182 struct delayed_work ka_work; 183 struct work_struct fw_act_work; 184 185 /* Power saving configuration */ 186 u64 ps_max_latency_us; 187 bool apst_enabled; 188 189 /* PCIe only: */ 190 u32 hmpre; 191 u32 hmmin; 192 u32 hmminds; 193 u16 hmmaxd; 194 195 /* Fabrics only */ 196 u16 sqsize; 197 u32 ioccsz; 198 u32 iorcsz; 199 u16 icdoff; 200 u16 maxcmd; 201 int nr_reconnects; 202 struct nvmf_ctrl_options *opts; 203 }; 204 205 struct nvme_subsystem { 206 int instance; 207 struct device dev; 208 /* 209 * Because we unregister the device on the last put we need 210 * a separate refcount. 211 */ 212 struct kref ref; 213 struct list_head entry; 214 struct mutex lock; 215 struct list_head ctrls; 216 struct list_head nsheads; 217 char subnqn[NVMF_NQN_SIZE]; 218 char serial[20]; 219 char model[40]; 220 char firmware_rev[8]; 221 u8 cmic; 222 u16 vendor_id; 223 struct ida ns_ida; 224 }; 225 226 /* 227 * Container structure for uniqueue namespace identifiers. 228 */ 229 struct nvme_ns_ids { 230 u8 eui64[8]; 231 u8 nguid[16]; 232 uuid_t uuid; 233 }; 234 235 /* 236 * Anchor structure for namespaces. There is one for each namespace in a 237 * NVMe subsystem that any of our controllers can see, and the namespace 238 * structure for each controller is chained of it. For private namespaces 239 * there is a 1:1 relation to our namespace structures, that is ->list 240 * only ever has a single entry for private namespaces. 241 */ 242 struct nvme_ns_head { 243 #ifdef CONFIG_NVME_MULTIPATH 244 struct gendisk *disk; 245 struct nvme_ns __rcu *current_path; 246 struct bio_list requeue_list; 247 spinlock_t requeue_lock; 248 struct work_struct requeue_work; 249 #endif 250 struct list_head list; 251 struct srcu_struct srcu; 252 struct nvme_subsystem *subsys; 253 unsigned ns_id; 254 struct nvme_ns_ids ids; 255 struct list_head entry; 256 struct kref ref; 257 int instance; 258 }; 259 260 struct nvme_ns { 261 struct list_head list; 262 263 struct nvme_ctrl *ctrl; 264 struct request_queue *queue; 265 struct gendisk *disk; 266 struct list_head siblings; 267 struct nvm_dev *ndev; 268 struct kref kref; 269 struct nvme_ns_head *head; 270 271 int lba_shift; 272 u16 ms; 273 u16 sgs; 274 u32 sws; 275 bool ext; 276 u8 pi_type; 277 unsigned long flags; 278 #define NVME_NS_REMOVING 0 279 #define NVME_NS_DEAD 1 280 u16 noiob; 281 }; 282 283 struct nvme_ctrl_ops { 284 const char *name; 285 struct module *module; 286 unsigned int flags; 287 #define NVME_F_FABRICS (1 << 0) 288 #define NVME_F_METADATA_SUPPORTED (1 << 1) 289 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 290 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 291 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 292 void (*free_ctrl)(struct nvme_ctrl *ctrl); 293 void (*submit_async_event)(struct nvme_ctrl *ctrl); 294 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 295 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 296 int (*reinit_request)(void *data, struct request *rq); 297 }; 298 299 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) 300 { 301 u32 val = 0; 302 303 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) 304 return false; 305 return val & NVME_CSTS_RDY; 306 } 307 308 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 309 { 310 if (!ctrl->subsystem) 311 return -ENOTTY; 312 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 313 } 314 315 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 316 { 317 return (sector >> (ns->lba_shift - 9)); 318 } 319 320 static inline void nvme_cleanup_cmd(struct request *req) 321 { 322 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 323 kfree(page_address(req->special_vec.bv_page) + 324 req->special_vec.bv_offset); 325 } 326 } 327 328 static inline void nvme_end_request(struct request *req, __le16 status, 329 union nvme_result result) 330 { 331 struct nvme_request *rq = nvme_req(req); 332 333 rq->status = le16_to_cpu(status) >> 1; 334 rq->result = result; 335 blk_mq_complete_request(req); 336 } 337 338 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 339 { 340 get_device(ctrl->device); 341 } 342 343 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 344 { 345 put_device(ctrl->device); 346 } 347 348 void nvme_complete_rq(struct request *req); 349 void nvme_cancel_request(struct request *req, void *data, bool reserved); 350 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 351 enum nvme_ctrl_state new_state); 352 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 353 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 354 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 355 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 356 const struct nvme_ctrl_ops *ops, unsigned long quirks); 357 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 358 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 359 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 360 void nvme_put_ctrl(struct nvme_ctrl *ctrl); 361 int nvme_init_identify(struct nvme_ctrl *ctrl); 362 363 void nvme_queue_scan(struct nvme_ctrl *ctrl); 364 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 365 366 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 367 bool send); 368 369 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 370 union nvme_result *res); 371 372 void nvme_stop_queues(struct nvme_ctrl *ctrl); 373 void nvme_start_queues(struct nvme_ctrl *ctrl); 374 void nvme_kill_queues(struct nvme_ctrl *ctrl); 375 void nvme_unfreeze(struct nvme_ctrl *ctrl); 376 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 377 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 378 void nvme_start_freeze(struct nvme_ctrl *ctrl); 379 int nvme_reinit_tagset(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set); 380 381 #define NVME_QID_ANY -1 382 struct request *nvme_alloc_request(struct request_queue *q, 383 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 384 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 385 struct nvme_command *cmd); 386 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 387 void *buf, unsigned bufflen); 388 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 389 union nvme_result *result, void *buffer, unsigned bufflen, 390 unsigned timeout, int qid, int at_head, 391 blk_mq_req_flags_t flags); 392 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 393 void nvme_start_keep_alive(struct nvme_ctrl *ctrl); 394 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 395 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 396 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 397 int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 398 399 extern const struct attribute_group nvme_ns_id_attr_group; 400 extern const struct block_device_operations nvme_ns_head_ops; 401 402 #ifdef CONFIG_NVME_MULTIPATH 403 void nvme_failover_req(struct request *req); 404 bool nvme_req_needs_failover(struct request *req); 405 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 406 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 407 void nvme_mpath_add_disk(struct nvme_ns_head *head); 408 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 409 410 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns) 411 { 412 struct nvme_ns_head *head = ns->head; 413 414 if (head && ns == srcu_dereference(head->current_path, &head->srcu)) 415 rcu_assign_pointer(head->current_path, NULL); 416 } 417 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 418 #else 419 static inline void nvme_failover_req(struct request *req) 420 { 421 } 422 static inline bool nvme_req_needs_failover(struct request *req) 423 { 424 return false; 425 } 426 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 427 { 428 } 429 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 430 struct nvme_ns_head *head) 431 { 432 return 0; 433 } 434 static inline void nvme_mpath_add_disk(struct nvme_ns_head *head) 435 { 436 } 437 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 438 { 439 } 440 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns) 441 { 442 } 443 #endif /* CONFIG_NVME_MULTIPATH */ 444 445 #ifdef CONFIG_NVM 446 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 447 void nvme_nvm_unregister(struct nvme_ns *ns); 448 int nvme_nvm_register_sysfs(struct nvme_ns *ns); 449 void nvme_nvm_unregister_sysfs(struct nvme_ns *ns); 450 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 451 #else 452 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 453 int node) 454 { 455 return 0; 456 } 457 458 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 459 static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns) 460 { 461 return 0; 462 } 463 static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {}; 464 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 465 unsigned long arg) 466 { 467 return -ENOTTY; 468 } 469 #endif /* CONFIG_NVM */ 470 471 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 472 { 473 return dev_to_disk(dev)->private_data; 474 } 475 476 int __init nvme_core_init(void); 477 void nvme_core_exit(void); 478 479 #endif /* _NVME_H */ 480