1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/lightnvm.h> 15 #include <linux/sed-opal.h> 16 #include <linux/fault-inject.h> 17 #include <linux/rcupdate.h> 18 #include <linux/wait.h> 19 #include <linux/t10-pi.h> 20 21 #include <trace/events/block.h> 22 23 extern unsigned int nvme_io_timeout; 24 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 25 26 extern unsigned int admin_timeout; 27 #define ADMIN_TIMEOUT (admin_timeout * HZ) 28 29 #define NVME_DEFAULT_KATO 5 30 #define NVME_KATO_GRACE 10 31 32 #ifdef CONFIG_ARCH_NO_SG_CHAIN 33 #define NVME_INLINE_SG_CNT 0 34 #define NVME_INLINE_METADATA_SG_CNT 0 35 #else 36 #define NVME_INLINE_SG_CNT 2 37 #define NVME_INLINE_METADATA_SG_CNT 1 38 #endif 39 40 extern struct workqueue_struct *nvme_wq; 41 extern struct workqueue_struct *nvme_reset_wq; 42 extern struct workqueue_struct *nvme_delete_wq; 43 44 enum { 45 NVME_NS_LBA = 0, 46 NVME_NS_LIGHTNVM = 1, 47 }; 48 49 /* 50 * List of workarounds for devices that required behavior not specified in 51 * the standard. 52 */ 53 enum nvme_quirks { 54 /* 55 * Prefers I/O aligned to a stripe size specified in a vendor 56 * specific Identify field. 57 */ 58 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 59 60 /* 61 * The controller doesn't handle Identify value others than 0 or 1 62 * correctly. 63 */ 64 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 65 66 /* 67 * The controller deterministically returns O's on reads to 68 * logical blocks that deallocate was called on. 69 */ 70 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 71 72 /* 73 * The controller needs a delay before starts checking the device 74 * readiness, which is done by reading the NVME_CSTS_RDY bit. 75 */ 76 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 77 78 /* 79 * APST should not be used. 80 */ 81 NVME_QUIRK_NO_APST = (1 << 4), 82 83 /* 84 * The deepest sleep state should not be used. 85 */ 86 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 87 88 /* 89 * Supports the LighNVM command set if indicated in vs[1]. 90 */ 91 NVME_QUIRK_LIGHTNVM = (1 << 6), 92 93 /* 94 * Set MEDIUM priority on SQ creation 95 */ 96 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 97 98 /* 99 * Ignore device provided subnqn. 100 */ 101 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 102 103 /* 104 * Broken Write Zeroes. 105 */ 106 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 107 108 /* 109 * Force simple suspend/resume path. 110 */ 111 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 112 113 /* 114 * Use only one interrupt vector for all queues 115 */ 116 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 117 118 /* 119 * Use non-standard 128 bytes SQEs. 120 */ 121 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 122 123 /* 124 * Prevent tag overlap between queues 125 */ 126 NVME_QUIRK_SHARED_TAGS = (1 << 13), 127 128 /* 129 * Don't change the value of the temperature threshold feature 130 */ 131 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 132 }; 133 134 /* 135 * Common request structure for NVMe passthrough. All drivers must have 136 * this structure as the first member of their request-private data. 137 */ 138 struct nvme_request { 139 struct nvme_command *cmd; 140 union nvme_result result; 141 u8 retries; 142 u8 flags; 143 u16 status; 144 struct nvme_ctrl *ctrl; 145 }; 146 147 /* 148 * Mark a bio as coming in through the mpath node. 149 */ 150 #define REQ_NVME_MPATH REQ_DRV 151 152 enum { 153 NVME_REQ_CANCELLED = (1 << 0), 154 NVME_REQ_USERCMD = (1 << 1), 155 }; 156 157 static inline struct nvme_request *nvme_req(struct request *req) 158 { 159 return blk_mq_rq_to_pdu(req); 160 } 161 162 static inline u16 nvme_req_qid(struct request *req) 163 { 164 if (!req->rq_disk) 165 return 0; 166 return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 167 } 168 169 /* The below value is the specific amount of delay needed before checking 170 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 171 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 172 * found empirically. 173 */ 174 #define NVME_QUIRK_DELAY_AMOUNT 2300 175 176 enum nvme_ctrl_state { 177 NVME_CTRL_NEW, 178 NVME_CTRL_LIVE, 179 NVME_CTRL_RESETTING, 180 NVME_CTRL_CONNECTING, 181 NVME_CTRL_DELETING, 182 NVME_CTRL_DEAD, 183 }; 184 185 struct nvme_fault_inject { 186 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 187 struct fault_attr attr; 188 struct dentry *parent; 189 bool dont_retry; /* DNR, do not retry */ 190 u16 status; /* status code */ 191 #endif 192 }; 193 194 struct nvme_ctrl { 195 bool comp_seen; 196 enum nvme_ctrl_state state; 197 bool identified; 198 spinlock_t lock; 199 struct mutex scan_lock; 200 const struct nvme_ctrl_ops *ops; 201 struct request_queue *admin_q; 202 struct request_queue *connect_q; 203 struct request_queue *fabrics_q; 204 struct device *dev; 205 int instance; 206 int numa_node; 207 struct blk_mq_tag_set *tagset; 208 struct blk_mq_tag_set *admin_tagset; 209 struct list_head namespaces; 210 struct rw_semaphore namespaces_rwsem; 211 struct device ctrl_device; 212 struct device *device; /* char device */ 213 struct cdev cdev; 214 struct work_struct reset_work; 215 struct work_struct delete_work; 216 wait_queue_head_t state_wq; 217 218 struct nvme_subsystem *subsys; 219 struct list_head subsys_entry; 220 221 struct opal_dev *opal_dev; 222 223 char name[12]; 224 u16 cntlid; 225 226 u32 ctrl_config; 227 u16 mtfa; 228 u32 queue_count; 229 230 u64 cap; 231 u32 page_size; 232 u32 max_hw_sectors; 233 u32 max_segments; 234 u32 max_integrity_segments; 235 u16 crdt[3]; 236 u16 oncs; 237 u16 oacs; 238 u16 nssa; 239 u16 nr_streams; 240 u16 sqsize; 241 u32 max_namespaces; 242 atomic_t abort_limit; 243 u8 vwc; 244 u32 vs; 245 u32 sgls; 246 u16 kas; 247 u8 npss; 248 u8 apsta; 249 u16 wctemp; 250 u16 cctemp; 251 u32 oaes; 252 u32 aen_result; 253 u32 ctratt; 254 unsigned int shutdown_timeout; 255 unsigned int kato; 256 bool subsystem; 257 unsigned long quirks; 258 struct nvme_id_power_state psd[32]; 259 struct nvme_effects_log *effects; 260 struct work_struct scan_work; 261 struct work_struct async_event_work; 262 struct delayed_work ka_work; 263 struct nvme_command ka_cmd; 264 struct work_struct fw_act_work; 265 unsigned long events; 266 bool created; 267 268 #ifdef CONFIG_NVME_MULTIPATH 269 /* asymmetric namespace access: */ 270 u8 anacap; 271 u8 anatt; 272 u32 anagrpmax; 273 u32 nanagrpid; 274 struct mutex ana_lock; 275 struct nvme_ana_rsp_hdr *ana_log_buf; 276 size_t ana_log_size; 277 struct timer_list anatt_timer; 278 struct work_struct ana_work; 279 #endif 280 281 /* Power saving configuration */ 282 u64 ps_max_latency_us; 283 bool apst_enabled; 284 285 /* PCIe only: */ 286 u32 hmpre; 287 u32 hmmin; 288 u32 hmminds; 289 u16 hmmaxd; 290 291 /* Fabrics only */ 292 u32 ioccsz; 293 u32 iorcsz; 294 u16 icdoff; 295 u16 maxcmd; 296 int nr_reconnects; 297 struct nvmf_ctrl_options *opts; 298 299 struct page *discard_page; 300 unsigned long discard_page_busy; 301 302 struct nvme_fault_inject fault_inject; 303 }; 304 305 enum nvme_iopolicy { 306 NVME_IOPOLICY_NUMA, 307 NVME_IOPOLICY_RR, 308 }; 309 310 struct nvme_subsystem { 311 int instance; 312 struct device dev; 313 /* 314 * Because we unregister the device on the last put we need 315 * a separate refcount. 316 */ 317 struct kref ref; 318 struct list_head entry; 319 struct mutex lock; 320 struct list_head ctrls; 321 struct list_head nsheads; 322 char subnqn[NVMF_NQN_SIZE]; 323 char serial[20]; 324 char model[40]; 325 char firmware_rev[8]; 326 u8 cmic; 327 u16 vendor_id; 328 u16 awupf; /* 0's based awupf value. */ 329 struct ida ns_ida; 330 #ifdef CONFIG_NVME_MULTIPATH 331 enum nvme_iopolicy iopolicy; 332 #endif 333 }; 334 335 /* 336 * Container structure for uniqueue namespace identifiers. 337 */ 338 struct nvme_ns_ids { 339 u8 eui64[8]; 340 u8 nguid[16]; 341 uuid_t uuid; 342 }; 343 344 /* 345 * Anchor structure for namespaces. There is one for each namespace in a 346 * NVMe subsystem that any of our controllers can see, and the namespace 347 * structure for each controller is chained of it. For private namespaces 348 * there is a 1:1 relation to our namespace structures, that is ->list 349 * only ever has a single entry for private namespaces. 350 */ 351 struct nvme_ns_head { 352 struct list_head list; 353 struct srcu_struct srcu; 354 struct nvme_subsystem *subsys; 355 unsigned ns_id; 356 struct nvme_ns_ids ids; 357 struct list_head entry; 358 struct kref ref; 359 bool shared; 360 int instance; 361 #ifdef CONFIG_NVME_MULTIPATH 362 struct gendisk *disk; 363 struct bio_list requeue_list; 364 spinlock_t requeue_lock; 365 struct work_struct requeue_work; 366 struct mutex lock; 367 unsigned long flags; 368 #define NVME_NSHEAD_DISK_LIVE 0 369 struct nvme_ns __rcu *current_path[]; 370 #endif 371 }; 372 373 enum nvme_ns_features { 374 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 375 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 376 }; 377 378 struct nvme_ns { 379 struct list_head list; 380 381 struct nvme_ctrl *ctrl; 382 struct request_queue *queue; 383 struct gendisk *disk; 384 #ifdef CONFIG_NVME_MULTIPATH 385 enum nvme_ana_state ana_state; 386 u32 ana_grpid; 387 #endif 388 struct list_head siblings; 389 struct nvm_dev *ndev; 390 struct kref kref; 391 struct nvme_ns_head *head; 392 393 int lba_shift; 394 u16 ms; 395 u16 sgs; 396 u32 sws; 397 u8 pi_type; 398 unsigned long features; 399 unsigned long flags; 400 #define NVME_NS_REMOVING 0 401 #define NVME_NS_DEAD 1 402 #define NVME_NS_ANA_PENDING 2 403 404 struct nvme_fault_inject fault_inject; 405 406 }; 407 408 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 409 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 410 { 411 return ns->pi_type && ns->ms == sizeof(struct t10_pi_tuple); 412 } 413 414 struct nvme_ctrl_ops { 415 const char *name; 416 struct module *module; 417 unsigned int flags; 418 #define NVME_F_FABRICS (1 << 0) 419 #define NVME_F_METADATA_SUPPORTED (1 << 1) 420 #define NVME_F_PCI_P2PDMA (1 << 2) 421 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 422 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 423 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 424 void (*free_ctrl)(struct nvme_ctrl *ctrl); 425 void (*submit_async_event)(struct nvme_ctrl *ctrl); 426 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 427 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 428 }; 429 430 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 431 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 432 const char *dev_name); 433 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 434 void nvme_should_fail(struct request *req); 435 #else 436 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 437 const char *dev_name) 438 { 439 } 440 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 441 { 442 } 443 static inline void nvme_should_fail(struct request *req) {} 444 #endif 445 446 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 447 { 448 if (!ctrl->subsystem) 449 return -ENOTTY; 450 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 451 } 452 453 /* 454 * Convert a 512B sector number to a device logical block number. 455 */ 456 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 457 { 458 return sector >> (ns->lba_shift - SECTOR_SHIFT); 459 } 460 461 /* 462 * Convert a device logical block number to a 512B sector number. 463 */ 464 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 465 { 466 return lba << (ns->lba_shift - SECTOR_SHIFT); 467 } 468 469 /* 470 * Convert byte length to nvme's 0-based num dwords 471 */ 472 static inline u32 nvme_bytes_to_numd(size_t len) 473 { 474 return (len >> 2) - 1; 475 } 476 477 static inline void nvme_end_request(struct request *req, __le16 status, 478 union nvme_result result) 479 { 480 struct nvme_request *rq = nvme_req(req); 481 482 rq->status = le16_to_cpu(status) >> 1; 483 rq->result = result; 484 /* inject error when permitted by fault injection framework */ 485 nvme_should_fail(req); 486 blk_mq_complete_request(req); 487 } 488 489 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 490 { 491 get_device(ctrl->device); 492 } 493 494 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 495 { 496 put_device(ctrl->device); 497 } 498 499 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 500 { 501 return !qid && command_id >= NVME_AQ_BLK_MQ_DEPTH; 502 } 503 504 void nvme_complete_rq(struct request *req); 505 bool nvme_cancel_request(struct request *req, void *data, bool reserved); 506 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 507 enum nvme_ctrl_state new_state); 508 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 509 int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 510 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 511 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 512 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 513 const struct nvme_ctrl_ops *ops, unsigned long quirks); 514 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 515 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 516 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 517 int nvme_init_identify(struct nvme_ctrl *ctrl); 518 519 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 520 521 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 522 bool send); 523 524 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 525 volatile union nvme_result *res); 526 527 void nvme_stop_queues(struct nvme_ctrl *ctrl); 528 void nvme_start_queues(struct nvme_ctrl *ctrl); 529 void nvme_kill_queues(struct nvme_ctrl *ctrl); 530 void nvme_sync_queues(struct nvme_ctrl *ctrl); 531 void nvme_unfreeze(struct nvme_ctrl *ctrl); 532 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 533 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 534 void nvme_start_freeze(struct nvme_ctrl *ctrl); 535 536 #define NVME_QID_ANY -1 537 struct request *nvme_alloc_request(struct request_queue *q, 538 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 539 void nvme_cleanup_cmd(struct request *req); 540 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 541 struct nvme_command *cmd); 542 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 543 void *buf, unsigned bufflen); 544 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 545 union nvme_result *result, void *buffer, unsigned bufflen, 546 unsigned timeout, int qid, int at_head, 547 blk_mq_req_flags_t flags, bool poll); 548 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 549 unsigned int dword11, void *buffer, size_t buflen, 550 u32 *result); 551 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 552 unsigned int dword11, void *buffer, size_t buflen, 553 u32 *result); 554 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 555 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 556 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 557 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 558 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 559 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 560 561 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 562 void *log, size_t size, u64 offset); 563 564 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 565 extern const struct block_device_operations nvme_ns_head_ops; 566 567 #ifdef CONFIG_NVME_MULTIPATH 568 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 569 { 570 return ctrl->ana_log_buf != NULL; 571 } 572 573 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 574 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 575 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 576 void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 577 struct nvme_ctrl *ctrl, int *flags); 578 bool nvme_failover_req(struct request *req); 579 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 580 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 581 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 582 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 583 int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 584 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 585 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 586 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 587 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 588 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 589 590 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 591 { 592 struct nvme_ns_head *head = ns->head; 593 594 if (head->disk && list_empty(&head->list)) 595 kblockd_schedule_work(&head->requeue_work); 596 } 597 598 static inline void nvme_trace_bio_complete(struct request *req, 599 blk_status_t status) 600 { 601 struct nvme_ns *ns = req->q->queuedata; 602 603 if (req->cmd_flags & REQ_NVME_MPATH) 604 trace_block_bio_complete(ns->head->disk->queue, req->bio); 605 } 606 607 extern struct device_attribute dev_attr_ana_grpid; 608 extern struct device_attribute dev_attr_ana_state; 609 extern struct device_attribute subsys_attr_iopolicy; 610 611 #else 612 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 613 { 614 return false; 615 } 616 /* 617 * Without the multipath code enabled, multiple controller per subsystems are 618 * visible as devices and thus we cannot use the subsystem instance. 619 */ 620 static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 621 struct nvme_ctrl *ctrl, int *flags) 622 { 623 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 624 } 625 626 static inline bool nvme_failover_req(struct request *req) 627 { 628 return false; 629 } 630 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 631 { 632 } 633 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 634 struct nvme_ns_head *head) 635 { 636 return 0; 637 } 638 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 639 struct nvme_id_ns *id) 640 { 641 } 642 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 643 { 644 } 645 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 646 { 647 return false; 648 } 649 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 650 { 651 } 652 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 653 { 654 } 655 static inline void nvme_trace_bio_complete(struct request *req, 656 blk_status_t status) 657 { 658 } 659 static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 660 struct nvme_id_ctrl *id) 661 { 662 if (ctrl->subsys->cmic & (1 << 3)) 663 dev_warn(ctrl->device, 664 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 665 return 0; 666 } 667 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 668 { 669 } 670 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 671 { 672 } 673 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 674 { 675 } 676 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 677 { 678 } 679 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 680 { 681 } 682 #endif /* CONFIG_NVME_MULTIPATH */ 683 684 #ifdef CONFIG_NVM 685 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 686 void nvme_nvm_unregister(struct nvme_ns *ns); 687 extern const struct attribute_group nvme_nvm_attr_group; 688 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 689 #else 690 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 691 int node) 692 { 693 return 0; 694 } 695 696 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 697 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 698 unsigned long arg) 699 { 700 return -ENOTTY; 701 } 702 #endif /* CONFIG_NVM */ 703 704 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 705 { 706 return dev_to_disk(dev)->private_data; 707 } 708 709 #ifdef CONFIG_NVME_HWMON 710 void nvme_hwmon_init(struct nvme_ctrl *ctrl); 711 #else 712 static inline void nvme_hwmon_init(struct nvme_ctrl *ctrl) { } 713 #endif 714 715 #endif /* _NVME_H */ 716