xref: /openbmc/linux/drivers/nvme/host/nvme.h (revision 55b24334)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2011-2014, Intel Corporation.
4  */
5 
6 #ifndef _NVME_H
7 #define _NVME_H
8 
9 #include <linux/nvme.h>
10 #include <linux/cdev.h>
11 #include <linux/pci.h>
12 #include <linux/kref.h>
13 #include <linux/blk-mq.h>
14 #include <linux/sed-opal.h>
15 #include <linux/fault-inject.h>
16 #include <linux/rcupdate.h>
17 #include <linux/wait.h>
18 #include <linux/t10-pi.h>
19 
20 #include <trace/events/block.h>
21 
22 extern unsigned int nvme_io_timeout;
23 #define NVME_IO_TIMEOUT	(nvme_io_timeout * HZ)
24 
25 extern unsigned int admin_timeout;
26 #define NVME_ADMIN_TIMEOUT	(admin_timeout * HZ)
27 
28 #define NVME_DEFAULT_KATO	5
29 
30 #ifdef CONFIG_ARCH_NO_SG_CHAIN
31 #define  NVME_INLINE_SG_CNT  0
32 #define  NVME_INLINE_METADATA_SG_CNT  0
33 #else
34 #define  NVME_INLINE_SG_CNT  2
35 #define  NVME_INLINE_METADATA_SG_CNT  1
36 #endif
37 
38 /*
39  * Default to a 4K page size, with the intention to update this
40  * path in the future to accommodate architectures with differing
41  * kernel and IO page sizes.
42  */
43 #define NVME_CTRL_PAGE_SHIFT	12
44 #define NVME_CTRL_PAGE_SIZE	(1 << NVME_CTRL_PAGE_SHIFT)
45 
46 extern struct workqueue_struct *nvme_wq;
47 extern struct workqueue_struct *nvme_reset_wq;
48 extern struct workqueue_struct *nvme_delete_wq;
49 
50 /*
51  * List of workarounds for devices that required behavior not specified in
52  * the standard.
53  */
54 enum nvme_quirks {
55 	/*
56 	 * Prefers I/O aligned to a stripe size specified in a vendor
57 	 * specific Identify field.
58 	 */
59 	NVME_QUIRK_STRIPE_SIZE			= (1 << 0),
60 
61 	/*
62 	 * The controller doesn't handle Identify value others than 0 or 1
63 	 * correctly.
64 	 */
65 	NVME_QUIRK_IDENTIFY_CNS			= (1 << 1),
66 
67 	/*
68 	 * The controller deterministically returns O's on reads to
69 	 * logical blocks that deallocate was called on.
70 	 */
71 	NVME_QUIRK_DEALLOCATE_ZEROES		= (1 << 2),
72 
73 	/*
74 	 * The controller needs a delay before starts checking the device
75 	 * readiness, which is done by reading the NVME_CSTS_RDY bit.
76 	 */
77 	NVME_QUIRK_DELAY_BEFORE_CHK_RDY		= (1 << 3),
78 
79 	/*
80 	 * APST should not be used.
81 	 */
82 	NVME_QUIRK_NO_APST			= (1 << 4),
83 
84 	/*
85 	 * The deepest sleep state should not be used.
86 	 */
87 	NVME_QUIRK_NO_DEEPEST_PS		= (1 << 5),
88 
89 	/*
90 	 * Set MEDIUM priority on SQ creation
91 	 */
92 	NVME_QUIRK_MEDIUM_PRIO_SQ		= (1 << 7),
93 
94 	/*
95 	 * Ignore device provided subnqn.
96 	 */
97 	NVME_QUIRK_IGNORE_DEV_SUBNQN		= (1 << 8),
98 
99 	/*
100 	 * Broken Write Zeroes.
101 	 */
102 	NVME_QUIRK_DISABLE_WRITE_ZEROES		= (1 << 9),
103 
104 	/*
105 	 * Force simple suspend/resume path.
106 	 */
107 	NVME_QUIRK_SIMPLE_SUSPEND		= (1 << 10),
108 
109 	/*
110 	 * Use only one interrupt vector for all queues
111 	 */
112 	NVME_QUIRK_SINGLE_VECTOR		= (1 << 11),
113 
114 	/*
115 	 * Use non-standard 128 bytes SQEs.
116 	 */
117 	NVME_QUIRK_128_BYTES_SQES		= (1 << 12),
118 
119 	/*
120 	 * Prevent tag overlap between queues
121 	 */
122 	NVME_QUIRK_SHARED_TAGS                  = (1 << 13),
123 
124 	/*
125 	 * Don't change the value of the temperature threshold feature
126 	 */
127 	NVME_QUIRK_NO_TEMP_THRESH_CHANGE	= (1 << 14),
128 
129 	/*
130 	 * The controller doesn't handle the Identify Namespace
131 	 * Identification Descriptor list subcommand despite claiming
132 	 * NVMe 1.3 compliance.
133 	 */
134 	NVME_QUIRK_NO_NS_DESC_LIST		= (1 << 15),
135 
136 	/*
137 	 * The controller does not properly handle DMA addresses over
138 	 * 48 bits.
139 	 */
140 	NVME_QUIRK_DMA_ADDRESS_BITS_48		= (1 << 16),
141 
142 	/*
143 	 * The controller requires the command_id value be limited, so skip
144 	 * encoding the generation sequence number.
145 	 */
146 	NVME_QUIRK_SKIP_CID_GEN			= (1 << 17),
147 
148 	/*
149 	 * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
150 	 */
151 	NVME_QUIRK_BOGUS_NID			= (1 << 18),
152 
153 	/*
154 	 * No temperature thresholds for channels other than 0 (Composite).
155 	 */
156 	NVME_QUIRK_NO_SECONDARY_TEMP_THRESH	= (1 << 19),
157 };
158 
159 /*
160  * Common request structure for NVMe passthrough.  All drivers must have
161  * this structure as the first member of their request-private data.
162  */
163 struct nvme_request {
164 	struct nvme_command	*cmd;
165 	union nvme_result	result;
166 	u8			genctr;
167 	u8			retries;
168 	u8			flags;
169 	u16			status;
170 #ifdef CONFIG_NVME_MULTIPATH
171 	unsigned long		start_time;
172 #endif
173 	struct nvme_ctrl	*ctrl;
174 };
175 
176 /*
177  * Mark a bio as coming in through the mpath node.
178  */
179 #define REQ_NVME_MPATH		REQ_DRV
180 
181 enum {
182 	NVME_REQ_CANCELLED		= (1 << 0),
183 	NVME_REQ_USERCMD		= (1 << 1),
184 	NVME_MPATH_IO_STATS		= (1 << 2),
185 };
186 
187 static inline struct nvme_request *nvme_req(struct request *req)
188 {
189 	return blk_mq_rq_to_pdu(req);
190 }
191 
192 static inline u16 nvme_req_qid(struct request *req)
193 {
194 	if (!req->q->queuedata)
195 		return 0;
196 
197 	return req->mq_hctx->queue_num + 1;
198 }
199 
200 /* The below value is the specific amount of delay needed before checking
201  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
202  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
203  * found empirically.
204  */
205 #define NVME_QUIRK_DELAY_AMOUNT		2300
206 
207 /*
208  * enum nvme_ctrl_state: Controller state
209  *
210  * @NVME_CTRL_NEW:		New controller just allocated, initial state
211  * @NVME_CTRL_LIVE:		Controller is connected and I/O capable
212  * @NVME_CTRL_RESETTING:	Controller is resetting (or scheduled reset)
213  * @NVME_CTRL_CONNECTING:	Controller is disconnected, now connecting the
214  *				transport
215  * @NVME_CTRL_DELETING:		Controller is deleting (or scheduled deletion)
216  * @NVME_CTRL_DELETING_NOIO:	Controller is deleting and I/O is not
217  *				disabled/failed immediately. This state comes
218  * 				after all async event processing took place and
219  * 				before ns removal and the controller deletion
220  * 				progress
221  * @NVME_CTRL_DEAD:		Controller is non-present/unresponsive during
222  *				shutdown or removal. In this case we forcibly
223  *				kill all inflight I/O as they have no chance to
224  *				complete
225  */
226 enum nvme_ctrl_state {
227 	NVME_CTRL_NEW,
228 	NVME_CTRL_LIVE,
229 	NVME_CTRL_RESETTING,
230 	NVME_CTRL_CONNECTING,
231 	NVME_CTRL_DELETING,
232 	NVME_CTRL_DELETING_NOIO,
233 	NVME_CTRL_DEAD,
234 };
235 
236 struct nvme_fault_inject {
237 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
238 	struct fault_attr attr;
239 	struct dentry *parent;
240 	bool dont_retry;	/* DNR, do not retry */
241 	u16 status;		/* status code */
242 #endif
243 };
244 
245 enum nvme_ctrl_flags {
246 	NVME_CTRL_FAILFAST_EXPIRED	= 0,
247 	NVME_CTRL_ADMIN_Q_STOPPED	= 1,
248 	NVME_CTRL_STARTED_ONCE		= 2,
249 	NVME_CTRL_STOPPED		= 3,
250 };
251 
252 struct nvme_ctrl {
253 	bool comp_seen;
254 	enum nvme_ctrl_state state;
255 	bool identified;
256 	spinlock_t lock;
257 	struct mutex scan_lock;
258 	const struct nvme_ctrl_ops *ops;
259 	struct request_queue *admin_q;
260 	struct request_queue *connect_q;
261 	struct request_queue *fabrics_q;
262 	struct device *dev;
263 	int instance;
264 	int numa_node;
265 	struct blk_mq_tag_set *tagset;
266 	struct blk_mq_tag_set *admin_tagset;
267 	struct list_head namespaces;
268 	struct rw_semaphore namespaces_rwsem;
269 	struct device ctrl_device;
270 	struct device *device;	/* char device */
271 #ifdef CONFIG_NVME_HWMON
272 	struct device *hwmon_device;
273 #endif
274 	struct cdev cdev;
275 	struct work_struct reset_work;
276 	struct work_struct delete_work;
277 	wait_queue_head_t state_wq;
278 
279 	struct nvme_subsystem *subsys;
280 	struct list_head subsys_entry;
281 
282 	struct opal_dev *opal_dev;
283 
284 	char name[12];
285 	u16 cntlid;
286 
287 	u32 ctrl_config;
288 	u16 mtfa;
289 	u32 queue_count;
290 
291 	u64 cap;
292 	u32 max_hw_sectors;
293 	u32 max_segments;
294 	u32 max_integrity_segments;
295 	u32 max_discard_sectors;
296 	u32 max_discard_segments;
297 	u32 max_zeroes_sectors;
298 #ifdef CONFIG_BLK_DEV_ZONED
299 	u32 max_zone_append;
300 #endif
301 	u16 crdt[3];
302 	u16 oncs;
303 	u32 dmrsl;
304 	u16 oacs;
305 	u16 sqsize;
306 	u32 max_namespaces;
307 	atomic_t abort_limit;
308 	u8 vwc;
309 	u32 vs;
310 	u32 sgls;
311 	u16 kas;
312 	u8 npss;
313 	u8 apsta;
314 	u16 wctemp;
315 	u16 cctemp;
316 	u32 oaes;
317 	u32 aen_result;
318 	u32 ctratt;
319 	unsigned int shutdown_timeout;
320 	unsigned int kato;
321 	bool subsystem;
322 	unsigned long quirks;
323 	struct nvme_id_power_state psd[32];
324 	struct nvme_effects_log *effects;
325 	struct xarray cels;
326 	struct work_struct scan_work;
327 	struct work_struct async_event_work;
328 	struct delayed_work ka_work;
329 	struct delayed_work failfast_work;
330 	struct nvme_command ka_cmd;
331 	unsigned long ka_last_check_time;
332 	struct work_struct fw_act_work;
333 	unsigned long events;
334 
335 #ifdef CONFIG_NVME_MULTIPATH
336 	/* asymmetric namespace access: */
337 	u8 anacap;
338 	u8 anatt;
339 	u32 anagrpmax;
340 	u32 nanagrpid;
341 	struct mutex ana_lock;
342 	struct nvme_ana_rsp_hdr *ana_log_buf;
343 	size_t ana_log_size;
344 	struct timer_list anatt_timer;
345 	struct work_struct ana_work;
346 #endif
347 
348 #ifdef CONFIG_NVME_AUTH
349 	struct work_struct dhchap_auth_work;
350 	struct mutex dhchap_auth_mutex;
351 	struct nvme_dhchap_queue_context *dhchap_ctxs;
352 	struct nvme_dhchap_key *host_key;
353 	struct nvme_dhchap_key *ctrl_key;
354 	u16 transaction;
355 #endif
356 
357 	/* Power saving configuration */
358 	u64 ps_max_latency_us;
359 	bool apst_enabled;
360 
361 	/* PCIe only: */
362 	u32 hmpre;
363 	u32 hmmin;
364 	u32 hmminds;
365 	u16 hmmaxd;
366 
367 	/* Fabrics only */
368 	u32 ioccsz;
369 	u32 iorcsz;
370 	u16 icdoff;
371 	u16 maxcmd;
372 	int nr_reconnects;
373 	unsigned long flags;
374 	struct nvmf_ctrl_options *opts;
375 
376 	struct page *discard_page;
377 	unsigned long discard_page_busy;
378 
379 	struct nvme_fault_inject fault_inject;
380 
381 	enum nvme_ctrl_type cntrltype;
382 	enum nvme_dctype dctype;
383 };
384 
385 enum nvme_iopolicy {
386 	NVME_IOPOLICY_NUMA,
387 	NVME_IOPOLICY_RR,
388 };
389 
390 struct nvme_subsystem {
391 	int			instance;
392 	struct device		dev;
393 	/*
394 	 * Because we unregister the device on the last put we need
395 	 * a separate refcount.
396 	 */
397 	struct kref		ref;
398 	struct list_head	entry;
399 	struct mutex		lock;
400 	struct list_head	ctrls;
401 	struct list_head	nsheads;
402 	char			subnqn[NVMF_NQN_SIZE];
403 	char			serial[20];
404 	char			model[40];
405 	char			firmware_rev[8];
406 	u8			cmic;
407 	enum nvme_subsys_type	subtype;
408 	u16			vendor_id;
409 	u16			awupf;	/* 0's based awupf value. */
410 	struct ida		ns_ida;
411 #ifdef CONFIG_NVME_MULTIPATH
412 	enum nvme_iopolicy	iopolicy;
413 #endif
414 };
415 
416 /*
417  * Container structure for uniqueue namespace identifiers.
418  */
419 struct nvme_ns_ids {
420 	u8	eui64[8];
421 	u8	nguid[16];
422 	uuid_t	uuid;
423 	u8	csi;
424 };
425 
426 /*
427  * Anchor structure for namespaces.  There is one for each namespace in a
428  * NVMe subsystem that any of our controllers can see, and the namespace
429  * structure for each controller is chained of it.  For private namespaces
430  * there is a 1:1 relation to our namespace structures, that is ->list
431  * only ever has a single entry for private namespaces.
432  */
433 struct nvme_ns_head {
434 	struct list_head	list;
435 	struct srcu_struct      srcu;
436 	struct nvme_subsystem	*subsys;
437 	unsigned		ns_id;
438 	struct nvme_ns_ids	ids;
439 	struct list_head	entry;
440 	struct kref		ref;
441 	bool			shared;
442 	int			instance;
443 	struct nvme_effects_log *effects;
444 
445 	struct cdev		cdev;
446 	struct device		cdev_device;
447 
448 	struct gendisk		*disk;
449 #ifdef CONFIG_NVME_MULTIPATH
450 	struct bio_list		requeue_list;
451 	spinlock_t		requeue_lock;
452 	struct work_struct	requeue_work;
453 	struct mutex		lock;
454 	unsigned long		flags;
455 #define NVME_NSHEAD_DISK_LIVE	0
456 	struct nvme_ns __rcu	*current_path[];
457 #endif
458 };
459 
460 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
461 {
462 	return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
463 }
464 
465 enum nvme_ns_features {
466 	NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
467 	NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
468 	NVME_NS_DEAC,		/* DEAC bit in Write Zeores supported */
469 };
470 
471 struct nvme_ns {
472 	struct list_head list;
473 
474 	struct nvme_ctrl *ctrl;
475 	struct request_queue *queue;
476 	struct gendisk *disk;
477 #ifdef CONFIG_NVME_MULTIPATH
478 	enum nvme_ana_state ana_state;
479 	u32 ana_grpid;
480 #endif
481 	struct list_head siblings;
482 	struct kref kref;
483 	struct nvme_ns_head *head;
484 
485 	int lba_shift;
486 	u16 ms;
487 	u16 pi_size;
488 	u16 sgs;
489 	u32 sws;
490 	u8 pi_type;
491 	u8 guard_type;
492 #ifdef CONFIG_BLK_DEV_ZONED
493 	u64 zsze;
494 #endif
495 	unsigned long features;
496 	unsigned long flags;
497 #define NVME_NS_REMOVING	0
498 #define NVME_NS_ANA_PENDING	2
499 #define NVME_NS_FORCE_RO	3
500 #define NVME_NS_READY		4
501 
502 	struct cdev		cdev;
503 	struct device		cdev_device;
504 
505 	struct nvme_fault_inject fault_inject;
506 
507 };
508 
509 /* NVMe ns supports metadata actions by the controller (generate/strip) */
510 static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
511 {
512 	return ns->pi_type && ns->ms == ns->pi_size;
513 }
514 
515 struct nvme_ctrl_ops {
516 	const char *name;
517 	struct module *module;
518 	unsigned int flags;
519 #define NVME_F_FABRICS			(1 << 0)
520 #define NVME_F_METADATA_SUPPORTED	(1 << 1)
521 #define NVME_F_BLOCKING			(1 << 2)
522 
523 	const struct attribute_group **dev_attr_groups;
524 	int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
525 	int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
526 	int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
527 	void (*free_ctrl)(struct nvme_ctrl *ctrl);
528 	void (*submit_async_event)(struct nvme_ctrl *ctrl);
529 	void (*delete_ctrl)(struct nvme_ctrl *ctrl);
530 	void (*stop_ctrl)(struct nvme_ctrl *ctrl);
531 	int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
532 	void (*print_device_info)(struct nvme_ctrl *ctrl);
533 	bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl);
534 };
535 
536 /*
537  * nvme command_id is constructed as such:
538  * | xxxx | xxxxxxxxxxxx |
539  *   gen    request tag
540  */
541 #define nvme_genctr_mask(gen)			(gen & 0xf)
542 #define nvme_cid_install_genctr(gen)		(nvme_genctr_mask(gen) << 12)
543 #define nvme_genctr_from_cid(cid)		((cid & 0xf000) >> 12)
544 #define nvme_tag_from_cid(cid)			(cid & 0xfff)
545 
546 static inline u16 nvme_cid(struct request *rq)
547 {
548 	return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
549 }
550 
551 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
552 		u16 command_id)
553 {
554 	u8 genctr = nvme_genctr_from_cid(command_id);
555 	u16 tag = nvme_tag_from_cid(command_id);
556 	struct request *rq;
557 
558 	rq = blk_mq_tag_to_rq(tags, tag);
559 	if (unlikely(!rq)) {
560 		pr_err("could not locate request for tag %#x\n",
561 			tag);
562 		return NULL;
563 	}
564 	if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
565 		dev_err(nvme_req(rq)->ctrl->device,
566 			"request %#x genctr mismatch (got %#x expected %#x)\n",
567 			tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
568 		return NULL;
569 	}
570 	return rq;
571 }
572 
573 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
574                 u16 command_id)
575 {
576 	return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
577 }
578 
579 /*
580  * Return the length of the string without the space padding
581  */
582 static inline int nvme_strlen(char *s, int len)
583 {
584 	while (s[len - 1] == ' ')
585 		len--;
586 	return len;
587 }
588 
589 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl)
590 {
591 	struct nvme_subsystem *subsys = ctrl->subsys;
592 
593 	if (ctrl->ops->print_device_info) {
594 		ctrl->ops->print_device_info(ctrl);
595 		return;
596 	}
597 
598 	dev_err(ctrl->device,
599 		"VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id,
600 		nvme_strlen(subsys->model, sizeof(subsys->model)),
601 		subsys->model, nvme_strlen(subsys->firmware_rev,
602 					   sizeof(subsys->firmware_rev)),
603 		subsys->firmware_rev);
604 }
605 
606 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
607 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
608 			    const char *dev_name);
609 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
610 void nvme_should_fail(struct request *req);
611 #else
612 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
613 					  const char *dev_name)
614 {
615 }
616 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
617 {
618 }
619 static inline void nvme_should_fail(struct request *req) {}
620 #endif
621 
622 bool nvme_wait_reset(struct nvme_ctrl *ctrl);
623 int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
624 
625 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
626 {
627 	int ret;
628 
629 	if (!ctrl->subsystem)
630 		return -ENOTTY;
631 	if (!nvme_wait_reset(ctrl))
632 		return -EBUSY;
633 
634 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
635 	if (ret)
636 		return ret;
637 
638 	return nvme_try_sched_reset(ctrl);
639 }
640 
641 /*
642  * Convert a 512B sector number to a device logical block number.
643  */
644 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
645 {
646 	return sector >> (ns->lba_shift - SECTOR_SHIFT);
647 }
648 
649 /*
650  * Convert a device logical block number to a 512B sector number.
651  */
652 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
653 {
654 	return lba << (ns->lba_shift - SECTOR_SHIFT);
655 }
656 
657 /*
658  * Convert byte length to nvme's 0-based num dwords
659  */
660 static inline u32 nvme_bytes_to_numd(size_t len)
661 {
662 	return (len >> 2) - 1;
663 }
664 
665 static inline bool nvme_is_ana_error(u16 status)
666 {
667 	switch (status & 0x7ff) {
668 	case NVME_SC_ANA_TRANSITION:
669 	case NVME_SC_ANA_INACCESSIBLE:
670 	case NVME_SC_ANA_PERSISTENT_LOSS:
671 		return true;
672 	default:
673 		return false;
674 	}
675 }
676 
677 static inline bool nvme_is_path_error(u16 status)
678 {
679 	/* check for a status code type of 'path related status' */
680 	return (status & 0x700) == 0x300;
681 }
682 
683 /*
684  * Fill in the status and result information from the CQE, and then figure out
685  * if blk-mq will need to use IPI magic to complete the request, and if yes do
686  * so.  If not let the caller complete the request without an indirect function
687  * call.
688  */
689 static inline bool nvme_try_complete_req(struct request *req, __le16 status,
690 		union nvme_result result)
691 {
692 	struct nvme_request *rq = nvme_req(req);
693 	struct nvme_ctrl *ctrl = rq->ctrl;
694 
695 	if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
696 		rq->genctr++;
697 
698 	rq->status = le16_to_cpu(status) >> 1;
699 	rq->result = result;
700 	/* inject error when permitted by fault injection framework */
701 	nvme_should_fail(req);
702 	if (unlikely(blk_should_fake_timeout(req->q)))
703 		return true;
704 	return blk_mq_complete_request_remote(req);
705 }
706 
707 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
708 {
709 	get_device(ctrl->device);
710 }
711 
712 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
713 {
714 	put_device(ctrl->device);
715 }
716 
717 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
718 {
719 	return !qid &&
720 		nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
721 }
722 
723 void nvme_complete_rq(struct request *req);
724 void nvme_complete_batch_req(struct request *req);
725 
726 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
727 						void (*fn)(struct request *rq))
728 {
729 	struct request *req;
730 
731 	rq_list_for_each(&iob->req_list, req) {
732 		fn(req);
733 		nvme_complete_batch_req(req);
734 	}
735 	blk_mq_end_request_batch(iob);
736 }
737 
738 blk_status_t nvme_host_path_error(struct request *req);
739 bool nvme_cancel_request(struct request *req, void *data);
740 void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
741 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
742 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
743 		enum nvme_ctrl_state new_state);
744 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown);
745 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
746 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
747 		const struct nvme_ctrl_ops *ops, unsigned long quirks);
748 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
749 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
750 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
751 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended);
752 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
753 		const struct blk_mq_ops *ops, unsigned int cmd_size);
754 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl);
755 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
756 		const struct blk_mq_ops *ops, unsigned int nr_maps,
757 		unsigned int cmd_size);
758 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl);
759 
760 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
761 
762 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
763 		volatile union nvme_result *res);
764 
765 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl);
766 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl);
767 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl);
768 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl);
769 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl);
770 void nvme_sync_queues(struct nvme_ctrl *ctrl);
771 void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
772 void nvme_unfreeze(struct nvme_ctrl *ctrl);
773 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
774 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
775 void nvme_start_freeze(struct nvme_ctrl *ctrl);
776 
777 static inline enum req_op nvme_req_op(struct nvme_command *cmd)
778 {
779 	return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
780 }
781 
782 #define NVME_QID_ANY -1
783 void nvme_init_request(struct request *req, struct nvme_command *cmd);
784 void nvme_cleanup_cmd(struct request *req);
785 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
786 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
787 		struct request *req);
788 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
789 		bool queue_live);
790 
791 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
792 		bool queue_live)
793 {
794 	if (likely(ctrl->state == NVME_CTRL_LIVE))
795 		return true;
796 	if (ctrl->ops->flags & NVME_F_FABRICS &&
797 	    ctrl->state == NVME_CTRL_DELETING)
798 		return queue_live;
799 	return __nvme_check_ready(ctrl, rq, queue_live);
800 }
801 
802 /*
803  * NSID shall be unique for all shared namespaces, or if at least one of the
804  * following conditions is met:
805  *   1. Namespace Management is supported by the controller
806  *   2. ANA is supported by the controller
807  *   3. NVM Set are supported by the controller
808  *
809  * In other case, private namespace are not required to report a unique NSID.
810  */
811 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
812 		struct nvme_ns_head *head)
813 {
814 	return head->shared ||
815 		(ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
816 		(ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
817 		(ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
818 }
819 
820 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
821 		void *buf, unsigned bufflen);
822 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
823 		union nvme_result *result, void *buffer, unsigned bufflen,
824 		int qid, int at_head,
825 		blk_mq_req_flags_t flags);
826 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
827 		      unsigned int dword11, void *buffer, size_t buflen,
828 		      u32 *result);
829 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
830 		      unsigned int dword11, void *buffer, size_t buflen,
831 		      u32 *result);
832 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
833 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
834 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
835 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
836 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
837 void nvme_queue_scan(struct nvme_ctrl *ctrl);
838 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
839 		void *log, size_t size, u64 offset);
840 bool nvme_tryget_ns_head(struct nvme_ns_head *head);
841 void nvme_put_ns_head(struct nvme_ns_head *head);
842 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
843 		const struct file_operations *fops, struct module *owner);
844 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
845 int nvme_ioctl(struct block_device *bdev, fmode_t mode,
846 		unsigned int cmd, unsigned long arg);
847 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
848 int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode,
849 		unsigned int cmd, unsigned long arg);
850 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
851 		unsigned long arg);
852 long nvme_dev_ioctl(struct file *file, unsigned int cmd,
853 		unsigned long arg);
854 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
855 		struct io_comp_batch *iob, unsigned int poll_flags);
856 int nvme_ns_head_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
857 		struct io_comp_batch *iob, unsigned int poll_flags);
858 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd,
859 		unsigned int issue_flags);
860 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd,
861 		unsigned int issue_flags);
862 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
863 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags);
864 
865 extern const struct attribute_group *nvme_ns_id_attr_groups[];
866 extern const struct pr_ops nvme_pr_ops;
867 extern const struct block_device_operations nvme_ns_head_ops;
868 extern const struct attribute_group nvme_dev_attrs_group;
869 
870 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
871 #ifdef CONFIG_NVME_MULTIPATH
872 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
873 {
874 	return ctrl->ana_log_buf != NULL;
875 }
876 
877 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
878 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
879 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
880 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
881 void nvme_failover_req(struct request *req);
882 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
883 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
884 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid);
885 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
886 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
887 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
888 void nvme_mpath_update(struct nvme_ctrl *ctrl);
889 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
890 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
891 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
892 void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
893 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
894 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
895 void nvme_mpath_start_request(struct request *rq);
896 void nvme_mpath_end_request(struct request *rq);
897 
898 static inline void nvme_trace_bio_complete(struct request *req)
899 {
900 	struct nvme_ns *ns = req->q->queuedata;
901 
902 	if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio)
903 		trace_block_bio_complete(ns->head->disk->queue, req->bio);
904 }
905 
906 extern bool multipath;
907 extern struct device_attribute dev_attr_ana_grpid;
908 extern struct device_attribute dev_attr_ana_state;
909 extern struct device_attribute subsys_attr_iopolicy;
910 
911 #else
912 #define multipath false
913 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
914 {
915 	return false;
916 }
917 static inline void nvme_failover_req(struct request *req)
918 {
919 }
920 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
921 {
922 }
923 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
924 		struct nvme_ns_head *head)
925 {
926 	return 0;
927 }
928 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid)
929 {
930 }
931 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
932 {
933 }
934 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
935 {
936 	return false;
937 }
938 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
939 {
940 }
941 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
942 {
943 }
944 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
945 {
946 }
947 static inline void nvme_trace_bio_complete(struct request *req)
948 {
949 }
950 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
951 {
952 }
953 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
954 		struct nvme_id_ctrl *id)
955 {
956 	if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
957 		dev_warn(ctrl->device,
958 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
959 	return 0;
960 }
961 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
962 {
963 }
964 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
965 {
966 }
967 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
968 {
969 }
970 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
971 {
972 }
973 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
974 {
975 }
976 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
977 {
978 }
979 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
980 {
981 }
982 static inline void nvme_mpath_start_request(struct request *rq)
983 {
984 }
985 static inline void nvme_mpath_end_request(struct request *rq)
986 {
987 }
988 #endif /* CONFIG_NVME_MULTIPATH */
989 
990 int nvme_revalidate_zones(struct nvme_ns *ns);
991 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
992 		unsigned int nr_zones, report_zones_cb cb, void *data);
993 #ifdef CONFIG_BLK_DEV_ZONED
994 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
995 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
996 				       struct nvme_command *cmnd,
997 				       enum nvme_zone_mgmt_action action);
998 #else
999 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
1000 		struct request *req, struct nvme_command *cmnd,
1001 		enum nvme_zone_mgmt_action action)
1002 {
1003 	return BLK_STS_NOTSUPP;
1004 }
1005 
1006 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
1007 {
1008 	dev_warn(ns->ctrl->device,
1009 		 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
1010 	return -EPROTONOSUPPORT;
1011 }
1012 #endif
1013 
1014 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
1015 {
1016 	return dev_to_disk(dev)->private_data;
1017 }
1018 
1019 #ifdef CONFIG_NVME_HWMON
1020 int nvme_hwmon_init(struct nvme_ctrl *ctrl);
1021 void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
1022 #else
1023 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
1024 {
1025 	return 0;
1026 }
1027 
1028 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
1029 {
1030 }
1031 #endif
1032 
1033 static inline void nvme_start_request(struct request *rq)
1034 {
1035 	if (rq->cmd_flags & REQ_NVME_MPATH)
1036 		nvme_mpath_start_request(rq);
1037 	blk_mq_start_request(rq);
1038 }
1039 
1040 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
1041 {
1042 	return ctrl->sgls & ((1 << 0) | (1 << 1));
1043 }
1044 
1045 #ifdef CONFIG_NVME_AUTH
1046 int __init nvme_init_auth(void);
1047 void __exit nvme_exit_auth(void);
1048 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl);
1049 void nvme_auth_stop(struct nvme_ctrl *ctrl);
1050 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid);
1051 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid);
1052 void nvme_auth_free(struct nvme_ctrl *ctrl);
1053 #else
1054 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl)
1055 {
1056 	return 0;
1057 }
1058 static inline int __init nvme_init_auth(void)
1059 {
1060 	return 0;
1061 }
1062 static inline void __exit nvme_exit_auth(void)
1063 {
1064 }
1065 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {};
1066 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid)
1067 {
1068 	return -EPROTONOSUPPORT;
1069 }
1070 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid)
1071 {
1072 	return NVME_SC_AUTH_REQUIRED;
1073 }
1074 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {};
1075 #endif
1076 
1077 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1078 			 u8 opcode);
1079 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode);
1080 int nvme_execute_rq(struct request *rq, bool at_head);
1081 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1082 		       struct nvme_command *cmd, int status);
1083 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
1084 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
1085 void nvme_put_ns(struct nvme_ns *ns);
1086 
1087 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
1088 {
1089 	return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
1090 }
1091 
1092 #ifdef CONFIG_NVME_VERBOSE_ERRORS
1093 const unsigned char *nvme_get_error_status_str(u16 status);
1094 const unsigned char *nvme_get_opcode_str(u8 opcode);
1095 const unsigned char *nvme_get_admin_opcode_str(u8 opcode);
1096 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode);
1097 #else /* CONFIG_NVME_VERBOSE_ERRORS */
1098 static inline const unsigned char *nvme_get_error_status_str(u16 status)
1099 {
1100 	return "I/O Error";
1101 }
1102 static inline const unsigned char *nvme_get_opcode_str(u8 opcode)
1103 {
1104 	return "I/O Cmd";
1105 }
1106 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
1107 {
1108 	return "Admin Cmd";
1109 }
1110 
1111 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode)
1112 {
1113 	return "Fabrics Cmd";
1114 }
1115 #endif /* CONFIG_NVME_VERBOSE_ERRORS */
1116 
1117 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype)
1118 {
1119 	if (opcode == nvme_fabrics_command)
1120 		return nvme_get_fabrics_opcode_str(fctype);
1121 	return qid ? nvme_get_opcode_str(opcode) :
1122 		nvme_get_admin_opcode_str(opcode);
1123 }
1124 #endif /* _NVME_H */
1125