1 /* 2 * Copyright (c) 2011-2014, Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 */ 13 14 #ifndef _NVME_H 15 #define _NVME_H 16 17 #include <linux/nvme.h> 18 #include <linux/pci.h> 19 #include <linux/kref.h> 20 #include <linux/blk-mq.h> 21 #include <linux/lightnvm.h> 22 #include <linux/sed-opal.h> 23 24 extern unsigned int nvme_io_timeout; 25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 26 27 extern unsigned int admin_timeout; 28 #define ADMIN_TIMEOUT (admin_timeout * HZ) 29 30 #define NVME_DEFAULT_KATO 5 31 #define NVME_KATO_GRACE 10 32 33 extern struct workqueue_struct *nvme_wq; 34 35 enum { 36 NVME_NS_LBA = 0, 37 NVME_NS_LIGHTNVM = 1, 38 }; 39 40 /* 41 * List of workarounds for devices that required behavior not specified in 42 * the standard. 43 */ 44 enum nvme_quirks { 45 /* 46 * Prefers I/O aligned to a stripe size specified in a vendor 47 * specific Identify field. 48 */ 49 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 50 51 /* 52 * The controller doesn't handle Identify value others than 0 or 1 53 * correctly. 54 */ 55 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 56 57 /* 58 * The controller deterministically returns O's on reads to 59 * logical blocks that deallocate was called on. 60 */ 61 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 62 63 /* 64 * The controller needs a delay before starts checking the device 65 * readiness, which is done by reading the NVME_CSTS_RDY bit. 66 */ 67 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 68 69 /* 70 * APST should not be used. 71 */ 72 NVME_QUIRK_NO_APST = (1 << 4), 73 74 /* 75 * The deepest sleep state should not be used. 76 */ 77 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 78 79 /* 80 * Supports the LighNVM command set if indicated in vs[1]. 81 */ 82 NVME_QUIRK_LIGHTNVM = (1 << 6), 83 }; 84 85 /* 86 * Common request structure for NVMe passthrough. All drivers must have 87 * this structure as the first member of their request-private data. 88 */ 89 struct nvme_request { 90 struct nvme_command *cmd; 91 union nvme_result result; 92 u8 retries; 93 u8 flags; 94 u16 status; 95 }; 96 97 enum { 98 NVME_REQ_CANCELLED = (1 << 0), 99 }; 100 101 static inline struct nvme_request *nvme_req(struct request *req) 102 { 103 return blk_mq_rq_to_pdu(req); 104 } 105 106 /* The below value is the specific amount of delay needed before checking 107 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 108 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 109 * found empirically. 110 */ 111 #define NVME_QUIRK_DELAY_AMOUNT 2000 112 113 enum nvme_ctrl_state { 114 NVME_CTRL_NEW, 115 NVME_CTRL_LIVE, 116 NVME_CTRL_RESETTING, 117 NVME_CTRL_RECONNECTING, 118 NVME_CTRL_DELETING, 119 NVME_CTRL_DEAD, 120 }; 121 122 struct nvme_ctrl { 123 enum nvme_ctrl_state state; 124 bool identified; 125 spinlock_t lock; 126 const struct nvme_ctrl_ops *ops; 127 struct request_queue *admin_q; 128 struct request_queue *connect_q; 129 struct device *dev; 130 struct kref kref; 131 int instance; 132 struct blk_mq_tag_set *tagset; 133 struct blk_mq_tag_set *admin_tagset; 134 struct list_head namespaces; 135 struct mutex namespaces_mutex; 136 struct device *device; /* char device */ 137 struct list_head node; 138 struct ida ns_ida; 139 struct work_struct reset_work; 140 141 struct opal_dev *opal_dev; 142 143 char name[12]; 144 char serial[20]; 145 char model[40]; 146 char firmware_rev[8]; 147 char subnqn[NVMF_NQN_SIZE]; 148 u16 cntlid; 149 150 u32 ctrl_config; 151 u16 mtfa; 152 u32 queue_count; 153 154 u64 cap; 155 u32 page_size; 156 u32 max_hw_sectors; 157 u16 oncs; 158 u16 vid; 159 u16 oacs; 160 u16 nssa; 161 u16 nr_streams; 162 atomic_t abort_limit; 163 u8 event_limit; 164 u8 vwc; 165 u32 vs; 166 u32 sgls; 167 u16 kas; 168 u8 npss; 169 u8 apsta; 170 unsigned int shutdown_timeout; 171 unsigned int kato; 172 bool subsystem; 173 unsigned long quirks; 174 struct nvme_id_power_state psd[32]; 175 struct work_struct scan_work; 176 struct work_struct async_event_work; 177 struct delayed_work ka_work; 178 struct work_struct fw_act_work; 179 180 /* Power saving configuration */ 181 u64 ps_max_latency_us; 182 bool apst_enabled; 183 184 /* PCIe only: */ 185 u32 hmpre; 186 u32 hmmin; 187 u32 hmminds; 188 u16 hmmaxd; 189 190 /* Fabrics only */ 191 u16 sqsize; 192 u32 ioccsz; 193 u32 iorcsz; 194 u16 icdoff; 195 u16 maxcmd; 196 int nr_reconnects; 197 struct nvmf_ctrl_options *opts; 198 }; 199 200 struct nvme_ns { 201 struct list_head list; 202 203 struct nvme_ctrl *ctrl; 204 struct request_queue *queue; 205 struct gendisk *disk; 206 struct nvm_dev *ndev; 207 struct kref kref; 208 int instance; 209 210 u8 eui[8]; 211 u8 nguid[16]; 212 uuid_t uuid; 213 214 unsigned ns_id; 215 int lba_shift; 216 u16 ms; 217 u16 sgs; 218 u32 sws; 219 bool ext; 220 u8 pi_type; 221 unsigned long flags; 222 #define NVME_NS_REMOVING 0 223 #define NVME_NS_DEAD 1 224 u16 noiob; 225 }; 226 227 struct nvme_ctrl_ops { 228 const char *name; 229 struct module *module; 230 unsigned int flags; 231 #define NVME_F_FABRICS (1 << 0) 232 #define NVME_F_METADATA_SUPPORTED (1 << 1) 233 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 234 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 235 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 236 void (*free_ctrl)(struct nvme_ctrl *ctrl); 237 void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx); 238 int (*delete_ctrl)(struct nvme_ctrl *ctrl); 239 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 240 int (*reinit_request)(void *data, struct request *rq); 241 }; 242 243 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) 244 { 245 u32 val = 0; 246 247 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) 248 return false; 249 return val & NVME_CSTS_RDY; 250 } 251 252 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 253 { 254 if (!ctrl->subsystem) 255 return -ENOTTY; 256 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 257 } 258 259 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 260 { 261 return (sector >> (ns->lba_shift - 9)); 262 } 263 264 static inline void nvme_cleanup_cmd(struct request *req) 265 { 266 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 267 kfree(page_address(req->special_vec.bv_page) + 268 req->special_vec.bv_offset); 269 } 270 } 271 272 static inline void nvme_end_request(struct request *req, __le16 status, 273 union nvme_result result) 274 { 275 struct nvme_request *rq = nvme_req(req); 276 277 rq->status = le16_to_cpu(status) >> 1; 278 rq->result = result; 279 blk_mq_complete_request(req); 280 } 281 282 void nvme_complete_rq(struct request *req); 283 void nvme_cancel_request(struct request *req, void *data, bool reserved); 284 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 285 enum nvme_ctrl_state new_state); 286 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 287 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 288 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 289 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 290 const struct nvme_ctrl_ops *ops, unsigned long quirks); 291 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 292 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 293 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 294 void nvme_put_ctrl(struct nvme_ctrl *ctrl); 295 int nvme_init_identify(struct nvme_ctrl *ctrl); 296 297 void nvme_queue_scan(struct nvme_ctrl *ctrl); 298 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 299 300 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 301 bool send); 302 303 #define NVME_NR_AERS 1 304 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 305 union nvme_result *res); 306 void nvme_queue_async_events(struct nvme_ctrl *ctrl); 307 308 void nvme_stop_queues(struct nvme_ctrl *ctrl); 309 void nvme_start_queues(struct nvme_ctrl *ctrl); 310 void nvme_kill_queues(struct nvme_ctrl *ctrl); 311 void nvme_unfreeze(struct nvme_ctrl *ctrl); 312 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 313 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 314 void nvme_start_freeze(struct nvme_ctrl *ctrl); 315 int nvme_reinit_tagset(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set); 316 317 #define NVME_QID_ANY -1 318 struct request *nvme_alloc_request(struct request_queue *q, 319 struct nvme_command *cmd, unsigned int flags, int qid); 320 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 321 struct nvme_command *cmd); 322 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 323 void *buf, unsigned bufflen); 324 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 325 union nvme_result *result, void *buffer, unsigned bufflen, 326 unsigned timeout, int qid, int at_head, int flags); 327 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 328 void nvme_start_keep_alive(struct nvme_ctrl *ctrl); 329 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 330 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 331 332 #ifdef CONFIG_NVM 333 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 334 void nvme_nvm_unregister(struct nvme_ns *ns); 335 int nvme_nvm_register_sysfs(struct nvme_ns *ns); 336 void nvme_nvm_unregister_sysfs(struct nvme_ns *ns); 337 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 338 #else 339 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 340 int node) 341 { 342 return 0; 343 } 344 345 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 346 static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns) 347 { 348 return 0; 349 } 350 static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {}; 351 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 352 unsigned long arg) 353 { 354 return -ENOTTY; 355 } 356 #endif /* CONFIG_NVM */ 357 358 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 359 { 360 return dev_to_disk(dev)->private_data; 361 } 362 363 int __init nvme_core_init(void); 364 void nvme_core_exit(void); 365 366 #endif /* _NVME_H */ 367