xref: /openbmc/linux/drivers/nvme/host/nvme.h (revision 2d972b6a)
1 /*
2  * Copyright (c) 2011-2014, Intel Corporation.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  */
13 
14 #ifndef _NVME_H
15 #define _NVME_H
16 
17 #include <linux/nvme.h>
18 #include <linux/cdev.h>
19 #include <linux/pci.h>
20 #include <linux/kref.h>
21 #include <linux/blk-mq.h>
22 #include <linux/lightnvm.h>
23 #include <linux/sed-opal.h>
24 #include <linux/fault-inject.h>
25 
26 extern unsigned int nvme_io_timeout;
27 #define NVME_IO_TIMEOUT	(nvme_io_timeout * HZ)
28 
29 extern unsigned int admin_timeout;
30 #define ADMIN_TIMEOUT	(admin_timeout * HZ)
31 
32 #define NVME_DEFAULT_KATO	5
33 #define NVME_KATO_GRACE		10
34 
35 extern struct workqueue_struct *nvme_wq;
36 extern struct workqueue_struct *nvme_reset_wq;
37 extern struct workqueue_struct *nvme_delete_wq;
38 
39 enum {
40 	NVME_NS_LBA		= 0,
41 	NVME_NS_LIGHTNVM	= 1,
42 };
43 
44 /*
45  * List of workarounds for devices that required behavior not specified in
46  * the standard.
47  */
48 enum nvme_quirks {
49 	/*
50 	 * Prefers I/O aligned to a stripe size specified in a vendor
51 	 * specific Identify field.
52 	 */
53 	NVME_QUIRK_STRIPE_SIZE			= (1 << 0),
54 
55 	/*
56 	 * The controller doesn't handle Identify value others than 0 or 1
57 	 * correctly.
58 	 */
59 	NVME_QUIRK_IDENTIFY_CNS			= (1 << 1),
60 
61 	/*
62 	 * The controller deterministically returns O's on reads to
63 	 * logical blocks that deallocate was called on.
64 	 */
65 	NVME_QUIRK_DEALLOCATE_ZEROES		= (1 << 2),
66 
67 	/*
68 	 * The controller needs a delay before starts checking the device
69 	 * readiness, which is done by reading the NVME_CSTS_RDY bit.
70 	 */
71 	NVME_QUIRK_DELAY_BEFORE_CHK_RDY		= (1 << 3),
72 
73 	/*
74 	 * APST should not be used.
75 	 */
76 	NVME_QUIRK_NO_APST			= (1 << 4),
77 
78 	/*
79 	 * The deepest sleep state should not be used.
80 	 */
81 	NVME_QUIRK_NO_DEEPEST_PS		= (1 << 5),
82 
83 	/*
84 	 * Supports the LighNVM command set if indicated in vs[1].
85 	 */
86 	NVME_QUIRK_LIGHTNVM			= (1 << 6),
87 };
88 
89 /*
90  * Common request structure for NVMe passthrough.  All drivers must have
91  * this structure as the first member of their request-private data.
92  */
93 struct nvme_request {
94 	struct nvme_command	*cmd;
95 	union nvme_result	result;
96 	u8			retries;
97 	u8			flags;
98 	u16			status;
99 };
100 
101 /*
102  * Mark a bio as coming in through the mpath node.
103  */
104 #define REQ_NVME_MPATH		REQ_DRV
105 
106 enum {
107 	NVME_REQ_CANCELLED		= (1 << 0),
108 	NVME_REQ_USERCMD		= (1 << 1),
109 };
110 
111 static inline struct nvme_request *nvme_req(struct request *req)
112 {
113 	return blk_mq_rq_to_pdu(req);
114 }
115 
116 /* The below value is the specific amount of delay needed before checking
117  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
118  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
119  * found empirically.
120  */
121 #define NVME_QUIRK_DELAY_AMOUNT		2300
122 
123 enum nvme_ctrl_state {
124 	NVME_CTRL_NEW,
125 	NVME_CTRL_LIVE,
126 	NVME_CTRL_ADMIN_ONLY,    /* Only admin queue live */
127 	NVME_CTRL_RESETTING,
128 	NVME_CTRL_CONNECTING,
129 	NVME_CTRL_DELETING,
130 	NVME_CTRL_DEAD,
131 };
132 
133 struct nvme_ctrl {
134 	enum nvme_ctrl_state state;
135 	bool identified;
136 	spinlock_t lock;
137 	const struct nvme_ctrl_ops *ops;
138 	struct request_queue *admin_q;
139 	struct request_queue *connect_q;
140 	struct device *dev;
141 	int instance;
142 	struct blk_mq_tag_set *tagset;
143 	struct blk_mq_tag_set *admin_tagset;
144 	struct list_head namespaces;
145 	struct rw_semaphore namespaces_rwsem;
146 	struct device ctrl_device;
147 	struct device *device;	/* char device */
148 	struct cdev cdev;
149 	struct work_struct reset_work;
150 	struct work_struct delete_work;
151 
152 	struct nvme_subsystem *subsys;
153 	struct list_head subsys_entry;
154 
155 	struct opal_dev *opal_dev;
156 
157 	char name[12];
158 	u16 cntlid;
159 
160 	u32 ctrl_config;
161 	u16 mtfa;
162 	u32 queue_count;
163 
164 	u64 cap;
165 	u32 page_size;
166 	u32 max_hw_sectors;
167 	u16 oncs;
168 	u16 oacs;
169 	u16 nssa;
170 	u16 nr_streams;
171 	atomic_t abort_limit;
172 	u8 vwc;
173 	u32 vs;
174 	u32 sgls;
175 	u16 kas;
176 	u8 npss;
177 	u8 apsta;
178 	u32 aen_result;
179 	unsigned int shutdown_timeout;
180 	unsigned int kato;
181 	bool subsystem;
182 	unsigned long quirks;
183 	struct nvme_id_power_state psd[32];
184 	struct nvme_effects_log *effects;
185 	struct work_struct scan_work;
186 	struct work_struct async_event_work;
187 	struct delayed_work ka_work;
188 	struct nvme_command ka_cmd;
189 	struct work_struct fw_act_work;
190 
191 	/* Power saving configuration */
192 	u64 ps_max_latency_us;
193 	bool apst_enabled;
194 
195 	/* PCIe only: */
196 	u32 hmpre;
197 	u32 hmmin;
198 	u32 hmminds;
199 	u16 hmmaxd;
200 
201 	/* Fabrics only */
202 	u16 sqsize;
203 	u32 ioccsz;
204 	u32 iorcsz;
205 	u16 icdoff;
206 	u16 maxcmd;
207 	int nr_reconnects;
208 	struct nvmf_ctrl_options *opts;
209 };
210 
211 struct nvme_subsystem {
212 	int			instance;
213 	struct device		dev;
214 	/*
215 	 * Because we unregister the device on the last put we need
216 	 * a separate refcount.
217 	 */
218 	struct kref		ref;
219 	struct list_head	entry;
220 	struct mutex		lock;
221 	struct list_head	ctrls;
222 	struct list_head	nsheads;
223 	char			subnqn[NVMF_NQN_SIZE];
224 	char			serial[20];
225 	char			model[40];
226 	char			firmware_rev[8];
227 	u8			cmic;
228 	u16			vendor_id;
229 	struct ida		ns_ida;
230 };
231 
232 /*
233  * Container structure for uniqueue namespace identifiers.
234  */
235 struct nvme_ns_ids {
236 	u8	eui64[8];
237 	u8	nguid[16];
238 	uuid_t	uuid;
239 };
240 
241 /*
242  * Anchor structure for namespaces.  There is one for each namespace in a
243  * NVMe subsystem that any of our controllers can see, and the namespace
244  * structure for each controller is chained of it.  For private namespaces
245  * there is a 1:1 relation to our namespace structures, that is ->list
246  * only ever has a single entry for private namespaces.
247  */
248 struct nvme_ns_head {
249 #ifdef CONFIG_NVME_MULTIPATH
250 	struct gendisk		*disk;
251 	struct nvme_ns __rcu	*current_path;
252 	struct bio_list		requeue_list;
253 	spinlock_t		requeue_lock;
254 	struct work_struct	requeue_work;
255 #endif
256 	struct list_head	list;
257 	struct srcu_struct      srcu;
258 	struct nvme_subsystem	*subsys;
259 	unsigned		ns_id;
260 	struct nvme_ns_ids	ids;
261 	struct list_head	entry;
262 	struct kref		ref;
263 	int			instance;
264 };
265 
266 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
267 struct nvme_fault_inject {
268 	struct fault_attr attr;
269 	struct dentry *parent;
270 	bool dont_retry;	/* DNR, do not retry */
271 	u16 status;		/* status code */
272 };
273 #endif
274 
275 struct nvme_ns {
276 	struct list_head list;
277 
278 	struct nvme_ctrl *ctrl;
279 	struct request_queue *queue;
280 	struct gendisk *disk;
281 	struct list_head siblings;
282 	struct nvm_dev *ndev;
283 	struct kref kref;
284 	struct nvme_ns_head *head;
285 
286 	int lba_shift;
287 	u16 ms;
288 	u16 sgs;
289 	u32 sws;
290 	bool ext;
291 	u8 pi_type;
292 	unsigned long flags;
293 #define NVME_NS_REMOVING 0
294 #define NVME_NS_DEAD     1
295 	u16 noiob;
296 
297 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
298 	struct nvme_fault_inject fault_inject;
299 #endif
300 
301 };
302 
303 struct nvme_ctrl_ops {
304 	const char *name;
305 	struct module *module;
306 	unsigned int flags;
307 #define NVME_F_FABRICS			(1 << 0)
308 #define NVME_F_METADATA_SUPPORTED	(1 << 1)
309 	int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
310 	int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
311 	int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
312 	void (*free_ctrl)(struct nvme_ctrl *ctrl);
313 	void (*submit_async_event)(struct nvme_ctrl *ctrl);
314 	void (*delete_ctrl)(struct nvme_ctrl *ctrl);
315 	int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
316 	int (*reinit_request)(void *data, struct request *rq);
317 	void (*stop_ctrl)(struct nvme_ctrl *ctrl);
318 };
319 
320 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
321 void nvme_fault_inject_init(struct nvme_ns *ns);
322 void nvme_fault_inject_fini(struct nvme_ns *ns);
323 void nvme_should_fail(struct request *req);
324 #else
325 static inline void nvme_fault_inject_init(struct nvme_ns *ns) {}
326 static inline void nvme_fault_inject_fini(struct nvme_ns *ns) {}
327 static inline void nvme_should_fail(struct request *req) {}
328 #endif
329 
330 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
331 {
332 	u32 val = 0;
333 
334 	if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
335 		return false;
336 	return val & NVME_CSTS_RDY;
337 }
338 
339 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
340 {
341 	if (!ctrl->subsystem)
342 		return -ENOTTY;
343 	return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
344 }
345 
346 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
347 {
348 	return (sector >> (ns->lba_shift - 9));
349 }
350 
351 static inline void nvme_cleanup_cmd(struct request *req)
352 {
353 	if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
354 		kfree(page_address(req->special_vec.bv_page) +
355 		      req->special_vec.bv_offset);
356 	}
357 }
358 
359 static inline void nvme_end_request(struct request *req, __le16 status,
360 		union nvme_result result)
361 {
362 	struct nvme_request *rq = nvme_req(req);
363 
364 	rq->status = le16_to_cpu(status) >> 1;
365 	rq->result = result;
366 	/* inject error when permitted by fault injection framework */
367 	nvme_should_fail(req);
368 	blk_mq_complete_request(req);
369 }
370 
371 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
372 {
373 	get_device(ctrl->device);
374 }
375 
376 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
377 {
378 	put_device(ctrl->device);
379 }
380 
381 void nvme_complete_rq(struct request *req);
382 void nvme_cancel_request(struct request *req, void *data, bool reserved);
383 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
384 		enum nvme_ctrl_state new_state);
385 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
386 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
387 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
388 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
389 		const struct nvme_ctrl_ops *ops, unsigned long quirks);
390 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
391 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
392 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
393 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
394 int nvme_init_identify(struct nvme_ctrl *ctrl);
395 
396 void nvme_queue_scan(struct nvme_ctrl *ctrl);
397 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
398 
399 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
400 		bool send);
401 
402 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
403 		union nvme_result *res);
404 
405 void nvme_stop_queues(struct nvme_ctrl *ctrl);
406 void nvme_start_queues(struct nvme_ctrl *ctrl);
407 void nvme_kill_queues(struct nvme_ctrl *ctrl);
408 void nvme_unfreeze(struct nvme_ctrl *ctrl);
409 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
410 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
411 void nvme_start_freeze(struct nvme_ctrl *ctrl);
412 int nvme_reinit_tagset(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set);
413 
414 #define NVME_QID_ANY -1
415 struct request *nvme_alloc_request(struct request_queue *q,
416 		struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid);
417 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
418 		struct nvme_command *cmd);
419 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
420 		void *buf, unsigned bufflen);
421 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
422 		union nvme_result *result, void *buffer, unsigned bufflen,
423 		unsigned timeout, int qid, int at_head,
424 		blk_mq_req_flags_t flags);
425 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
426 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
427 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
428 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
429 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
430 int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
431 
432 int nvme_get_log_ext(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
433 		u8 log_page, void *log, size_t size, u64 offset);
434 
435 extern const struct attribute_group nvme_ns_id_attr_group;
436 extern const struct block_device_operations nvme_ns_head_ops;
437 
438 #ifdef CONFIG_NVME_MULTIPATH
439 void nvme_failover_req(struct request *req);
440 bool nvme_req_needs_failover(struct request *req, blk_status_t error);
441 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
442 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
443 void nvme_mpath_add_disk(struct nvme_ns_head *head);
444 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
445 
446 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
447 {
448 	struct nvme_ns_head *head = ns->head;
449 
450 	if (head && ns == srcu_dereference(head->current_path, &head->srcu))
451 		rcu_assign_pointer(head->current_path, NULL);
452 }
453 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
454 
455 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
456 {
457 	struct nvme_ns_head *head = ns->head;
458 
459 	if (head->disk && list_empty(&head->list))
460 		kblockd_schedule_work(&head->requeue_work);
461 }
462 
463 #else
464 static inline void nvme_failover_req(struct request *req)
465 {
466 }
467 static inline bool nvme_req_needs_failover(struct request *req,
468 					   blk_status_t error)
469 {
470 	return false;
471 }
472 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
473 {
474 }
475 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
476 		struct nvme_ns_head *head)
477 {
478 	return 0;
479 }
480 static inline void nvme_mpath_add_disk(struct nvme_ns_head *head)
481 {
482 }
483 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
484 {
485 }
486 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
487 {
488 }
489 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
490 {
491 }
492 #endif /* CONFIG_NVME_MULTIPATH */
493 
494 #ifdef CONFIG_NVM
495 void nvme_nvm_update_nvm_info(struct nvme_ns *ns);
496 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
497 void nvme_nvm_unregister(struct nvme_ns *ns);
498 int nvme_nvm_register_sysfs(struct nvme_ns *ns);
499 void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
500 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
501 #else
502 static inline void nvme_nvm_update_nvm_info(struct nvme_ns *ns) {};
503 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
504 				    int node)
505 {
506 	return 0;
507 }
508 
509 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
510 static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
511 {
512 	return 0;
513 }
514 static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
515 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
516 							unsigned long arg)
517 {
518 	return -ENOTTY;
519 }
520 #endif /* CONFIG_NVM */
521 
522 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
523 {
524 	return dev_to_disk(dev)->private_data;
525 }
526 
527 int __init nvme_core_init(void);
528 void nvme_core_exit(void);
529 
530 #endif /* _NVME_H */
531