1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern const struct pr_ops nvme_pr_ops; 23 24 extern unsigned int nvme_io_timeout; 25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 26 27 extern unsigned int admin_timeout; 28 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 29 30 #define NVME_DEFAULT_KATO 5 31 32 #ifdef CONFIG_ARCH_NO_SG_CHAIN 33 #define NVME_INLINE_SG_CNT 0 34 #define NVME_INLINE_METADATA_SG_CNT 0 35 #else 36 #define NVME_INLINE_SG_CNT 2 37 #define NVME_INLINE_METADATA_SG_CNT 1 38 #endif 39 40 /* 41 * Default to a 4K page size, with the intention to update this 42 * path in the future to accommodate architectures with differing 43 * kernel and IO page sizes. 44 */ 45 #define NVME_CTRL_PAGE_SHIFT 12 46 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 47 48 extern struct workqueue_struct *nvme_wq; 49 extern struct workqueue_struct *nvme_reset_wq; 50 extern struct workqueue_struct *nvme_delete_wq; 51 52 /* 53 * List of workarounds for devices that required behavior not specified in 54 * the standard. 55 */ 56 enum nvme_quirks { 57 /* 58 * Prefers I/O aligned to a stripe size specified in a vendor 59 * specific Identify field. 60 */ 61 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 62 63 /* 64 * The controller doesn't handle Identify value others than 0 or 1 65 * correctly. 66 */ 67 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 68 69 /* 70 * The controller deterministically returns O's on reads to 71 * logical blocks that deallocate was called on. 72 */ 73 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 74 75 /* 76 * The controller needs a delay before starts checking the device 77 * readiness, which is done by reading the NVME_CSTS_RDY bit. 78 */ 79 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 80 81 /* 82 * APST should not be used. 83 */ 84 NVME_QUIRK_NO_APST = (1 << 4), 85 86 /* 87 * The deepest sleep state should not be used. 88 */ 89 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 90 91 /* 92 * Set MEDIUM priority on SQ creation 93 */ 94 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 95 96 /* 97 * Ignore device provided subnqn. 98 */ 99 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 100 101 /* 102 * Broken Write Zeroes. 103 */ 104 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 105 106 /* 107 * Force simple suspend/resume path. 108 */ 109 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 110 111 /* 112 * Use only one interrupt vector for all queues 113 */ 114 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 115 116 /* 117 * Use non-standard 128 bytes SQEs. 118 */ 119 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 120 121 /* 122 * Prevent tag overlap between queues 123 */ 124 NVME_QUIRK_SHARED_TAGS = (1 << 13), 125 126 /* 127 * Don't change the value of the temperature threshold feature 128 */ 129 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 130 131 /* 132 * The controller doesn't handle the Identify Namespace 133 * Identification Descriptor list subcommand despite claiming 134 * NVMe 1.3 compliance. 135 */ 136 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 137 138 /* 139 * The controller does not properly handle DMA addresses over 140 * 48 bits. 141 */ 142 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 143 144 /* 145 * The controller requires the command_id value be limited, so skip 146 * encoding the generation sequence number. 147 */ 148 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 149 150 /* 151 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 152 */ 153 NVME_QUIRK_BOGUS_NID = (1 << 18), 154 155 /* 156 * No temperature thresholds for channels other than 0 (Composite). 157 */ 158 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 159 160 /* 161 * Disables simple suspend/resume path. 162 */ 163 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 164 }; 165 166 /* 167 * Common request structure for NVMe passthrough. All drivers must have 168 * this structure as the first member of their request-private data. 169 */ 170 struct nvme_request { 171 struct nvme_command *cmd; 172 union nvme_result result; 173 u8 genctr; 174 u8 retries; 175 u8 flags; 176 u16 status; 177 #ifdef CONFIG_NVME_MULTIPATH 178 unsigned long start_time; 179 #endif 180 struct nvme_ctrl *ctrl; 181 }; 182 183 /* 184 * Mark a bio as coming in through the mpath node. 185 */ 186 #define REQ_NVME_MPATH REQ_DRV 187 188 enum { 189 NVME_REQ_CANCELLED = (1 << 0), 190 NVME_REQ_USERCMD = (1 << 1), 191 NVME_MPATH_IO_STATS = (1 << 2), 192 }; 193 194 static inline struct nvme_request *nvme_req(struct request *req) 195 { 196 return blk_mq_rq_to_pdu(req); 197 } 198 199 static inline u16 nvme_req_qid(struct request *req) 200 { 201 if (!req->q->queuedata) 202 return 0; 203 204 return req->mq_hctx->queue_num + 1; 205 } 206 207 /* The below value is the specific amount of delay needed before checking 208 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 209 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 210 * found empirically. 211 */ 212 #define NVME_QUIRK_DELAY_AMOUNT 2300 213 214 /* 215 * enum nvme_ctrl_state: Controller state 216 * 217 * @NVME_CTRL_NEW: New controller just allocated, initial state 218 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 219 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 220 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 221 * transport 222 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 223 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 224 * disabled/failed immediately. This state comes 225 * after all async event processing took place and 226 * before ns removal and the controller deletion 227 * progress 228 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 229 * shutdown or removal. In this case we forcibly 230 * kill all inflight I/O as they have no chance to 231 * complete 232 */ 233 enum nvme_ctrl_state { 234 NVME_CTRL_NEW, 235 NVME_CTRL_LIVE, 236 NVME_CTRL_RESETTING, 237 NVME_CTRL_CONNECTING, 238 NVME_CTRL_DELETING, 239 NVME_CTRL_DELETING_NOIO, 240 NVME_CTRL_DEAD, 241 }; 242 243 struct nvme_fault_inject { 244 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 245 struct fault_attr attr; 246 struct dentry *parent; 247 bool dont_retry; /* DNR, do not retry */ 248 u16 status; /* status code */ 249 #endif 250 }; 251 252 enum nvme_ctrl_flags { 253 NVME_CTRL_FAILFAST_EXPIRED = 0, 254 NVME_CTRL_ADMIN_Q_STOPPED = 1, 255 NVME_CTRL_STARTED_ONCE = 2, 256 NVME_CTRL_STOPPED = 3, 257 NVME_CTRL_SKIP_ID_CNS_CS = 4, 258 NVME_CTRL_DIRTY_CAPABILITY = 5, 259 NVME_CTRL_FROZEN = 6, 260 }; 261 262 struct nvme_ctrl { 263 bool comp_seen; 264 bool identified; 265 enum nvme_ctrl_state state; 266 spinlock_t lock; 267 struct mutex scan_lock; 268 const struct nvme_ctrl_ops *ops; 269 struct request_queue *admin_q; 270 struct request_queue *connect_q; 271 struct request_queue *fabrics_q; 272 struct device *dev; 273 int instance; 274 int numa_node; 275 struct blk_mq_tag_set *tagset; 276 struct blk_mq_tag_set *admin_tagset; 277 struct list_head namespaces; 278 struct rw_semaphore namespaces_rwsem; 279 struct device ctrl_device; 280 struct device *device; /* char device */ 281 #ifdef CONFIG_NVME_HWMON 282 struct device *hwmon_device; 283 #endif 284 struct cdev cdev; 285 struct work_struct reset_work; 286 struct work_struct delete_work; 287 wait_queue_head_t state_wq; 288 289 struct nvme_subsystem *subsys; 290 struct list_head subsys_entry; 291 292 struct opal_dev *opal_dev; 293 294 char name[12]; 295 u16 cntlid; 296 297 u16 mtfa; 298 u32 ctrl_config; 299 u32 queue_count; 300 301 u64 cap; 302 u32 max_hw_sectors; 303 u32 max_segments; 304 u32 max_integrity_segments; 305 u32 max_discard_sectors; 306 u32 max_discard_segments; 307 u32 max_zeroes_sectors; 308 #ifdef CONFIG_BLK_DEV_ZONED 309 u32 max_zone_append; 310 #endif 311 u16 crdt[3]; 312 u16 oncs; 313 u32 dmrsl; 314 u16 oacs; 315 u16 sqsize; 316 u32 max_namespaces; 317 atomic_t abort_limit; 318 u8 vwc; 319 u32 vs; 320 u32 sgls; 321 u16 kas; 322 u8 npss; 323 u8 apsta; 324 u16 wctemp; 325 u16 cctemp; 326 u32 oaes; 327 u32 aen_result; 328 u32 ctratt; 329 unsigned int shutdown_timeout; 330 unsigned int kato; 331 bool subsystem; 332 unsigned long quirks; 333 struct nvme_id_power_state psd[32]; 334 struct nvme_effects_log *effects; 335 struct xarray cels; 336 struct work_struct scan_work; 337 struct work_struct async_event_work; 338 struct delayed_work ka_work; 339 struct delayed_work failfast_work; 340 struct nvme_command ka_cmd; 341 unsigned long ka_last_check_time; 342 struct work_struct fw_act_work; 343 unsigned long events; 344 345 #ifdef CONFIG_NVME_MULTIPATH 346 /* asymmetric namespace access: */ 347 u8 anacap; 348 u8 anatt; 349 u32 anagrpmax; 350 u32 nanagrpid; 351 struct mutex ana_lock; 352 struct nvme_ana_rsp_hdr *ana_log_buf; 353 size_t ana_log_size; 354 struct timer_list anatt_timer; 355 struct work_struct ana_work; 356 #endif 357 358 #ifdef CONFIG_NVME_AUTH 359 struct work_struct dhchap_auth_work; 360 struct mutex dhchap_auth_mutex; 361 struct nvme_dhchap_queue_context *dhchap_ctxs; 362 struct nvme_dhchap_key *host_key; 363 struct nvme_dhchap_key *ctrl_key; 364 u16 transaction; 365 #endif 366 367 /* Power saving configuration */ 368 u64 ps_max_latency_us; 369 bool apst_enabled; 370 371 /* PCIe only: */ 372 u16 hmmaxd; 373 u32 hmpre; 374 u32 hmmin; 375 u32 hmminds; 376 377 /* Fabrics only */ 378 u32 ioccsz; 379 u32 iorcsz; 380 u16 icdoff; 381 u16 maxcmd; 382 int nr_reconnects; 383 unsigned long flags; 384 struct nvmf_ctrl_options *opts; 385 386 struct page *discard_page; 387 unsigned long discard_page_busy; 388 389 struct nvme_fault_inject fault_inject; 390 391 enum nvme_ctrl_type cntrltype; 392 enum nvme_dctype dctype; 393 }; 394 395 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl) 396 { 397 return READ_ONCE(ctrl->state); 398 } 399 400 enum nvme_iopolicy { 401 NVME_IOPOLICY_NUMA, 402 NVME_IOPOLICY_RR, 403 }; 404 405 struct nvme_subsystem { 406 int instance; 407 struct device dev; 408 /* 409 * Because we unregister the device on the last put we need 410 * a separate refcount. 411 */ 412 struct kref ref; 413 struct list_head entry; 414 struct mutex lock; 415 struct list_head ctrls; 416 struct list_head nsheads; 417 char subnqn[NVMF_NQN_SIZE]; 418 char serial[20]; 419 char model[40]; 420 char firmware_rev[8]; 421 u8 cmic; 422 enum nvme_subsys_type subtype; 423 u16 vendor_id; 424 u16 awupf; /* 0's based awupf value. */ 425 struct ida ns_ida; 426 #ifdef CONFIG_NVME_MULTIPATH 427 enum nvme_iopolicy iopolicy; 428 #endif 429 }; 430 431 /* 432 * Container structure for uniqueue namespace identifiers. 433 */ 434 struct nvme_ns_ids { 435 u8 eui64[8]; 436 u8 nguid[16]; 437 uuid_t uuid; 438 u8 csi; 439 }; 440 441 /* 442 * Anchor structure for namespaces. There is one for each namespace in a 443 * NVMe subsystem that any of our controllers can see, and the namespace 444 * structure for each controller is chained of it. For private namespaces 445 * there is a 1:1 relation to our namespace structures, that is ->list 446 * only ever has a single entry for private namespaces. 447 */ 448 struct nvme_ns_head { 449 struct list_head list; 450 struct srcu_struct srcu; 451 struct nvme_subsystem *subsys; 452 unsigned ns_id; 453 struct nvme_ns_ids ids; 454 struct list_head entry; 455 struct kref ref; 456 bool shared; 457 int instance; 458 struct nvme_effects_log *effects; 459 460 struct cdev cdev; 461 struct device cdev_device; 462 463 struct gendisk *disk; 464 #ifdef CONFIG_NVME_MULTIPATH 465 struct bio_list requeue_list; 466 spinlock_t requeue_lock; 467 struct work_struct requeue_work; 468 struct mutex lock; 469 unsigned long flags; 470 #define NVME_NSHEAD_DISK_LIVE 0 471 struct nvme_ns __rcu *current_path[]; 472 #endif 473 }; 474 475 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 476 { 477 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 478 } 479 480 enum nvme_ns_features { 481 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 482 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 483 NVME_NS_DEAC, /* DEAC bit in Write Zeores supported */ 484 }; 485 486 struct nvme_ns { 487 struct list_head list; 488 489 struct nvme_ctrl *ctrl; 490 struct request_queue *queue; 491 struct gendisk *disk; 492 #ifdef CONFIG_NVME_MULTIPATH 493 enum nvme_ana_state ana_state; 494 u32 ana_grpid; 495 #endif 496 struct list_head siblings; 497 struct kref kref; 498 struct nvme_ns_head *head; 499 500 int lba_shift; 501 u16 ms; 502 u16 pi_size; 503 u16 sgs; 504 u32 sws; 505 u8 pi_type; 506 u8 guard_type; 507 #ifdef CONFIG_BLK_DEV_ZONED 508 u64 zsze; 509 #endif 510 unsigned long features; 511 unsigned long flags; 512 #define NVME_NS_REMOVING 0 513 #define NVME_NS_ANA_PENDING 2 514 #define NVME_NS_FORCE_RO 3 515 #define NVME_NS_READY 4 516 517 struct cdev cdev; 518 struct device cdev_device; 519 520 struct nvme_fault_inject fault_inject; 521 522 }; 523 524 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 525 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 526 { 527 return ns->pi_type && ns->ms == ns->pi_size; 528 } 529 530 struct nvme_ctrl_ops { 531 const char *name; 532 struct module *module; 533 unsigned int flags; 534 #define NVME_F_FABRICS (1 << 0) 535 #define NVME_F_METADATA_SUPPORTED (1 << 1) 536 #define NVME_F_BLOCKING (1 << 2) 537 538 const struct attribute_group **dev_attr_groups; 539 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 540 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 541 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 542 void (*free_ctrl)(struct nvme_ctrl *ctrl); 543 void (*submit_async_event)(struct nvme_ctrl *ctrl); 544 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 545 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 546 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 547 void (*print_device_info)(struct nvme_ctrl *ctrl); 548 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 549 }; 550 551 /* 552 * nvme command_id is constructed as such: 553 * | xxxx | xxxxxxxxxxxx | 554 * gen request tag 555 */ 556 #define nvme_genctr_mask(gen) (gen & 0xf) 557 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 558 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 559 #define nvme_tag_from_cid(cid) (cid & 0xfff) 560 561 static inline u16 nvme_cid(struct request *rq) 562 { 563 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 564 } 565 566 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 567 u16 command_id) 568 { 569 u8 genctr = nvme_genctr_from_cid(command_id); 570 u16 tag = nvme_tag_from_cid(command_id); 571 struct request *rq; 572 573 rq = blk_mq_tag_to_rq(tags, tag); 574 if (unlikely(!rq)) { 575 pr_err("could not locate request for tag %#x\n", 576 tag); 577 return NULL; 578 } 579 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 580 dev_err(nvme_req(rq)->ctrl->device, 581 "request %#x genctr mismatch (got %#x expected %#x)\n", 582 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 583 return NULL; 584 } 585 return rq; 586 } 587 588 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 589 u16 command_id) 590 { 591 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 592 } 593 594 /* 595 * Return the length of the string without the space padding 596 */ 597 static inline int nvme_strlen(char *s, int len) 598 { 599 while (s[len - 1] == ' ') 600 len--; 601 return len; 602 } 603 604 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 605 { 606 struct nvme_subsystem *subsys = ctrl->subsys; 607 608 if (ctrl->ops->print_device_info) { 609 ctrl->ops->print_device_info(ctrl); 610 return; 611 } 612 613 dev_err(ctrl->device, 614 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 615 nvme_strlen(subsys->model, sizeof(subsys->model)), 616 subsys->model, nvme_strlen(subsys->firmware_rev, 617 sizeof(subsys->firmware_rev)), 618 subsys->firmware_rev); 619 } 620 621 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 622 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 623 const char *dev_name); 624 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 625 void nvme_should_fail(struct request *req); 626 #else 627 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 628 const char *dev_name) 629 { 630 } 631 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 632 { 633 } 634 static inline void nvme_should_fail(struct request *req) {} 635 #endif 636 637 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 638 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 639 640 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 641 { 642 int ret; 643 644 if (!ctrl->subsystem) 645 return -ENOTTY; 646 if (!nvme_wait_reset(ctrl)) 647 return -EBUSY; 648 649 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 650 if (ret) 651 return ret; 652 653 return nvme_try_sched_reset(ctrl); 654 } 655 656 /* 657 * Convert a 512B sector number to a device logical block number. 658 */ 659 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 660 { 661 return sector >> (ns->lba_shift - SECTOR_SHIFT); 662 } 663 664 /* 665 * Convert a device logical block number to a 512B sector number. 666 */ 667 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 668 { 669 return lba << (ns->lba_shift - SECTOR_SHIFT); 670 } 671 672 /* 673 * Convert byte length to nvme's 0-based num dwords 674 */ 675 static inline u32 nvme_bytes_to_numd(size_t len) 676 { 677 return (len >> 2) - 1; 678 } 679 680 static inline bool nvme_is_ana_error(u16 status) 681 { 682 switch (status & 0x7ff) { 683 case NVME_SC_ANA_TRANSITION: 684 case NVME_SC_ANA_INACCESSIBLE: 685 case NVME_SC_ANA_PERSISTENT_LOSS: 686 return true; 687 default: 688 return false; 689 } 690 } 691 692 static inline bool nvme_is_path_error(u16 status) 693 { 694 /* check for a status code type of 'path related status' */ 695 return (status & 0x700) == 0x300; 696 } 697 698 /* 699 * Fill in the status and result information from the CQE, and then figure out 700 * if blk-mq will need to use IPI magic to complete the request, and if yes do 701 * so. If not let the caller complete the request without an indirect function 702 * call. 703 */ 704 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 705 union nvme_result result) 706 { 707 struct nvme_request *rq = nvme_req(req); 708 struct nvme_ctrl *ctrl = rq->ctrl; 709 710 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 711 rq->genctr++; 712 713 rq->status = le16_to_cpu(status) >> 1; 714 rq->result = result; 715 /* inject error when permitted by fault injection framework */ 716 nvme_should_fail(req); 717 if (unlikely(blk_should_fake_timeout(req->q))) 718 return true; 719 return blk_mq_complete_request_remote(req); 720 } 721 722 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 723 { 724 get_device(ctrl->device); 725 } 726 727 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 728 { 729 put_device(ctrl->device); 730 } 731 732 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 733 { 734 return !qid && 735 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 736 } 737 738 void nvme_complete_rq(struct request *req); 739 void nvme_complete_batch_req(struct request *req); 740 741 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 742 void (*fn)(struct request *rq)) 743 { 744 struct request *req; 745 746 rq_list_for_each(&iob->req_list, req) { 747 fn(req); 748 nvme_complete_batch_req(req); 749 } 750 blk_mq_end_request_batch(iob); 751 } 752 753 blk_status_t nvme_host_path_error(struct request *req); 754 bool nvme_cancel_request(struct request *req, void *data); 755 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 756 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 757 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 758 enum nvme_ctrl_state new_state); 759 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 760 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 761 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 762 const struct nvme_ctrl_ops *ops, unsigned long quirks); 763 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 764 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 765 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 766 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 767 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 768 const struct blk_mq_ops *ops, unsigned int cmd_size); 769 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 770 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 771 const struct blk_mq_ops *ops, unsigned int nr_maps, 772 unsigned int cmd_size); 773 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 774 775 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 776 777 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 778 volatile union nvme_result *res); 779 780 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 781 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 782 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 783 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 784 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 785 void nvme_sync_queues(struct nvme_ctrl *ctrl); 786 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 787 void nvme_unfreeze(struct nvme_ctrl *ctrl); 788 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 789 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 790 void nvme_start_freeze(struct nvme_ctrl *ctrl); 791 792 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 793 { 794 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 795 } 796 797 #define NVME_QID_ANY -1 798 void nvme_init_request(struct request *req, struct nvme_command *cmd); 799 void nvme_cleanup_cmd(struct request *req); 800 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 801 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 802 struct request *req); 803 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 804 bool queue_live); 805 806 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 807 bool queue_live) 808 { 809 if (likely(ctrl->state == NVME_CTRL_LIVE)) 810 return true; 811 if (ctrl->ops->flags & NVME_F_FABRICS && 812 ctrl->state == NVME_CTRL_DELETING) 813 return queue_live; 814 return __nvme_check_ready(ctrl, rq, queue_live); 815 } 816 817 /* 818 * NSID shall be unique for all shared namespaces, or if at least one of the 819 * following conditions is met: 820 * 1. Namespace Management is supported by the controller 821 * 2. ANA is supported by the controller 822 * 3. NVM Set are supported by the controller 823 * 824 * In other case, private namespace are not required to report a unique NSID. 825 */ 826 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 827 struct nvme_ns_head *head) 828 { 829 return head->shared || 830 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 831 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 832 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 833 } 834 835 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 836 void *buf, unsigned bufflen); 837 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 838 union nvme_result *result, void *buffer, unsigned bufflen, 839 int qid, int at_head, 840 blk_mq_req_flags_t flags); 841 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 842 unsigned int dword11, void *buffer, size_t buflen, 843 u32 *result); 844 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 845 unsigned int dword11, void *buffer, size_t buflen, 846 u32 *result); 847 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 848 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 849 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 850 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 851 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 852 void nvme_queue_scan(struct nvme_ctrl *ctrl); 853 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 854 void *log, size_t size, u64 offset); 855 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 856 void nvme_put_ns_head(struct nvme_ns_head *head); 857 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 858 const struct file_operations *fops, struct module *owner); 859 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 860 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 861 unsigned int cmd, unsigned long arg); 862 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 863 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 864 unsigned int cmd, unsigned long arg); 865 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 866 unsigned long arg); 867 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 868 unsigned long arg); 869 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 870 struct io_comp_batch *iob, unsigned int poll_flags); 871 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 872 unsigned int issue_flags); 873 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 874 unsigned int issue_flags); 875 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 876 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 877 878 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 879 extern const struct pr_ops nvme_pr_ops; 880 extern const struct block_device_operations nvme_ns_head_ops; 881 extern const struct attribute_group nvme_dev_attrs_group; 882 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 883 extern const struct attribute_group *nvme_dev_attr_groups[]; 884 extern const struct block_device_operations nvme_bdev_ops; 885 886 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 887 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 888 #ifdef CONFIG_NVME_MULTIPATH 889 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 890 { 891 return ctrl->ana_log_buf != NULL; 892 } 893 894 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 895 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 896 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 897 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 898 void nvme_failover_req(struct request *req); 899 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 900 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 901 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 902 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 903 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 904 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 905 void nvme_mpath_update(struct nvme_ctrl *ctrl); 906 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 907 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 908 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 909 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 910 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 911 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 912 void nvme_mpath_start_request(struct request *rq); 913 void nvme_mpath_end_request(struct request *rq); 914 915 static inline void nvme_trace_bio_complete(struct request *req) 916 { 917 struct nvme_ns *ns = req->q->queuedata; 918 919 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 920 trace_block_bio_complete(ns->head->disk->queue, req->bio); 921 } 922 923 extern bool multipath; 924 extern struct device_attribute dev_attr_ana_grpid; 925 extern struct device_attribute dev_attr_ana_state; 926 extern struct device_attribute subsys_attr_iopolicy; 927 928 #else 929 #define multipath false 930 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 931 { 932 return false; 933 } 934 static inline void nvme_failover_req(struct request *req) 935 { 936 } 937 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 938 { 939 } 940 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 941 struct nvme_ns_head *head) 942 { 943 return 0; 944 } 945 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 946 { 947 } 948 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 949 { 950 } 951 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 952 { 953 return false; 954 } 955 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 956 { 957 } 958 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 959 { 960 } 961 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 962 { 963 } 964 static inline void nvme_trace_bio_complete(struct request *req) 965 { 966 } 967 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 968 { 969 } 970 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 971 struct nvme_id_ctrl *id) 972 { 973 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 974 dev_warn(ctrl->device, 975 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 976 return 0; 977 } 978 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 979 { 980 } 981 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 982 { 983 } 984 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 985 { 986 } 987 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 988 { 989 } 990 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 991 { 992 } 993 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 994 { 995 } 996 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 997 { 998 } 999 static inline void nvme_mpath_start_request(struct request *rq) 1000 { 1001 } 1002 static inline void nvme_mpath_end_request(struct request *rq) 1003 { 1004 } 1005 #endif /* CONFIG_NVME_MULTIPATH */ 1006 1007 int nvme_revalidate_zones(struct nvme_ns *ns); 1008 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 1009 unsigned int nr_zones, report_zones_cb cb, void *data); 1010 #ifdef CONFIG_BLK_DEV_ZONED 1011 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 1012 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1013 struct nvme_command *cmnd, 1014 enum nvme_zone_mgmt_action action); 1015 #else 1016 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1017 struct request *req, struct nvme_command *cmnd, 1018 enum nvme_zone_mgmt_action action) 1019 { 1020 return BLK_STS_NOTSUPP; 1021 } 1022 1023 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 1024 { 1025 dev_warn(ns->ctrl->device, 1026 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 1027 return -EPROTONOSUPPORT; 1028 } 1029 #endif 1030 1031 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1032 { 1033 return dev_to_disk(dev)->private_data; 1034 } 1035 1036 #ifdef CONFIG_NVME_HWMON 1037 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1038 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1039 #else 1040 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1041 { 1042 return 0; 1043 } 1044 1045 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1046 { 1047 } 1048 #endif 1049 1050 static inline void nvme_start_request(struct request *rq) 1051 { 1052 if (rq->cmd_flags & REQ_NVME_MPATH) 1053 nvme_mpath_start_request(rq); 1054 blk_mq_start_request(rq); 1055 } 1056 1057 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1058 { 1059 return ctrl->sgls & ((1 << 0) | (1 << 1)); 1060 } 1061 1062 #ifdef CONFIG_NVME_AUTH 1063 int __init nvme_init_auth(void); 1064 void __exit nvme_exit_auth(void); 1065 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1066 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1067 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1068 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1069 void nvme_auth_free(struct nvme_ctrl *ctrl); 1070 #else 1071 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1072 { 1073 return 0; 1074 } 1075 static inline int __init nvme_init_auth(void) 1076 { 1077 return 0; 1078 } 1079 static inline void __exit nvme_exit_auth(void) 1080 { 1081 } 1082 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1083 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1084 { 1085 return -EPROTONOSUPPORT; 1086 } 1087 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1088 { 1089 return NVME_SC_AUTH_REQUIRED; 1090 } 1091 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1092 #endif 1093 1094 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1095 u8 opcode); 1096 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1097 int nvme_execute_rq(struct request *rq, bool at_head); 1098 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1099 struct nvme_command *cmd, int status); 1100 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1101 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1102 void nvme_put_ns(struct nvme_ns *ns); 1103 1104 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1105 { 1106 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1107 } 1108 1109 #ifdef CONFIG_NVME_VERBOSE_ERRORS 1110 const unsigned char *nvme_get_error_status_str(u16 status); 1111 const unsigned char *nvme_get_opcode_str(u8 opcode); 1112 const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1113 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode); 1114 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1115 static inline const unsigned char *nvme_get_error_status_str(u16 status) 1116 { 1117 return "I/O Error"; 1118 } 1119 static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1120 { 1121 return "I/O Cmd"; 1122 } 1123 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1124 { 1125 return "Admin Cmd"; 1126 } 1127 1128 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode) 1129 { 1130 return "Fabrics Cmd"; 1131 } 1132 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1133 1134 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype) 1135 { 1136 if (opcode == nvme_fabrics_command) 1137 return nvme_get_fabrics_opcode_str(fctype); 1138 return qid ? nvme_get_opcode_str(opcode) : 1139 nvme_get_admin_opcode_str(opcode); 1140 } 1141 #endif /* _NVME_H */ 1142