1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (c) 2011-2014, Intel Corporation.
4 */
5
6 #ifndef _NVME_H
7 #define _NVME_H
8
9 #include <linux/nvme.h>
10 #include <linux/cdev.h>
11 #include <linux/pci.h>
12 #include <linux/kref.h>
13 #include <linux/blk-mq.h>
14 #include <linux/sed-opal.h>
15 #include <linux/fault-inject.h>
16 #include <linux/rcupdate.h>
17 #include <linux/wait.h>
18 #include <linux/t10-pi.h>
19
20 #include <trace/events/block.h>
21
22 extern const struct pr_ops nvme_pr_ops;
23
24 extern unsigned int nvme_io_timeout;
25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
26
27 extern unsigned int admin_timeout;
28 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ)
29
30 #define NVME_DEFAULT_KATO 5
31
32 #ifdef CONFIG_ARCH_NO_SG_CHAIN
33 #define NVME_INLINE_SG_CNT 0
34 #define NVME_INLINE_METADATA_SG_CNT 0
35 #else
36 #define NVME_INLINE_SG_CNT 2
37 #define NVME_INLINE_METADATA_SG_CNT 1
38 #endif
39
40 /*
41 * Default to a 4K page size, with the intention to update this
42 * path in the future to accommodate architectures with differing
43 * kernel and IO page sizes.
44 */
45 #define NVME_CTRL_PAGE_SHIFT 12
46 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT)
47
48 extern struct workqueue_struct *nvme_wq;
49 extern struct workqueue_struct *nvme_reset_wq;
50 extern struct workqueue_struct *nvme_delete_wq;
51
52 /*
53 * List of workarounds for devices that required behavior not specified in
54 * the standard.
55 */
56 enum nvme_quirks {
57 /*
58 * Prefers I/O aligned to a stripe size specified in a vendor
59 * specific Identify field.
60 */
61 NVME_QUIRK_STRIPE_SIZE = (1 << 0),
62
63 /*
64 * The controller doesn't handle Identify value others than 0 or 1
65 * correctly.
66 */
67 NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
68
69 /*
70 * The controller deterministically returns O's on reads to
71 * logical blocks that deallocate was called on.
72 */
73 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2),
74
75 /*
76 * The controller needs a delay before starts checking the device
77 * readiness, which is done by reading the NVME_CSTS_RDY bit.
78 */
79 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
80
81 /*
82 * APST should not be used.
83 */
84 NVME_QUIRK_NO_APST = (1 << 4),
85
86 /*
87 * The deepest sleep state should not be used.
88 */
89 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
90
91 /*
92 * Problems seen with concurrent commands
93 */
94 NVME_QUIRK_QDEPTH_ONE = (1 << 6),
95
96 /*
97 * Set MEDIUM priority on SQ creation
98 */
99 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7),
100
101 /*
102 * Ignore device provided subnqn.
103 */
104 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8),
105
106 /*
107 * Broken Write Zeroes.
108 */
109 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9),
110
111 /*
112 * Force simple suspend/resume path.
113 */
114 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10),
115
116 /*
117 * Use only one interrupt vector for all queues
118 */
119 NVME_QUIRK_SINGLE_VECTOR = (1 << 11),
120
121 /*
122 * Use non-standard 128 bytes SQEs.
123 */
124 NVME_QUIRK_128_BYTES_SQES = (1 << 12),
125
126 /*
127 * Prevent tag overlap between queues
128 */
129 NVME_QUIRK_SHARED_TAGS = (1 << 13),
130
131 /*
132 * Don't change the value of the temperature threshold feature
133 */
134 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14),
135
136 /*
137 * The controller doesn't handle the Identify Namespace
138 * Identification Descriptor list subcommand despite claiming
139 * NVMe 1.3 compliance.
140 */
141 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15),
142
143 /*
144 * The controller does not properly handle DMA addresses over
145 * 48 bits.
146 */
147 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16),
148
149 /*
150 * The controller requires the command_id value be limited, so skip
151 * encoding the generation sequence number.
152 */
153 NVME_QUIRK_SKIP_CID_GEN = (1 << 17),
154
155 /*
156 * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
157 */
158 NVME_QUIRK_BOGUS_NID = (1 << 18),
159
160 /*
161 * No temperature thresholds for channels other than 0 (Composite).
162 */
163 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19),
164
165 /*
166 * Disables simple suspend/resume path.
167 */
168 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20),
169
170 /*
171 * MSI (but not MSI-X) interrupts are broken and never fire.
172 */
173 NVME_QUIRK_BROKEN_MSI = (1 << 21),
174 };
175
176 /*
177 * Common request structure for NVMe passthrough. All drivers must have
178 * this structure as the first member of their request-private data.
179 */
180 struct nvme_request {
181 struct nvme_command *cmd;
182 union nvme_result result;
183 u8 genctr;
184 u8 retries;
185 u8 flags;
186 u16 status;
187 #ifdef CONFIG_NVME_MULTIPATH
188 unsigned long start_time;
189 #endif
190 struct nvme_ctrl *ctrl;
191 };
192
193 /*
194 * Mark a bio as coming in through the mpath node.
195 */
196 #define REQ_NVME_MPATH REQ_DRV
197
198 enum {
199 NVME_REQ_CANCELLED = (1 << 0),
200 NVME_REQ_USERCMD = (1 << 1),
201 NVME_MPATH_IO_STATS = (1 << 2),
202 };
203
nvme_req(struct request * req)204 static inline struct nvme_request *nvme_req(struct request *req)
205 {
206 return blk_mq_rq_to_pdu(req);
207 }
208
nvme_req_qid(struct request * req)209 static inline u16 nvme_req_qid(struct request *req)
210 {
211 if (!req->q->queuedata)
212 return 0;
213
214 return req->mq_hctx->queue_num + 1;
215 }
216
217 /* The below value is the specific amount of delay needed before checking
218 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
219 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
220 * found empirically.
221 */
222 #define NVME_QUIRK_DELAY_AMOUNT 2300
223
224 /*
225 * enum nvme_ctrl_state: Controller state
226 *
227 * @NVME_CTRL_NEW: New controller just allocated, initial state
228 * @NVME_CTRL_LIVE: Controller is connected and I/O capable
229 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset)
230 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the
231 * transport
232 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion)
233 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not
234 * disabled/failed immediately. This state comes
235 * after all async event processing took place and
236 * before ns removal and the controller deletion
237 * progress
238 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during
239 * shutdown or removal. In this case we forcibly
240 * kill all inflight I/O as they have no chance to
241 * complete
242 */
243 enum nvme_ctrl_state {
244 NVME_CTRL_NEW,
245 NVME_CTRL_LIVE,
246 NVME_CTRL_RESETTING,
247 NVME_CTRL_CONNECTING,
248 NVME_CTRL_DELETING,
249 NVME_CTRL_DELETING_NOIO,
250 NVME_CTRL_DEAD,
251 };
252
253 struct nvme_fault_inject {
254 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
255 struct fault_attr attr;
256 struct dentry *parent;
257 bool dont_retry; /* DNR, do not retry */
258 u16 status; /* status code */
259 #endif
260 };
261
262 enum nvme_ctrl_flags {
263 NVME_CTRL_FAILFAST_EXPIRED = 0,
264 NVME_CTRL_ADMIN_Q_STOPPED = 1,
265 NVME_CTRL_STARTED_ONCE = 2,
266 NVME_CTRL_STOPPED = 3,
267 NVME_CTRL_SKIP_ID_CNS_CS = 4,
268 NVME_CTRL_DIRTY_CAPABILITY = 5,
269 NVME_CTRL_FROZEN = 6,
270 };
271
272 struct nvme_ctrl {
273 bool comp_seen;
274 bool identified;
275 enum nvme_ctrl_state state;
276 spinlock_t lock;
277 struct mutex scan_lock;
278 const struct nvme_ctrl_ops *ops;
279 struct request_queue *admin_q;
280 struct request_queue *connect_q;
281 struct request_queue *fabrics_q;
282 struct device *dev;
283 int instance;
284 int numa_node;
285 struct blk_mq_tag_set *tagset;
286 struct blk_mq_tag_set *admin_tagset;
287 struct list_head namespaces;
288 struct mutex namespaces_lock;
289 struct srcu_struct srcu;
290 struct device ctrl_device;
291 struct device *device; /* char device */
292 #ifdef CONFIG_NVME_HWMON
293 struct device *hwmon_device;
294 #endif
295 struct cdev cdev;
296 struct work_struct reset_work;
297 struct work_struct delete_work;
298 wait_queue_head_t state_wq;
299
300 struct nvme_subsystem *subsys;
301 struct list_head subsys_entry;
302
303 struct opal_dev *opal_dev;
304
305 char name[12];
306 u16 cntlid;
307
308 u16 mtfa;
309 u32 ctrl_config;
310 u32 queue_count;
311
312 u64 cap;
313 u32 max_hw_sectors;
314 u32 max_segments;
315 u32 max_integrity_segments;
316 u32 max_discard_sectors;
317 u32 max_discard_segments;
318 u32 max_zeroes_sectors;
319 #ifdef CONFIG_BLK_DEV_ZONED
320 u32 max_zone_append;
321 #endif
322 u16 crdt[3];
323 u16 oncs;
324 u32 dmrsl;
325 u16 oacs;
326 u16 sqsize;
327 u32 max_namespaces;
328 atomic_t abort_limit;
329 u8 vwc;
330 u32 vs;
331 u32 sgls;
332 u16 kas;
333 u8 npss;
334 u8 apsta;
335 u16 wctemp;
336 u16 cctemp;
337 u32 oaes;
338 u32 aen_result;
339 u32 ctratt;
340 unsigned int shutdown_timeout;
341 unsigned int kato;
342 bool subsystem;
343 unsigned long quirks;
344 struct nvme_id_power_state psd[32];
345 struct nvme_effects_log *effects;
346 struct xarray cels;
347 struct work_struct scan_work;
348 struct work_struct async_event_work;
349 struct delayed_work ka_work;
350 struct delayed_work failfast_work;
351 struct nvme_command ka_cmd;
352 unsigned long ka_last_check_time;
353 struct work_struct fw_act_work;
354 unsigned long events;
355
356 #ifdef CONFIG_NVME_MULTIPATH
357 /* asymmetric namespace access: */
358 u8 anacap;
359 u8 anatt;
360 u32 anagrpmax;
361 u32 nanagrpid;
362 struct mutex ana_lock;
363 struct nvme_ana_rsp_hdr *ana_log_buf;
364 size_t ana_log_size;
365 struct timer_list anatt_timer;
366 struct work_struct ana_work;
367 #endif
368
369 #ifdef CONFIG_NVME_AUTH
370 struct work_struct dhchap_auth_work;
371 struct mutex dhchap_auth_mutex;
372 struct nvme_dhchap_queue_context *dhchap_ctxs;
373 struct nvme_dhchap_key *host_key;
374 struct nvme_dhchap_key *ctrl_key;
375 u16 transaction;
376 #endif
377
378 /* Power saving configuration */
379 u64 ps_max_latency_us;
380 bool apst_enabled;
381
382 /* PCIe only: */
383 u16 hmmaxd;
384 u32 hmpre;
385 u32 hmmin;
386 u32 hmminds;
387
388 /* Fabrics only */
389 u32 ioccsz;
390 u32 iorcsz;
391 u16 icdoff;
392 u16 maxcmd;
393 int nr_reconnects;
394 unsigned long flags;
395 struct nvmf_ctrl_options *opts;
396
397 struct page *discard_page;
398 unsigned long discard_page_busy;
399
400 struct nvme_fault_inject fault_inject;
401
402 enum nvme_ctrl_type cntrltype;
403 enum nvme_dctype dctype;
404 };
405
nvme_ctrl_state(struct nvme_ctrl * ctrl)406 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl)
407 {
408 return READ_ONCE(ctrl->state);
409 }
410
411 enum nvme_iopolicy {
412 NVME_IOPOLICY_NUMA,
413 NVME_IOPOLICY_RR,
414 };
415
416 struct nvme_subsystem {
417 int instance;
418 struct device dev;
419 /*
420 * Because we unregister the device on the last put we need
421 * a separate refcount.
422 */
423 struct kref ref;
424 struct list_head entry;
425 struct mutex lock;
426 struct list_head ctrls;
427 struct list_head nsheads;
428 char subnqn[NVMF_NQN_SIZE];
429 char serial[20];
430 char model[40];
431 char firmware_rev[8];
432 u8 cmic;
433 enum nvme_subsys_type subtype;
434 u16 vendor_id;
435 u16 awupf; /* 0's based awupf value. */
436 struct ida ns_ida;
437 #ifdef CONFIG_NVME_MULTIPATH
438 enum nvme_iopolicy iopolicy;
439 #endif
440 };
441
442 /*
443 * Container structure for uniqueue namespace identifiers.
444 */
445 struct nvme_ns_ids {
446 u8 eui64[8];
447 u8 nguid[16];
448 uuid_t uuid;
449 u8 csi;
450 };
451
452 /*
453 * Anchor structure for namespaces. There is one for each namespace in a
454 * NVMe subsystem that any of our controllers can see, and the namespace
455 * structure for each controller is chained of it. For private namespaces
456 * there is a 1:1 relation to our namespace structures, that is ->list
457 * only ever has a single entry for private namespaces.
458 */
459 struct nvme_ns_head {
460 struct list_head list;
461 struct srcu_struct srcu;
462 struct nvme_subsystem *subsys;
463 unsigned ns_id;
464 struct nvme_ns_ids ids;
465 struct list_head entry;
466 struct kref ref;
467 bool shared;
468 int instance;
469 struct nvme_effects_log *effects;
470
471 struct cdev cdev;
472 struct device cdev_device;
473
474 struct gendisk *disk;
475 #ifdef CONFIG_NVME_MULTIPATH
476 struct bio_list requeue_list;
477 spinlock_t requeue_lock;
478 struct work_struct requeue_work;
479 struct mutex lock;
480 unsigned long flags;
481 #define NVME_NSHEAD_DISK_LIVE 0
482 struct nvme_ns __rcu *current_path[];
483 #endif
484 };
485
nvme_ns_head_multipath(struct nvme_ns_head * head)486 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
487 {
488 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
489 }
490
491 enum nvme_ns_features {
492 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
493 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
494 NVME_NS_DEAC = 1 << 2, /* DEAC bit in Write Zeores supported */
495 };
496
497 struct nvme_ns {
498 struct list_head list;
499
500 struct nvme_ctrl *ctrl;
501 struct request_queue *queue;
502 struct gendisk *disk;
503 #ifdef CONFIG_NVME_MULTIPATH
504 enum nvme_ana_state ana_state;
505 u32 ana_grpid;
506 #endif
507 struct list_head siblings;
508 struct kref kref;
509 struct nvme_ns_head *head;
510
511 int lba_shift;
512 u16 ms;
513 u16 pi_size;
514 u16 sgs;
515 u32 sws;
516 u8 pi_type;
517 u8 guard_type;
518 #ifdef CONFIG_BLK_DEV_ZONED
519 u64 zsze;
520 #endif
521 unsigned long features;
522 unsigned long flags;
523 #define NVME_NS_REMOVING 0
524 #define NVME_NS_ANA_PENDING 2
525 #define NVME_NS_FORCE_RO 3
526 #define NVME_NS_READY 4
527
528 struct cdev cdev;
529 struct device cdev_device;
530
531 struct nvme_fault_inject fault_inject;
532
533 };
534
535 /* NVMe ns supports metadata actions by the controller (generate/strip) */
nvme_ns_has_pi(struct nvme_ns * ns)536 static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
537 {
538 return ns->pi_type && ns->ms == ns->pi_size;
539 }
540
541 struct nvme_ctrl_ops {
542 const char *name;
543 struct module *module;
544 unsigned int flags;
545 #define NVME_F_FABRICS (1 << 0)
546 #define NVME_F_METADATA_SUPPORTED (1 << 1)
547 #define NVME_F_BLOCKING (1 << 2)
548
549 const struct attribute_group **dev_attr_groups;
550 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
551 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
552 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
553 void (*free_ctrl)(struct nvme_ctrl *ctrl);
554 void (*submit_async_event)(struct nvme_ctrl *ctrl);
555 void (*delete_ctrl)(struct nvme_ctrl *ctrl);
556 void (*stop_ctrl)(struct nvme_ctrl *ctrl);
557 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
558 void (*print_device_info)(struct nvme_ctrl *ctrl);
559 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl);
560 };
561
562 /*
563 * nvme command_id is constructed as such:
564 * | xxxx | xxxxxxxxxxxx |
565 * gen request tag
566 */
567 #define nvme_genctr_mask(gen) (gen & 0xf)
568 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12)
569 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12)
570 #define nvme_tag_from_cid(cid) (cid & 0xfff)
571
nvme_cid(struct request * rq)572 static inline u16 nvme_cid(struct request *rq)
573 {
574 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
575 }
576
nvme_find_rq(struct blk_mq_tags * tags,u16 command_id)577 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
578 u16 command_id)
579 {
580 u8 genctr = nvme_genctr_from_cid(command_id);
581 u16 tag = nvme_tag_from_cid(command_id);
582 struct request *rq;
583
584 rq = blk_mq_tag_to_rq(tags, tag);
585 if (unlikely(!rq)) {
586 pr_err("could not locate request for tag %#x\n",
587 tag);
588 return NULL;
589 }
590 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
591 dev_err(nvme_req(rq)->ctrl->device,
592 "request %#x genctr mismatch (got %#x expected %#x)\n",
593 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
594 return NULL;
595 }
596 return rq;
597 }
598
nvme_cid_to_rq(struct blk_mq_tags * tags,u16 command_id)599 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
600 u16 command_id)
601 {
602 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
603 }
604
605 /*
606 * Return the length of the string without the space padding
607 */
nvme_strlen(char * s,int len)608 static inline int nvme_strlen(char *s, int len)
609 {
610 while (s[len - 1] == ' ')
611 len--;
612 return len;
613 }
614
nvme_print_device_info(struct nvme_ctrl * ctrl)615 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl)
616 {
617 struct nvme_subsystem *subsys = ctrl->subsys;
618
619 if (ctrl->ops->print_device_info) {
620 ctrl->ops->print_device_info(ctrl);
621 return;
622 }
623
624 dev_err(ctrl->device,
625 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id,
626 nvme_strlen(subsys->model, sizeof(subsys->model)),
627 subsys->model, nvme_strlen(subsys->firmware_rev,
628 sizeof(subsys->firmware_rev)),
629 subsys->firmware_rev);
630 }
631
632 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
633 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
634 const char *dev_name);
635 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
636 void nvme_should_fail(struct request *req);
637 #else
nvme_fault_inject_init(struct nvme_fault_inject * fault_inj,const char * dev_name)638 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
639 const char *dev_name)
640 {
641 }
nvme_fault_inject_fini(struct nvme_fault_inject * fault_inj)642 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
643 {
644 }
nvme_should_fail(struct request * req)645 static inline void nvme_should_fail(struct request *req) {}
646 #endif
647
648 bool nvme_wait_reset(struct nvme_ctrl *ctrl);
649 int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
650
nvme_reset_subsystem(struct nvme_ctrl * ctrl)651 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
652 {
653 int ret;
654
655 if (!ctrl->subsystem)
656 return -ENOTTY;
657 if (!nvme_wait_reset(ctrl))
658 return -EBUSY;
659
660 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
661 if (ret)
662 return ret;
663
664 return nvme_try_sched_reset(ctrl);
665 }
666
667 /*
668 * Convert a 512B sector number to a device logical block number.
669 */
nvme_sect_to_lba(struct nvme_ns * ns,sector_t sector)670 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
671 {
672 return sector >> (ns->lba_shift - SECTOR_SHIFT);
673 }
674
675 /*
676 * Convert a device logical block number to a 512B sector number.
677 */
nvme_lba_to_sect(struct nvme_ns * ns,u64 lba)678 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
679 {
680 return lba << (ns->lba_shift - SECTOR_SHIFT);
681 }
682
683 /*
684 * Convert byte length to nvme's 0-based num dwords
685 */
nvme_bytes_to_numd(size_t len)686 static inline u32 nvme_bytes_to_numd(size_t len)
687 {
688 return (len >> 2) - 1;
689 }
690
nvme_is_ana_error(u16 status)691 static inline bool nvme_is_ana_error(u16 status)
692 {
693 switch (status & 0x7ff) {
694 case NVME_SC_ANA_TRANSITION:
695 case NVME_SC_ANA_INACCESSIBLE:
696 case NVME_SC_ANA_PERSISTENT_LOSS:
697 return true;
698 default:
699 return false;
700 }
701 }
702
nvme_is_path_error(u16 status)703 static inline bool nvme_is_path_error(u16 status)
704 {
705 /* check for a status code type of 'path related status' */
706 return (status & 0x700) == 0x300;
707 }
708
709 /*
710 * Fill in the status and result information from the CQE, and then figure out
711 * if blk-mq will need to use IPI magic to complete the request, and if yes do
712 * so. If not let the caller complete the request without an indirect function
713 * call.
714 */
nvme_try_complete_req(struct request * req,__le16 status,union nvme_result result)715 static inline bool nvme_try_complete_req(struct request *req, __le16 status,
716 union nvme_result result)
717 {
718 struct nvme_request *rq = nvme_req(req);
719 struct nvme_ctrl *ctrl = rq->ctrl;
720
721 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
722 rq->genctr++;
723
724 rq->status = le16_to_cpu(status) >> 1;
725 rq->result = result;
726 /* inject error when permitted by fault injection framework */
727 nvme_should_fail(req);
728 if (unlikely(blk_should_fake_timeout(req->q)))
729 return true;
730 return blk_mq_complete_request_remote(req);
731 }
732
nvme_get_ctrl(struct nvme_ctrl * ctrl)733 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
734 {
735 get_device(ctrl->device);
736 }
737
nvme_put_ctrl(struct nvme_ctrl * ctrl)738 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
739 {
740 put_device(ctrl->device);
741 }
742
nvme_is_aen_req(u16 qid,__u16 command_id)743 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
744 {
745 return !qid &&
746 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
747 }
748
749 /*
750 * Returns true for sink states that can't ever transition back to live.
751 */
nvme_state_terminal(struct nvme_ctrl * ctrl)752 static inline bool nvme_state_terminal(struct nvme_ctrl *ctrl)
753 {
754 switch (nvme_ctrl_state(ctrl)) {
755 case NVME_CTRL_NEW:
756 case NVME_CTRL_LIVE:
757 case NVME_CTRL_RESETTING:
758 case NVME_CTRL_CONNECTING:
759 return false;
760 case NVME_CTRL_DELETING:
761 case NVME_CTRL_DELETING_NOIO:
762 case NVME_CTRL_DEAD:
763 return true;
764 default:
765 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state);
766 return true;
767 }
768 }
769
770 void nvme_end_req(struct request *req);
771 void nvme_complete_rq(struct request *req);
772 void nvme_complete_batch_req(struct request *req);
773
nvme_complete_batch(struct io_comp_batch * iob,void (* fn)(struct request * rq))774 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
775 void (*fn)(struct request *rq))
776 {
777 struct request *req;
778
779 rq_list_for_each(&iob->req_list, req) {
780 fn(req);
781 nvme_complete_batch_req(req);
782 }
783 blk_mq_end_request_batch(iob);
784 }
785
786 blk_status_t nvme_host_path_error(struct request *req);
787 bool nvme_cancel_request(struct request *req, void *data);
788 void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
789 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
790 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
791 enum nvme_ctrl_state new_state);
792 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown);
793 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
794 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
795 const struct nvme_ctrl_ops *ops, unsigned long quirks);
796 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
797 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
798 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
799 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended);
800 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
801 const struct blk_mq_ops *ops, unsigned int cmd_size);
802 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl);
803 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
804 const struct blk_mq_ops *ops, unsigned int nr_maps,
805 unsigned int cmd_size);
806 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl);
807
808 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
809
810 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
811 volatile union nvme_result *res);
812
813 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl);
814 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl);
815 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl);
816 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl);
817 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl);
818 void nvme_sync_queues(struct nvme_ctrl *ctrl);
819 void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
820 void nvme_unfreeze(struct nvme_ctrl *ctrl);
821 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
822 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
823 void nvme_start_freeze(struct nvme_ctrl *ctrl);
824
nvme_req_op(struct nvme_command * cmd)825 static inline enum req_op nvme_req_op(struct nvme_command *cmd)
826 {
827 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
828 }
829
830 #define NVME_QID_ANY -1
831 void nvme_init_request(struct request *req, struct nvme_command *cmd);
832 void nvme_cleanup_cmd(struct request *req);
833 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
834 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
835 struct request *req);
836 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
837 bool queue_live);
838
nvme_check_ready(struct nvme_ctrl * ctrl,struct request * rq,bool queue_live)839 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
840 bool queue_live)
841 {
842 if (likely(ctrl->state == NVME_CTRL_LIVE))
843 return true;
844 if (ctrl->ops->flags & NVME_F_FABRICS &&
845 ctrl->state == NVME_CTRL_DELETING)
846 return queue_live;
847 return __nvme_check_ready(ctrl, rq, queue_live);
848 }
849
850 /*
851 * NSID shall be unique for all shared namespaces, or if at least one of the
852 * following conditions is met:
853 * 1. Namespace Management is supported by the controller
854 * 2. ANA is supported by the controller
855 * 3. NVM Set are supported by the controller
856 *
857 * In other case, private namespace are not required to report a unique NSID.
858 */
nvme_is_unique_nsid(struct nvme_ctrl * ctrl,struct nvme_ns_head * head)859 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
860 struct nvme_ns_head *head)
861 {
862 return head->shared ||
863 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
864 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
865 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
866 }
867
868 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
869 void *buf, unsigned bufflen);
870 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
871 union nvme_result *result, void *buffer, unsigned bufflen,
872 int qid, int at_head,
873 blk_mq_req_flags_t flags);
874 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
875 unsigned int dword11, void *buffer, size_t buflen,
876 u32 *result);
877 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
878 unsigned int dword11, void *buffer, size_t buflen,
879 u32 *result);
880 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
881 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
882 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
883 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
884 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
885 void nvme_queue_scan(struct nvme_ctrl *ctrl);
886 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
887 void *log, size_t size, u64 offset);
888 bool nvme_tryget_ns_head(struct nvme_ns_head *head);
889 void nvme_put_ns_head(struct nvme_ns_head *head);
890 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
891 const struct file_operations *fops, struct module *owner);
892 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
893 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode,
894 unsigned int cmd, unsigned long arg);
895 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
896 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode,
897 unsigned int cmd, unsigned long arg);
898 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
899 unsigned long arg);
900 long nvme_dev_ioctl(struct file *file, unsigned int cmd,
901 unsigned long arg);
902 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
903 struct io_comp_batch *iob, unsigned int poll_flags);
904 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd,
905 unsigned int issue_flags);
906 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd,
907 unsigned int issue_flags);
908 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
909 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags);
910
911 extern const struct attribute_group *nvme_ns_id_attr_groups[];
912 extern const struct pr_ops nvme_pr_ops;
913 extern const struct block_device_operations nvme_ns_head_ops;
914 extern const struct attribute_group nvme_dev_attrs_group;
915 extern const struct attribute_group *nvme_subsys_attrs_groups[];
916 extern const struct attribute_group *nvme_dev_attr_groups[];
917 extern const struct block_device_operations nvme_bdev_ops;
918
919 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
920 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
921 #ifdef CONFIG_NVME_MULTIPATH
nvme_ctrl_use_ana(struct nvme_ctrl * ctrl)922 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
923 {
924 return ctrl->ana_log_buf != NULL;
925 }
926
927 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
928 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
929 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
930 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
931 void nvme_failover_req(struct request *req);
932 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
933 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
934 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid);
935 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
936 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
937 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
938 void nvme_mpath_update(struct nvme_ctrl *ctrl);
939 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
940 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
941 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
942 void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
943 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
944 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
945 void nvme_mpath_start_request(struct request *rq);
946 void nvme_mpath_end_request(struct request *rq);
947
nvme_trace_bio_complete(struct request * req)948 static inline void nvme_trace_bio_complete(struct request *req)
949 {
950 struct nvme_ns *ns = req->q->queuedata;
951
952 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio)
953 trace_block_bio_complete(ns->head->disk->queue, req->bio);
954 }
955
956 extern bool multipath;
957 extern struct device_attribute dev_attr_ana_grpid;
958 extern struct device_attribute dev_attr_ana_state;
959 extern struct device_attribute subsys_attr_iopolicy;
960
961 #else
962 #define multipath false
nvme_ctrl_use_ana(struct nvme_ctrl * ctrl)963 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
964 {
965 return false;
966 }
nvme_failover_req(struct request * req)967 static inline void nvme_failover_req(struct request *req)
968 {
969 }
nvme_kick_requeue_lists(struct nvme_ctrl * ctrl)970 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
971 {
972 }
nvme_mpath_alloc_disk(struct nvme_ctrl * ctrl,struct nvme_ns_head * head)973 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
974 struct nvme_ns_head *head)
975 {
976 return 0;
977 }
nvme_mpath_add_disk(struct nvme_ns * ns,__le32 anagrpid)978 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid)
979 {
980 }
nvme_mpath_remove_disk(struct nvme_ns_head * head)981 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
982 {
983 }
nvme_mpath_clear_current_path(struct nvme_ns * ns)984 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
985 {
986 return false;
987 }
nvme_mpath_revalidate_paths(struct nvme_ns * ns)988 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
989 {
990 }
nvme_mpath_clear_ctrl_paths(struct nvme_ctrl * ctrl)991 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
992 {
993 }
nvme_mpath_shutdown_disk(struct nvme_ns_head * head)994 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
995 {
996 }
nvme_trace_bio_complete(struct request * req)997 static inline void nvme_trace_bio_complete(struct request *req)
998 {
999 }
nvme_mpath_init_ctrl(struct nvme_ctrl * ctrl)1000 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
1001 {
1002 }
nvme_mpath_init_identify(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)1003 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
1004 struct nvme_id_ctrl *id)
1005 {
1006 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
1007 dev_warn(ctrl->device,
1008 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
1009 return 0;
1010 }
nvme_mpath_update(struct nvme_ctrl * ctrl)1011 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
1012 {
1013 }
nvme_mpath_uninit(struct nvme_ctrl * ctrl)1014 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
1015 {
1016 }
nvme_mpath_stop(struct nvme_ctrl * ctrl)1017 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
1018 {
1019 }
nvme_mpath_unfreeze(struct nvme_subsystem * subsys)1020 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
1021 {
1022 }
nvme_mpath_wait_freeze(struct nvme_subsystem * subsys)1023 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
1024 {
1025 }
nvme_mpath_start_freeze(struct nvme_subsystem * subsys)1026 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
1027 {
1028 }
nvme_mpath_default_iopolicy(struct nvme_subsystem * subsys)1029 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
1030 {
1031 }
nvme_mpath_start_request(struct request * rq)1032 static inline void nvme_mpath_start_request(struct request *rq)
1033 {
1034 }
nvme_mpath_end_request(struct request * rq)1035 static inline void nvme_mpath_end_request(struct request *rq)
1036 {
1037 }
1038 #endif /* CONFIG_NVME_MULTIPATH */
1039
1040 int nvme_revalidate_zones(struct nvme_ns *ns);
1041 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
1042 unsigned int nr_zones, report_zones_cb cb, void *data);
1043 #ifdef CONFIG_BLK_DEV_ZONED
1044 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
1045 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
1046 struct nvme_command *cmnd,
1047 enum nvme_zone_mgmt_action action);
1048 #else
nvme_setup_zone_mgmt_send(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd,enum nvme_zone_mgmt_action action)1049 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
1050 struct request *req, struct nvme_command *cmnd,
1051 enum nvme_zone_mgmt_action action)
1052 {
1053 return BLK_STS_NOTSUPP;
1054 }
1055
nvme_update_zone_info(struct nvme_ns * ns,unsigned lbaf)1056 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
1057 {
1058 dev_warn(ns->ctrl->device,
1059 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
1060 return -EPROTONOSUPPORT;
1061 }
1062 #endif
1063
nvme_get_ns_from_dev(struct device * dev)1064 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
1065 {
1066 return dev_to_disk(dev)->private_data;
1067 }
1068
1069 #ifdef CONFIG_NVME_HWMON
1070 int nvme_hwmon_init(struct nvme_ctrl *ctrl);
1071 void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
1072 #else
nvme_hwmon_init(struct nvme_ctrl * ctrl)1073 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
1074 {
1075 return 0;
1076 }
1077
nvme_hwmon_exit(struct nvme_ctrl * ctrl)1078 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
1079 {
1080 }
1081 #endif
1082
nvme_start_request(struct request * rq)1083 static inline void nvme_start_request(struct request *rq)
1084 {
1085 if (rq->cmd_flags & REQ_NVME_MPATH)
1086 nvme_mpath_start_request(rq);
1087 blk_mq_start_request(rq);
1088 }
1089
nvme_ctrl_sgl_supported(struct nvme_ctrl * ctrl)1090 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
1091 {
1092 return ctrl->sgls & ((1 << 0) | (1 << 1));
1093 }
1094
1095 #ifdef CONFIG_NVME_AUTH
1096 int __init nvme_init_auth(void);
1097 void __exit nvme_exit_auth(void);
1098 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl);
1099 void nvme_auth_stop(struct nvme_ctrl *ctrl);
1100 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid);
1101 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid);
1102 void nvme_auth_free(struct nvme_ctrl *ctrl);
1103 #else
nvme_auth_init_ctrl(struct nvme_ctrl * ctrl)1104 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl)
1105 {
1106 return 0;
1107 }
nvme_init_auth(void)1108 static inline int __init nvme_init_auth(void)
1109 {
1110 return 0;
1111 }
nvme_exit_auth(void)1112 static inline void __exit nvme_exit_auth(void)
1113 {
1114 }
nvme_auth_stop(struct nvme_ctrl * ctrl)1115 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {};
nvme_auth_negotiate(struct nvme_ctrl * ctrl,int qid)1116 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid)
1117 {
1118 return -EPROTONOSUPPORT;
1119 }
nvme_auth_wait(struct nvme_ctrl * ctrl,int qid)1120 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid)
1121 {
1122 return NVME_SC_AUTH_REQUIRED;
1123 }
nvme_auth_free(struct nvme_ctrl * ctrl)1124 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {};
1125 #endif
1126
1127 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1128 u8 opcode);
1129 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode);
1130 int nvme_execute_rq(struct request *rq, bool at_head);
1131 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1132 struct nvme_command *cmd, int status);
1133 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
1134 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
1135 bool nvme_get_ns(struct nvme_ns *ns);
1136 void nvme_put_ns(struct nvme_ns *ns);
1137
nvme_multi_css(struct nvme_ctrl * ctrl)1138 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
1139 {
1140 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
1141 }
1142
1143 #ifdef CONFIG_NVME_VERBOSE_ERRORS
1144 const unsigned char *nvme_get_error_status_str(u16 status);
1145 const unsigned char *nvme_get_opcode_str(u8 opcode);
1146 const unsigned char *nvme_get_admin_opcode_str(u8 opcode);
1147 const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode);
1148 #else /* CONFIG_NVME_VERBOSE_ERRORS */
nvme_get_error_status_str(u16 status)1149 static inline const unsigned char *nvme_get_error_status_str(u16 status)
1150 {
1151 return "I/O Error";
1152 }
nvme_get_opcode_str(u8 opcode)1153 static inline const unsigned char *nvme_get_opcode_str(u8 opcode)
1154 {
1155 return "I/O Cmd";
1156 }
nvme_get_admin_opcode_str(u8 opcode)1157 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
1158 {
1159 return "Admin Cmd";
1160 }
1161
nvme_get_fabrics_opcode_str(u8 opcode)1162 static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode)
1163 {
1164 return "Fabrics Cmd";
1165 }
1166 #endif /* CONFIG_NVME_VERBOSE_ERRORS */
1167
nvme_opcode_str(int qid,u8 opcode,u8 fctype)1168 static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype)
1169 {
1170 if (opcode == nvme_fabrics_command)
1171 return nvme_get_fabrics_opcode_str(fctype);
1172 return qid ? nvme_get_opcode_str(opcode) :
1173 nvme_get_admin_opcode_str(opcode);
1174 }
1175 #endif /* _NVME_H */
1176