1bc50ad75SChristoph Hellwig /* SPDX-License-Identifier: GPL-2.0 */ 257dacad5SJay Sternberg /* 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg */ 557dacad5SJay Sternberg 657dacad5SJay Sternberg #ifndef _NVME_H 757dacad5SJay Sternberg #define _NVME_H 857dacad5SJay Sternberg 957dacad5SJay Sternberg #include <linux/nvme.h> 10a6a5149bSChristoph Hellwig #include <linux/cdev.h> 1157dacad5SJay Sternberg #include <linux/pci.h> 1257dacad5SJay Sternberg #include <linux/kref.h> 1357dacad5SJay Sternberg #include <linux/blk-mq.h> 14a98e58e5SScott Bauer #include <linux/sed-opal.h> 15b9e03857SThomas Tai #include <linux/fault-inject.h> 16978628ecSJohannes Thumshirn #include <linux/rcupdate.h> 17c1ac9a4bSKeith Busch #include <linux/wait.h> 184d2ce688SJames Smart #include <linux/t10-pi.h> 1957dacad5SJay Sternberg 2035fe0d12SHannes Reinecke #include <trace/events/block.h> 2135fe0d12SHannes Reinecke 228ae4e447SMarc Olson extern unsigned int nvme_io_timeout; 2357dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2457dacad5SJay Sternberg 258ae4e447SMarc Olson extern unsigned int admin_timeout; 26dc96f938SChaitanya Kulkarni #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 2721d34711SChristoph Hellwig 28038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 29038bd4cbSSagi Grimberg 3038e18002SIsrael Rukshin #ifdef CONFIG_ARCH_NO_SG_CHAIN 3138e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 0 32ba7ca2aeSIsrael Rukshin #define NVME_INLINE_METADATA_SG_CNT 0 3338e18002SIsrael Rukshin #else 3438e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 2 35ba7ca2aeSIsrael Rukshin #define NVME_INLINE_METADATA_SG_CNT 1 3638e18002SIsrael Rukshin #endif 3738e18002SIsrael Rukshin 386c3c05b0SChaitanya Kulkarni /* 396c3c05b0SChaitanya Kulkarni * Default to a 4K page size, with the intention to update this 406c3c05b0SChaitanya Kulkarni * path in the future to accommodate architectures with differing 416c3c05b0SChaitanya Kulkarni * kernel and IO page sizes. 426c3c05b0SChaitanya Kulkarni */ 436c3c05b0SChaitanya Kulkarni #define NVME_CTRL_PAGE_SHIFT 12 446c3c05b0SChaitanya Kulkarni #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 456c3c05b0SChaitanya Kulkarni 469a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 47b227c59bSRoy Shterman extern struct workqueue_struct *nvme_reset_wq; 48b227c59bSRoy Shterman extern struct workqueue_struct *nvme_delete_wq; 499a6327d2SSagi Grimberg 5057dacad5SJay Sternberg /* 51106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 52106198edSChristoph Hellwig * the standard. 5357dacad5SJay Sternberg */ 54106198edSChristoph Hellwig enum nvme_quirks { 55106198edSChristoph Hellwig /* 56106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 57106198edSChristoph Hellwig * specific Identify field. 58106198edSChristoph Hellwig */ 59106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 60540c801cSKeith Busch 61540c801cSKeith Busch /* 62540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 63540c801cSKeith Busch * correctly. 64540c801cSKeith Busch */ 65540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 6608095e70SKeith Busch 6708095e70SKeith Busch /* 68e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 69e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 7008095e70SKeith Busch */ 71e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 7254adc010SGuilherme G. Piccoli 7354adc010SGuilherme G. Piccoli /* 7454adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 7554adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 7654adc010SGuilherme G. Piccoli */ 7754adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 78c5552fdeSAndy Lutomirski 79c5552fdeSAndy Lutomirski /* 80c5552fdeSAndy Lutomirski * APST should not be used. 81c5552fdeSAndy Lutomirski */ 82c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 83ff5350a8SAndy Lutomirski 84ff5350a8SAndy Lutomirski /* 85ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 86ff5350a8SAndy Lutomirski */ 87ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 88608cc4b1SChristoph Hellwig 89608cc4b1SChristoph Hellwig /* 909abd68efSJens Axboe * Set MEDIUM priority on SQ creation 919abd68efSJens Axboe */ 929abd68efSJens Axboe NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 936299358dSJames Dingwall 946299358dSJames Dingwall /* 956299358dSJames Dingwall * Ignore device provided subnqn. 966299358dSJames Dingwall */ 976299358dSJames Dingwall NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 987b210e4eSChristoph Hellwig 997b210e4eSChristoph Hellwig /* 1007b210e4eSChristoph Hellwig * Broken Write Zeroes. 1017b210e4eSChristoph Hellwig */ 1027b210e4eSChristoph Hellwig NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 103cb32de1bSMario Limonciello 104cb32de1bSMario Limonciello /* 105cb32de1bSMario Limonciello * Force simple suspend/resume path. 106cb32de1bSMario Limonciello */ 107cb32de1bSMario Limonciello NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 1087ad67ca5SLinus Torvalds 1097ad67ca5SLinus Torvalds /* 11066341331SBenjamin Herrenschmidt * Use only one interrupt vector for all queues 11166341331SBenjamin Herrenschmidt */ 1127ad67ca5SLinus Torvalds NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 11366341331SBenjamin Herrenschmidt 11466341331SBenjamin Herrenschmidt /* 11566341331SBenjamin Herrenschmidt * Use non-standard 128 bytes SQEs. 11666341331SBenjamin Herrenschmidt */ 1177ad67ca5SLinus Torvalds NVME_QUIRK_128_BYTES_SQES = (1 << 12), 118d38e9f04SBenjamin Herrenschmidt 119d38e9f04SBenjamin Herrenschmidt /* 120d38e9f04SBenjamin Herrenschmidt * Prevent tag overlap between queues 121d38e9f04SBenjamin Herrenschmidt */ 1227ad67ca5SLinus Torvalds NVME_QUIRK_SHARED_TAGS = (1 << 13), 1236c6aa2f2SAkinobu Mita 1246c6aa2f2SAkinobu Mita /* 1256c6aa2f2SAkinobu Mita * Don't change the value of the temperature threshold feature 1266c6aa2f2SAkinobu Mita */ 1276c6aa2f2SAkinobu Mita NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 1285bedd3afSChristoph Hellwig 1295bedd3afSChristoph Hellwig /* 1305bedd3afSChristoph Hellwig * The controller doesn't handle the Identify Namespace 1315bedd3afSChristoph Hellwig * Identification Descriptor list subcommand despite claiming 1325bedd3afSChristoph Hellwig * NVMe 1.3 compliance. 1335bedd3afSChristoph Hellwig */ 1345bedd3afSChristoph Hellwig NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 1354bdf2603SFilippo Sironi 1364bdf2603SFilippo Sironi /* 1374bdf2603SFilippo Sironi * The controller does not properly handle DMA addresses over 1384bdf2603SFilippo Sironi * 48 bits. 1394bdf2603SFilippo Sironi */ 1404bdf2603SFilippo Sironi NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 141a2941f6aSKeith Busch 142a2941f6aSKeith Busch /* 143b7df575fSXiang wangx * The controller requires the command_id value be limited, so skip 144a2941f6aSKeith Busch * encoding the generation sequence number. 145a2941f6aSKeith Busch */ 146a2941f6aSKeith Busch NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 14700ff400eSChristoph Hellwig 14800ff400eSChristoph Hellwig /* 14900ff400eSChristoph Hellwig * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 15000ff400eSChristoph Hellwig */ 15100ff400eSChristoph Hellwig NVME_QUIRK_BOGUS_NID = (1 << 18), 152106198edSChristoph Hellwig }; 153106198edSChristoph Hellwig 154d49187e9SChristoph Hellwig /* 155d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 156d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 157d49187e9SChristoph Hellwig */ 158d49187e9SChristoph Hellwig struct nvme_request { 159d49187e9SChristoph Hellwig struct nvme_command *cmd; 160d49187e9SChristoph Hellwig union nvme_result result; 161e7006de6SSagi Grimberg u8 genctr; 16244e44b29SChristoph Hellwig u8 retries; 16327fa9bc5SChristoph Hellwig u8 flags; 16427fa9bc5SChristoph Hellwig u16 status; 16559e29ce6SSagi Grimberg struct nvme_ctrl *ctrl; 16627fa9bc5SChristoph Hellwig }; 16727fa9bc5SChristoph Hellwig 16832acab31SChristoph Hellwig /* 16932acab31SChristoph Hellwig * Mark a bio as coming in through the mpath node. 17032acab31SChristoph Hellwig */ 17132acab31SChristoph Hellwig #define REQ_NVME_MPATH REQ_DRV 17232acab31SChristoph Hellwig 17327fa9bc5SChristoph Hellwig enum { 17427fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 175bb06ec31SJames Smart NVME_REQ_USERCMD = (1 << 1), 176d49187e9SChristoph Hellwig }; 177d49187e9SChristoph Hellwig 178d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 179d49187e9SChristoph Hellwig { 180d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 181d49187e9SChristoph Hellwig } 182d49187e9SChristoph Hellwig 1835d87eb94SKeith Busch static inline u16 nvme_req_qid(struct request *req) 1845d87eb94SKeith Busch { 185643c476dSKeith Busch if (!req->q->queuedata) 1865d87eb94SKeith Busch return 0; 18784115d6dSBaolin Wang 18884115d6dSBaolin Wang return req->mq_hctx->queue_num + 1; 1895d87eb94SKeith Busch } 1905d87eb94SKeith Busch 19154adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 19254adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 19354adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 19454adc010SGuilherme G. Piccoli * found empirically. 19554adc010SGuilherme G. Piccoli */ 1968c97eeccSJeff Lien #define NVME_QUIRK_DELAY_AMOUNT 2300 19754adc010SGuilherme G. Piccoli 1984212f4e9SSagi Grimberg /* 1994212f4e9SSagi Grimberg * enum nvme_ctrl_state: Controller state 2004212f4e9SSagi Grimberg * 2014212f4e9SSagi Grimberg * @NVME_CTRL_NEW: New controller just allocated, initial state 2024212f4e9SSagi Grimberg * @NVME_CTRL_LIVE: Controller is connected and I/O capable 2034212f4e9SSagi Grimberg * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 2044212f4e9SSagi Grimberg * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 2054212f4e9SSagi Grimberg * transport 2064212f4e9SSagi Grimberg * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 207ecca390eSSagi Grimberg * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 208ecca390eSSagi Grimberg * disabled/failed immediately. This state comes 209ecca390eSSagi Grimberg * after all async event processing took place and 210ecca390eSSagi Grimberg * before ns removal and the controller deletion 211ecca390eSSagi Grimberg * progress 2124212f4e9SSagi Grimberg * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 2134212f4e9SSagi Grimberg * shutdown or removal. In this case we forcibly 2144212f4e9SSagi Grimberg * kill all inflight I/O as they have no chance to 2154212f4e9SSagi Grimberg * complete 2164212f4e9SSagi Grimberg */ 217bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 218bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 219bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 220bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 221ad6a0a52SMax Gurtovoy NVME_CTRL_CONNECTING, 222bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 223ecca390eSSagi Grimberg NVME_CTRL_DELETING_NOIO, 2240ff9d4e1SKeith Busch NVME_CTRL_DEAD, 225bb8d261eSChristoph Hellwig }; 226bb8d261eSChristoph Hellwig 227a3646451SAkinobu Mita struct nvme_fault_inject { 228a3646451SAkinobu Mita #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 229a3646451SAkinobu Mita struct fault_attr attr; 230a3646451SAkinobu Mita struct dentry *parent; 231a3646451SAkinobu Mita bool dont_retry; /* DNR, do not retry */ 232a3646451SAkinobu Mita u16 status; /* status code */ 233a3646451SAkinobu Mita #endif 234a3646451SAkinobu Mita }; 235a3646451SAkinobu Mita 236bf093d97SSagi Grimberg enum nvme_ctrl_flags { 237bf093d97SSagi Grimberg NVME_CTRL_FAILFAST_EXPIRED = 0, 238bf093d97SSagi Grimberg NVME_CTRL_ADMIN_Q_STOPPED = 1, 239f46ef9e8SSagi Grimberg NVME_CTRL_STARTED_ONCE = 2, 240bf093d97SSagi Grimberg }; 241bf093d97SSagi Grimberg 2421c63dc66SChristoph Hellwig struct nvme_ctrl { 2436e3ca03eSSagi Grimberg bool comp_seen; 244bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 245bd4da3abSAndy Lutomirski bool identified; 246bb8d261eSChristoph Hellwig spinlock_t lock; 247e7ad43c3SKeith Busch struct mutex scan_lock; 2481c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 24957dacad5SJay Sternberg struct request_queue *admin_q; 25007bfcd09SChristoph Hellwig struct request_queue *connect_q; 251e7832cb4SSagi Grimberg struct request_queue *fabrics_q; 25257dacad5SJay Sternberg struct device *dev; 25357dacad5SJay Sternberg int instance; 254103e515eSHannes Reinecke int numa_node; 2555bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 25634b6c231SSagi Grimberg struct blk_mq_tag_set *admin_tagset; 2575bae7f73SChristoph Hellwig struct list_head namespaces; 258765cc031SJianchao Wang struct rw_semaphore namespaces_rwsem; 259d22524a4SChristoph Hellwig struct device ctrl_device; 2605bae7f73SChristoph Hellwig struct device *device; /* char device */ 261ed7770f6SHannes Reinecke #ifdef CONFIG_NVME_HWMON 262ed7770f6SHannes Reinecke struct device *hwmon_device; 263ed7770f6SHannes Reinecke #endif 264a6a5149bSChristoph Hellwig struct cdev cdev; 265d86c4d8eSChristoph Hellwig struct work_struct reset_work; 266c5017e85SChristoph Hellwig struct work_struct delete_work; 267c1ac9a4bSKeith Busch wait_queue_head_t state_wq; 2681c63dc66SChristoph Hellwig 269ab9e00ccSChristoph Hellwig struct nvme_subsystem *subsys; 270ab9e00ccSChristoph Hellwig struct list_head subsys_entry; 271ab9e00ccSChristoph Hellwig 2724f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 273a98e58e5SScott Bauer 27457dacad5SJay Sternberg char name[12]; 27576e3914aSChristoph Hellwig u16 cntlid; 2765fd4ce1bSChristoph Hellwig 2775fd4ce1bSChristoph Hellwig u32 ctrl_config; 278b6dccf7fSArnav Dawn u16 mtfa; 279d858e5f0SSagi Grimberg u32 queue_count; 2805fd4ce1bSChristoph Hellwig 28120d0dfe6SSagi Grimberg u64 cap; 28257dacad5SJay Sternberg u32 max_hw_sectors; 283943e942eSJens Axboe u32 max_segments; 28495093350SMax Gurtovoy u32 max_integrity_segments; 2855befc7c2SKeith Busch u32 max_discard_sectors; 2865befc7c2SKeith Busch u32 max_discard_segments; 2875befc7c2SKeith Busch u32 max_zeroes_sectors; 288240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 289240e6ee2SKeith Busch u32 max_zone_append; 290240e6ee2SKeith Busch #endif 29149cd84b6SKeith Busch u16 crdt[3]; 29257dacad5SJay Sternberg u16 oncs; 2931a86924eSTom Yan u32 dmrsl; 2948a9ae523SScott Bauer u16 oacs; 295f968688fSKeith Busch u16 sqsize; 2960d0b660fSChristoph Hellwig u32 max_namespaces; 2976bf25d16SChristoph Hellwig atomic_t abort_limit; 29857dacad5SJay Sternberg u8 vwc; 299f3ca80fcSChristoph Hellwig u32 vs; 30007bfcd09SChristoph Hellwig u32 sgls; 301038bd4cbSSagi Grimberg u16 kas; 302c5552fdeSAndy Lutomirski u8 npss; 303c5552fdeSAndy Lutomirski u8 apsta; 304400b6a7bSGuenter Roeck u16 wctemp; 305400b6a7bSGuenter Roeck u16 cctemp; 306c0561f82SHannes Reinecke u32 oaes; 307e3d7874dSKeith Busch u32 aen_result; 3083e53ba38SSagi Grimberg u32 ctratt; 30907fbd32aSMartin K. Petersen unsigned int shutdown_timeout; 310038bd4cbSSagi Grimberg unsigned int kato; 311f3ca80fcSChristoph Hellwig bool subsystem; 312106198edSChristoph Hellwig unsigned long quirks; 313c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 31484fef62dSKeith Busch struct nvme_effects_log *effects; 3151cf7a12eSChaitanya Kulkarni struct xarray cels; 3165955be21SChristoph Hellwig struct work_struct scan_work; 317f866fc42SChristoph Hellwig struct work_struct async_event_work; 318038bd4cbSSagi Grimberg struct delayed_work ka_work; 3198c4dfea9SVictor Gladkov struct delayed_work failfast_work; 3200a34e466SRoland Dreier struct nvme_command ka_cmd; 321b6dccf7fSArnav Dawn struct work_struct fw_act_work; 32230d90964SChristoph Hellwig unsigned long events; 32307bfcd09SChristoph Hellwig 3240d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 3250d0b660fSChristoph Hellwig /* asymmetric namespace access: */ 3260d0b660fSChristoph Hellwig u8 anacap; 3270d0b660fSChristoph Hellwig u8 anatt; 3280d0b660fSChristoph Hellwig u32 anagrpmax; 3290d0b660fSChristoph Hellwig u32 nanagrpid; 3300d0b660fSChristoph Hellwig struct mutex ana_lock; 3310d0b660fSChristoph Hellwig struct nvme_ana_rsp_hdr *ana_log_buf; 3320d0b660fSChristoph Hellwig size_t ana_log_size; 3330d0b660fSChristoph Hellwig struct timer_list anatt_timer; 3340d0b660fSChristoph Hellwig struct work_struct ana_work; 3350d0b660fSChristoph Hellwig #endif 3360d0b660fSChristoph Hellwig 337f50fff73SHannes Reinecke #ifdef CONFIG_NVME_AUTH 338f50fff73SHannes Reinecke struct work_struct dhchap_auth_work; 339f50fff73SHannes Reinecke struct list_head dhchap_auth_list; 340f50fff73SHannes Reinecke struct mutex dhchap_auth_mutex; 341f50fff73SHannes Reinecke struct nvme_dhchap_key *host_key; 342f50fff73SHannes Reinecke struct nvme_dhchap_key *ctrl_key; 343f50fff73SHannes Reinecke u16 transaction; 344f50fff73SHannes Reinecke #endif 345f50fff73SHannes Reinecke 346c5552fdeSAndy Lutomirski /* Power saving configuration */ 347c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 34876a5af84SKai-Heng Feng bool apst_enabled; 349c5552fdeSAndy Lutomirski 350044a9df1SChristoph Hellwig /* PCIe only: */ 351fe6d53c9SChristoph Hellwig u32 hmpre; 352fe6d53c9SChristoph Hellwig u32 hmmin; 353044a9df1SChristoph Hellwig u32 hmminds; 354044a9df1SChristoph Hellwig u16 hmmaxd; 355fe6d53c9SChristoph Hellwig 35607bfcd09SChristoph Hellwig /* Fabrics only */ 35707bfcd09SChristoph Hellwig u32 ioccsz; 35807bfcd09SChristoph Hellwig u32 iorcsz; 35907bfcd09SChristoph Hellwig u16 icdoff; 36007bfcd09SChristoph Hellwig u16 maxcmd; 361fdf9dfa8SSagi Grimberg int nr_reconnects; 3628c4dfea9SVictor Gladkov unsigned long flags; 36307bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 364cb5b7262SJens Axboe 365cb5b7262SJens Axboe struct page *discard_page; 366cb5b7262SJens Axboe unsigned long discard_page_busy; 367f79d5fdaSAkinobu Mita 368f79d5fdaSAkinobu Mita struct nvme_fault_inject fault_inject; 36986c2457aSMartin Belanger 37086c2457aSMartin Belanger enum nvme_ctrl_type cntrltype; 37186c2457aSMartin Belanger enum nvme_dctype dctype; 37257dacad5SJay Sternberg }; 37357dacad5SJay Sternberg 37475c10e73SHannes Reinecke enum nvme_iopolicy { 37575c10e73SHannes Reinecke NVME_IOPOLICY_NUMA, 37675c10e73SHannes Reinecke NVME_IOPOLICY_RR, 37775c10e73SHannes Reinecke }; 37875c10e73SHannes Reinecke 379ab9e00ccSChristoph Hellwig struct nvme_subsystem { 380ab9e00ccSChristoph Hellwig int instance; 381ab9e00ccSChristoph Hellwig struct device dev; 382ab9e00ccSChristoph Hellwig /* 383ab9e00ccSChristoph Hellwig * Because we unregister the device on the last put we need 384ab9e00ccSChristoph Hellwig * a separate refcount. 385ab9e00ccSChristoph Hellwig */ 386ab9e00ccSChristoph Hellwig struct kref ref; 387ab9e00ccSChristoph Hellwig struct list_head entry; 388ab9e00ccSChristoph Hellwig struct mutex lock; 389ab9e00ccSChristoph Hellwig struct list_head ctrls; 390ed754e5dSChristoph Hellwig struct list_head nsheads; 391ab9e00ccSChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 392ab9e00ccSChristoph Hellwig char serial[20]; 393ab9e00ccSChristoph Hellwig char model[40]; 394ab9e00ccSChristoph Hellwig char firmware_rev[8]; 395ab9e00ccSChristoph Hellwig u8 cmic; 396954ae166SHannes Reinecke enum nvme_subsys_type subtype; 397ab9e00ccSChristoph Hellwig u16 vendor_id; 39881adb863SBart Van Assche u16 awupf; /* 0's based awupf value. */ 399ed754e5dSChristoph Hellwig struct ida ns_ida; 40075c10e73SHannes Reinecke #ifdef CONFIG_NVME_MULTIPATH 40175c10e73SHannes Reinecke enum nvme_iopolicy iopolicy; 40275c10e73SHannes Reinecke #endif 403ab9e00ccSChristoph Hellwig }; 404ab9e00ccSChristoph Hellwig 405002fab04SChristoph Hellwig /* 406002fab04SChristoph Hellwig * Container structure for uniqueue namespace identifiers. 407002fab04SChristoph Hellwig */ 408002fab04SChristoph Hellwig struct nvme_ns_ids { 409002fab04SChristoph Hellwig u8 eui64[8]; 410002fab04SChristoph Hellwig u8 nguid[16]; 411002fab04SChristoph Hellwig uuid_t uuid; 41271010c30SNiklas Cassel u8 csi; 413002fab04SChristoph Hellwig }; 414002fab04SChristoph Hellwig 415ed754e5dSChristoph Hellwig /* 416ed754e5dSChristoph Hellwig * Anchor structure for namespaces. There is one for each namespace in a 417ed754e5dSChristoph Hellwig * NVMe subsystem that any of our controllers can see, and the namespace 418ed754e5dSChristoph Hellwig * structure for each controller is chained of it. For private namespaces 419ed754e5dSChristoph Hellwig * there is a 1:1 relation to our namespace structures, that is ->list 420ed754e5dSChristoph Hellwig * only ever has a single entry for private namespaces. 421ed754e5dSChristoph Hellwig */ 422ed754e5dSChristoph Hellwig struct nvme_ns_head { 423ed754e5dSChristoph Hellwig struct list_head list; 424ed754e5dSChristoph Hellwig struct srcu_struct srcu; 425ed754e5dSChristoph Hellwig struct nvme_subsystem *subsys; 426ed754e5dSChristoph Hellwig unsigned ns_id; 427ed754e5dSChristoph Hellwig struct nvme_ns_ids ids; 428ed754e5dSChristoph Hellwig struct list_head entry; 429ed754e5dSChristoph Hellwig struct kref ref; 4300c284db7SKeith Busch bool shared; 431ed754e5dSChristoph Hellwig int instance; 432be93e87eSKeith Busch struct nvme_effects_log *effects; 4332637baedSMinwoo Im 4342637baedSMinwoo Im struct cdev cdev; 4352637baedSMinwoo Im struct device cdev_device; 4362637baedSMinwoo Im 437f3334447SChristoph Hellwig struct gendisk *disk; 43830897388SMinwoo Im #ifdef CONFIG_NVME_MULTIPATH 439f3334447SChristoph Hellwig struct bio_list requeue_list; 440f3334447SChristoph Hellwig spinlock_t requeue_lock; 441f3334447SChristoph Hellwig struct work_struct requeue_work; 442f3334447SChristoph Hellwig struct mutex lock; 443d8a22f85SAnton Eidelman unsigned long flags; 444d8a22f85SAnton Eidelman #define NVME_NSHEAD_DISK_LIVE 0 445f3334447SChristoph Hellwig struct nvme_ns __rcu *current_path[]; 446f3334447SChristoph Hellwig #endif 447ed754e5dSChristoph Hellwig }; 448ed754e5dSChristoph Hellwig 44930897388SMinwoo Im static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 45030897388SMinwoo Im { 45130897388SMinwoo Im return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 45230897388SMinwoo Im } 45330897388SMinwoo Im 454ffc89b1dSMax Gurtovoy enum nvme_ns_features { 455ffc89b1dSMax Gurtovoy NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 456b29f8485SMax Gurtovoy NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 457ffc89b1dSMax Gurtovoy }; 458ffc89b1dSMax Gurtovoy 45957dacad5SJay Sternberg struct nvme_ns { 46057dacad5SJay Sternberg struct list_head list; 46157dacad5SJay Sternberg 4621c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 46357dacad5SJay Sternberg struct request_queue *queue; 46457dacad5SJay Sternberg struct gendisk *disk; 4650d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 4660d0b660fSChristoph Hellwig enum nvme_ana_state ana_state; 4670d0b660fSChristoph Hellwig u32 ana_grpid; 4680d0b660fSChristoph Hellwig #endif 469ed754e5dSChristoph Hellwig struct list_head siblings; 47057dacad5SJay Sternberg struct kref kref; 471ed754e5dSChristoph Hellwig struct nvme_ns_head *head; 47257dacad5SJay Sternberg 47357dacad5SJay Sternberg int lba_shift; 47457dacad5SJay Sternberg u16 ms; 4754020aad8SKeith Busch u16 pi_size; 476f5d11840SJens Axboe u16 sgs; 477f5d11840SJens Axboe u32 sws; 47857dacad5SJay Sternberg u8 pi_type; 4794020aad8SKeith Busch u8 guard_type; 480240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 481240e6ee2SKeith Busch u64 zsze; 482240e6ee2SKeith Busch #endif 483ffc89b1dSMax Gurtovoy unsigned long features; 484646017a6SKeith Busch unsigned long flags; 485646017a6SKeith Busch #define NVME_NS_REMOVING 0 48669d9a99cSKeith Busch #define NVME_NS_DEAD 1 4870d0b660fSChristoph Hellwig #define NVME_NS_ANA_PENDING 2 4882f4c9ba2SJavier González #define NVME_NS_FORCE_RO 3 489e7d65803SHannes Reinecke #define NVME_NS_READY 4 4909e6a6b12SMing Lei #define NVME_NS_STOPPED 5 491b9e03857SThomas Tai 4922637baedSMinwoo Im struct cdev cdev; 4932637baedSMinwoo Im struct device cdev_device; 4942637baedSMinwoo Im 495b9e03857SThomas Tai struct nvme_fault_inject fault_inject; 496b9e03857SThomas Tai 49757dacad5SJay Sternberg }; 49857dacad5SJay Sternberg 4994d2ce688SJames Smart /* NVMe ns supports metadata actions by the controller (generate/strip) */ 5004d2ce688SJames Smart static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 5014d2ce688SJames Smart { 5024020aad8SKeith Busch return ns->pi_type && ns->ms == ns->pi_size; 5034d2ce688SJames Smart } 5044d2ce688SJames Smart 5051c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 5061a353d85SMing Lin const char *name; 507e439bb12SSagi Grimberg struct module *module; 508d3d5b87dSChristoph Hellwig unsigned int flags; 509d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 510c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 5111c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 5125fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 5137fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 5141673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 515ad22c355SKeith Busch void (*submit_async_event)(struct nvme_ctrl *ctrl); 516c5017e85SChristoph Hellwig void (*delete_ctrl)(struct nvme_ctrl *ctrl); 517f7f70f4aSRuozhu Li void (*stop_ctrl)(struct nvme_ctrl *ctrl); 5181a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 5192f0dad17SKeith Busch void (*print_device_info)(struct nvme_ctrl *ctrl); 5202f859441SLogan Gunthorpe bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 52157dacad5SJay Sternberg }; 52257dacad5SJay Sternberg 523e7006de6SSagi Grimberg /* 524e7006de6SSagi Grimberg * nvme command_id is constructed as such: 525e7006de6SSagi Grimberg * | xxxx | xxxxxxxxxxxx | 526e7006de6SSagi Grimberg * gen request tag 527e7006de6SSagi Grimberg */ 528e7006de6SSagi Grimberg #define nvme_genctr_mask(gen) (gen & 0xf) 529e7006de6SSagi Grimberg #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 530e7006de6SSagi Grimberg #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 531e7006de6SSagi Grimberg #define nvme_tag_from_cid(cid) (cid & 0xfff) 532e7006de6SSagi Grimberg 533e7006de6SSagi Grimberg static inline u16 nvme_cid(struct request *rq) 534e7006de6SSagi Grimberg { 535e7006de6SSagi Grimberg return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 536e7006de6SSagi Grimberg } 537e7006de6SSagi Grimberg 538e7006de6SSagi Grimberg static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 539e7006de6SSagi Grimberg u16 command_id) 540e7006de6SSagi Grimberg { 541e7006de6SSagi Grimberg u8 genctr = nvme_genctr_from_cid(command_id); 542e7006de6SSagi Grimberg u16 tag = nvme_tag_from_cid(command_id); 543e7006de6SSagi Grimberg struct request *rq; 544e7006de6SSagi Grimberg 545e7006de6SSagi Grimberg rq = blk_mq_tag_to_rq(tags, tag); 546e7006de6SSagi Grimberg if (unlikely(!rq)) { 547e7006de6SSagi Grimberg pr_err("could not locate request for tag %#x\n", 548e7006de6SSagi Grimberg tag); 549e7006de6SSagi Grimberg return NULL; 550e7006de6SSagi Grimberg } 551e7006de6SSagi Grimberg if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 552e7006de6SSagi Grimberg dev_err(nvme_req(rq)->ctrl->device, 553e7006de6SSagi Grimberg "request %#x genctr mismatch (got %#x expected %#x)\n", 554e7006de6SSagi Grimberg tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 555e7006de6SSagi Grimberg return NULL; 556e7006de6SSagi Grimberg } 557e7006de6SSagi Grimberg return rq; 558e7006de6SSagi Grimberg } 559e7006de6SSagi Grimberg 560e7006de6SSagi Grimberg static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 561e7006de6SSagi Grimberg u16 command_id) 562e7006de6SSagi Grimberg { 563e7006de6SSagi Grimberg return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 564e7006de6SSagi Grimberg } 565e7006de6SSagi Grimberg 5662f0dad17SKeith Busch /* 5672f0dad17SKeith Busch * Return the length of the string without the space padding 5682f0dad17SKeith Busch */ 5692f0dad17SKeith Busch static inline int nvme_strlen(char *s, int len) 5702f0dad17SKeith Busch { 5712f0dad17SKeith Busch while (s[len - 1] == ' ') 5722f0dad17SKeith Busch len--; 5732f0dad17SKeith Busch return len; 5742f0dad17SKeith Busch } 5752f0dad17SKeith Busch 5762f0dad17SKeith Busch static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 5772f0dad17SKeith Busch { 5782f0dad17SKeith Busch struct nvme_subsystem *subsys = ctrl->subsys; 5792f0dad17SKeith Busch 5802f0dad17SKeith Busch if (ctrl->ops->print_device_info) { 5812f0dad17SKeith Busch ctrl->ops->print_device_info(ctrl); 5822f0dad17SKeith Busch return; 5832f0dad17SKeith Busch } 5842f0dad17SKeith Busch 5852f0dad17SKeith Busch dev_err(ctrl->device, 5862f0dad17SKeith Busch "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 5872f0dad17SKeith Busch nvme_strlen(subsys->model, sizeof(subsys->model)), 5882f0dad17SKeith Busch subsys->model, nvme_strlen(subsys->firmware_rev, 5892f0dad17SKeith Busch sizeof(subsys->firmware_rev)), 5902f0dad17SKeith Busch subsys->firmware_rev); 5912f0dad17SKeith Busch } 5922f0dad17SKeith Busch 593b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 594a3646451SAkinobu Mita void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 595a3646451SAkinobu Mita const char *dev_name); 596a3646451SAkinobu Mita void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 597b9e03857SThomas Tai void nvme_should_fail(struct request *req); 598b9e03857SThomas Tai #else 599a3646451SAkinobu Mita static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 600a3646451SAkinobu Mita const char *dev_name) 601a3646451SAkinobu Mita { 602a3646451SAkinobu Mita } 603a3646451SAkinobu Mita static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 604a3646451SAkinobu Mita { 605a3646451SAkinobu Mita } 606b9e03857SThomas Tai static inline void nvme_should_fail(struct request *req) {} 607b9e03857SThomas Tai #endif 608b9e03857SThomas Tai 6091e866afdSKeith Busch bool nvme_wait_reset(struct nvme_ctrl *ctrl); 6101e866afdSKeith Busch int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 6111e866afdSKeith Busch 612f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 613f3ca80fcSChristoph Hellwig { 6141e866afdSKeith Busch int ret; 6151e866afdSKeith Busch 616f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 617f3ca80fcSChristoph Hellwig return -ENOTTY; 6181e866afdSKeith Busch if (!nvme_wait_reset(ctrl)) 6191e866afdSKeith Busch return -EBUSY; 6201e866afdSKeith Busch 6211e866afdSKeith Busch ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 6221e866afdSKeith Busch if (ret) 6231e866afdSKeith Busch return ret; 6241e866afdSKeith Busch 6251e866afdSKeith Busch return nvme_try_sched_reset(ctrl); 626f3ca80fcSChristoph Hellwig } 627f3ca80fcSChristoph Hellwig 628314d48ddSDamien Le Moal /* 629314d48ddSDamien Le Moal * Convert a 512B sector number to a device logical block number. 630314d48ddSDamien Le Moal */ 631314d48ddSDamien Le Moal static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 63257dacad5SJay Sternberg { 633314d48ddSDamien Le Moal return sector >> (ns->lba_shift - SECTOR_SHIFT); 63457dacad5SJay Sternberg } 63557dacad5SJay Sternberg 636e08f2ae8SDamien Le Moal /* 637e08f2ae8SDamien Le Moal * Convert a device logical block number to a 512B sector number. 638e08f2ae8SDamien Le Moal */ 639e08f2ae8SDamien Le Moal static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 640e08f2ae8SDamien Le Moal { 641e08f2ae8SDamien Le Moal return lba << (ns->lba_shift - SECTOR_SHIFT); 64257dacad5SJay Sternberg } 64357dacad5SJay Sternberg 64471fb90ebSKeith Busch /* 64571fb90ebSKeith Busch * Convert byte length to nvme's 0-based num dwords 64671fb90ebSKeith Busch */ 64771fb90ebSKeith Busch static inline u32 nvme_bytes_to_numd(size_t len) 64871fb90ebSKeith Busch { 64971fb90ebSKeith Busch return (len >> 2) - 1; 65071fb90ebSKeith Busch } 65171fb90ebSKeith Busch 6525ddaabe8SChristoph Hellwig static inline bool nvme_is_ana_error(u16 status) 6535ddaabe8SChristoph Hellwig { 6545ddaabe8SChristoph Hellwig switch (status & 0x7ff) { 6555ddaabe8SChristoph Hellwig case NVME_SC_ANA_TRANSITION: 6565ddaabe8SChristoph Hellwig case NVME_SC_ANA_INACCESSIBLE: 6575ddaabe8SChristoph Hellwig case NVME_SC_ANA_PERSISTENT_LOSS: 6585ddaabe8SChristoph Hellwig return true; 6595ddaabe8SChristoph Hellwig default: 6605ddaabe8SChristoph Hellwig return false; 6615ddaabe8SChristoph Hellwig } 6625ddaabe8SChristoph Hellwig } 6635ddaabe8SChristoph Hellwig 6645ddaabe8SChristoph Hellwig static inline bool nvme_is_path_error(u16 status) 6655ddaabe8SChristoph Hellwig { 6661e41f3bdSChristoph Hellwig /* check for a status code type of 'path related status' */ 6671e41f3bdSChristoph Hellwig return (status & 0x700) == 0x300; 6685ddaabe8SChristoph Hellwig } 6695ddaabe8SChristoph Hellwig 6702eb81a33SChristoph Hellwig /* 6712eb81a33SChristoph Hellwig * Fill in the status and result information from the CQE, and then figure out 6722eb81a33SChristoph Hellwig * if blk-mq will need to use IPI magic to complete the request, and if yes do 6732eb81a33SChristoph Hellwig * so. If not let the caller complete the request without an indirect function 6742eb81a33SChristoph Hellwig * call. 6752eb81a33SChristoph Hellwig */ 6762eb81a33SChristoph Hellwig static inline bool nvme_try_complete_req(struct request *req, __le16 status, 67727fa9bc5SChristoph Hellwig union nvme_result result) 67815a190f7SChristoph Hellwig { 67927fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 680e4fdb2b1SKeith Busch struct nvme_ctrl *ctrl = rq->ctrl; 681e4fdb2b1SKeith Busch 682e4fdb2b1SKeith Busch if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 683e4fdb2b1SKeith Busch rq->genctr++; 68427fa9bc5SChristoph Hellwig 68527fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 68627fa9bc5SChristoph Hellwig rq->result = result; 687b9e03857SThomas Tai /* inject error when permitted by fault injection framework */ 688b9e03857SThomas Tai nvme_should_fail(req); 689ff029451SChristoph Hellwig if (unlikely(blk_should_fake_timeout(req->q))) 690ff029451SChristoph Hellwig return true; 691ff029451SChristoph Hellwig return blk_mq_complete_request_remote(req); 69215a190f7SChristoph Hellwig } 69315a190f7SChristoph Hellwig 694d22524a4SChristoph Hellwig static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 695d22524a4SChristoph Hellwig { 696d22524a4SChristoph Hellwig get_device(ctrl->device); 697d22524a4SChristoph Hellwig } 698d22524a4SChristoph Hellwig 699d22524a4SChristoph Hellwig static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 700d22524a4SChristoph Hellwig { 701d22524a4SChristoph Hellwig put_device(ctrl->device); 702d22524a4SChristoph Hellwig } 703d22524a4SChristoph Hellwig 70458a8df67SIsrael Rukshin static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 70558a8df67SIsrael Rukshin { 706e7006de6SSagi Grimberg return !qid && 707e7006de6SSagi Grimberg nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 70858a8df67SIsrael Rukshin } 70958a8df67SIsrael Rukshin 71077f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 711c234a653SJens Axboe void nvme_complete_batch_req(struct request *req); 712c234a653SJens Axboe 713c234a653SJens Axboe static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 714c234a653SJens Axboe void (*fn)(struct request *rq)) 715c234a653SJens Axboe { 716c234a653SJens Axboe struct request *req; 717c234a653SJens Axboe 718c234a653SJens Axboe rq_list_for_each(&iob->req_list, req) { 719c234a653SJens Axboe fn(req); 720c234a653SJens Axboe nvme_complete_batch_req(req); 721c234a653SJens Axboe } 722c234a653SJens Axboe blk_mq_end_request_batch(iob); 723c234a653SJens Axboe } 724c234a653SJens Axboe 725dda3248eSChao Leng blk_status_t nvme_host_path_error(struct request *req); 7262dd6532eSJohn Garry bool nvme_cancel_request(struct request *req, void *data); 72725479069SChao Leng void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 72825479069SChao Leng void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 729bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 730bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 731b5b05048SSagi Grimberg int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 732c0f2f45bSSagi Grimberg int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 7335fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 734f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 735f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 73653029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 737d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 738d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 739f21c4769SChaitanya Kulkarni int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl); 740*fe60e8c5SChristoph Hellwig int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 741*fe60e8c5SChristoph Hellwig const struct blk_mq_ops *ops, unsigned int flags, 742*fe60e8c5SChristoph Hellwig unsigned int cmd_size); 743*fe60e8c5SChristoph Hellwig void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 744*fe60e8c5SChristoph Hellwig int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 745*fe60e8c5SChristoph Hellwig const struct blk_mq_ops *ops, unsigned int flags, 746*fe60e8c5SChristoph Hellwig unsigned int cmd_size); 747*fe60e8c5SChristoph Hellwig void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 7485bae7f73SChristoph Hellwig 7495bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 7501673f1f0SChristoph Hellwig 7514f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 7524f1244c8SChristoph Hellwig bool send); 753a98e58e5SScott Bauer 7547bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 755287a63ebSChristoph Hellwig volatile union nvme_result *res); 756f866fc42SChristoph Hellwig 75725646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 75825646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 759a277654bSMing Lei void nvme_stop_admin_queue(struct nvme_ctrl *ctrl); 760a277654bSMing Lei void nvme_start_admin_queue(struct nvme_ctrl *ctrl); 76169d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 762d6135c3aSKeith Busch void nvme_sync_queues(struct nvme_ctrl *ctrl); 76304800fbfSChao Leng void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 764302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 765302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 7667cf0d7c0SSagi Grimberg int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 767302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 768363c9aacSSagi Grimberg 769f9ed86dcSBart Van Assche static inline enum req_op nvme_req_op(struct nvme_command *cmd) 770e559398fSChristoph Hellwig { 771e559398fSChristoph Hellwig return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 772e559398fSChristoph Hellwig } 773e559398fSChristoph Hellwig 774eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 775e559398fSChristoph Hellwig void nvme_init_request(struct request *req, struct nvme_command *cmd); 776f7f1fc36SMax Gurtovoy void nvme_cleanup_cmd(struct request *req); 777f4b9e6c9SKeith Busch blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 778a9715744STao Chiu blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 779a9715744STao Chiu struct request *req); 780a9715744STao Chiu bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 781a9715744STao Chiu bool queue_live); 782a9715744STao Chiu 783a9715744STao Chiu static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 784a9715744STao Chiu bool queue_live) 785a9715744STao Chiu { 786a9715744STao Chiu if (likely(ctrl->state == NVME_CTRL_LIVE)) 787a9715744STao Chiu return true; 788a9715744STao Chiu if (ctrl->ops->flags & NVME_F_FABRICS && 789a9715744STao Chiu ctrl->state == NVME_CTRL_DELETING) 7908b77fa6fSRuozhu Li return queue_live; 791a9715744STao Chiu return __nvme_check_ready(ctrl, rq, queue_live); 792a9715744STao Chiu } 7935974ea7cSSungup Moon 7945974ea7cSSungup Moon /* 7955974ea7cSSungup Moon * NSID shall be unique for all shared namespaces, or if at least one of the 7965974ea7cSSungup Moon * following conditions is met: 7975974ea7cSSungup Moon * 1. Namespace Management is supported by the controller 7985974ea7cSSungup Moon * 2. ANA is supported by the controller 7995974ea7cSSungup Moon * 3. NVM Set are supported by the controller 8005974ea7cSSungup Moon * 8015974ea7cSSungup Moon * In other case, private namespace are not required to report a unique NSID. 8025974ea7cSSungup Moon */ 8035974ea7cSSungup Moon static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 8045974ea7cSSungup Moon struct nvme_ns_head *head) 8055974ea7cSSungup Moon { 8065974ea7cSSungup Moon return head->shared || 8075974ea7cSSungup Moon (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 8085974ea7cSSungup Moon (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 8095974ea7cSSungup Moon (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 8105974ea7cSSungup Moon } 8115974ea7cSSungup Moon 81257dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 81357dacad5SJay Sternberg void *buf, unsigned bufflen); 81457dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 815d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 8166b46fa02SChaitanya Kulkarni int qid, int at_head, 817be42a33bSKeith Busch blk_mq_req_flags_t flags); 8181a87ee65SKeith Busch int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 8191a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 8201a87ee65SKeith Busch u32 *result); 8211a87ee65SKeith Busch int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 8221a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 8231a87ee65SKeith Busch u32 *result); 8249a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 825038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 826d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 8272405252aSChristoph Hellwig int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 828c5017e85SChristoph Hellwig int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 8292405252aSChristoph Hellwig void nvme_queue_scan(struct nvme_ctrl *ctrl); 830be93e87eSKeith Busch int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 8310e98719bSChristoph Hellwig void *log, size_t size, u64 offset); 8321496bd49SChristoph Hellwig bool nvme_tryget_ns_head(struct nvme_ns_head *head); 8331496bd49SChristoph Hellwig void nvme_put_ns_head(struct nvme_ns_head *head); 8342637baedSMinwoo Im int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 8352637baedSMinwoo Im const struct file_operations *fops, struct module *owner); 8362637baedSMinwoo Im void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 8372405252aSChristoph Hellwig int nvme_ioctl(struct block_device *bdev, fmode_t mode, 8382405252aSChristoph Hellwig unsigned int cmd, unsigned long arg); 8392637baedSMinwoo Im long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 8402405252aSChristoph Hellwig int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode, 8412405252aSChristoph Hellwig unsigned int cmd, unsigned long arg); 8422637baedSMinwoo Im long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 8432637baedSMinwoo Im unsigned long arg); 8442405252aSChristoph Hellwig long nvme_dev_ioctl(struct file *file, unsigned int cmd, 8452405252aSChristoph Hellwig unsigned long arg); 846456cba38SKanchan Joshi int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 847456cba38SKanchan Joshi unsigned int issue_flags); 848456cba38SKanchan Joshi int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 849456cba38SKanchan Joshi unsigned int issue_flags); 8501496bd49SChristoph Hellwig int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 85158e5bdebSKanchan Joshi int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 852d558fb51SMatias Bjørling 85333b14f67SHannes Reinecke extern const struct attribute_group *nvme_ns_id_attr_groups[]; 8541496bd49SChristoph Hellwig extern const struct pr_ops nvme_pr_ops; 85532acab31SChristoph Hellwig extern const struct block_device_operations nvme_ns_head_ops; 85632acab31SChristoph Hellwig 857f1cf35e1SChristoph Hellwig struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 85832acab31SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 85966b20ac0SMarta Rybczynska static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 86066b20ac0SMarta Rybczynska { 86166b20ac0SMarta Rybczynska return ctrl->ana_log_buf != NULL; 86266b20ac0SMarta Rybczynska } 86366b20ac0SMarta Rybczynska 864b9156daeSSagi Grimberg void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 865b9156daeSSagi Grimberg void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 866b9156daeSSagi Grimberg void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 867e3d34794SHannes Reinecke void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 8685ddaabe8SChristoph Hellwig void nvme_failover_req(struct request *req); 86932acab31SChristoph Hellwig void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 87032acab31SChristoph Hellwig int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 871c13cf14fSJoel Granados void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 87232acab31SChristoph Hellwig void nvme_mpath_remove_disk(struct nvme_ns_head *head); 8735e1f6899SChristoph Hellwig int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 8745e1f6899SChristoph Hellwig void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 875a4a6f3c8SAnton Eidelman void nvme_mpath_update(struct nvme_ctrl *ctrl); 8760d0b660fSChristoph Hellwig void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 8770d0b660fSChristoph Hellwig void nvme_mpath_stop(struct nvme_ctrl *ctrl); 8780157ec8dSSagi Grimberg bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 879e7d65803SHannes Reinecke void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 8800157ec8dSSagi Grimberg void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 8815396fdacSHannes Reinecke void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 882479a322fSSagi Grimberg 8832b59787aSMax Gurtovoy static inline void nvme_trace_bio_complete(struct request *req) 88435fe0d12SHannes Reinecke { 88535fe0d12SHannes Reinecke struct nvme_ns *ns = req->q->queuedata; 88635fe0d12SHannes Reinecke 88735fe0d12SHannes Reinecke if (req->cmd_flags & REQ_NVME_MPATH) 888d24de76aSChristoph Hellwig trace_block_bio_complete(ns->head->disk->queue, req->bio); 88935fe0d12SHannes Reinecke } 89035fe0d12SHannes Reinecke 891b739e137SChristoph Hellwig extern bool multipath; 8920d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_grpid; 8930d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_state; 89475c10e73SHannes Reinecke extern struct device_attribute subsys_attr_iopolicy; 8950d0b660fSChristoph Hellwig 89632acab31SChristoph Hellwig #else 897b739e137SChristoph Hellwig #define multipath false 8980d0b660fSChristoph Hellwig static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 8990d0b660fSChristoph Hellwig { 9000d0b660fSChristoph Hellwig return false; 9010d0b660fSChristoph Hellwig } 9025ddaabe8SChristoph Hellwig static inline void nvme_failover_req(struct request *req) 90332acab31SChristoph Hellwig { 90432acab31SChristoph Hellwig } 90532acab31SChristoph Hellwig static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 90632acab31SChristoph Hellwig { 90732acab31SChristoph Hellwig } 90832acab31SChristoph Hellwig static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 90932acab31SChristoph Hellwig struct nvme_ns_head *head) 91032acab31SChristoph Hellwig { 91132acab31SChristoph Hellwig return 0; 91232acab31SChristoph Hellwig } 913c13cf14fSJoel Granados static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 91432acab31SChristoph Hellwig { 91532acab31SChristoph Hellwig } 91632acab31SChristoph Hellwig static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 91732acab31SChristoph Hellwig { 91832acab31SChristoph Hellwig } 9190157ec8dSSagi Grimberg static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 9200157ec8dSSagi Grimberg { 9210157ec8dSSagi Grimberg return false; 9220157ec8dSSagi Grimberg } 923e7d65803SHannes Reinecke static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 924e7d65803SHannes Reinecke { 925e7d65803SHannes Reinecke } 9260157ec8dSSagi Grimberg static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 92732acab31SChristoph Hellwig { 92832acab31SChristoph Hellwig } 9295396fdacSHannes Reinecke static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 930479a322fSSagi Grimberg { 931479a322fSSagi Grimberg } 9322b59787aSMax Gurtovoy static inline void nvme_trace_bio_complete(struct request *req) 93335fe0d12SHannes Reinecke { 93435fe0d12SHannes Reinecke } 9355e1f6899SChristoph Hellwig static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 9365e1f6899SChristoph Hellwig { 9375e1f6899SChristoph Hellwig } 9385e1f6899SChristoph Hellwig static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 9390d0b660fSChristoph Hellwig struct nvme_id_ctrl *id) 9400d0b660fSChristoph Hellwig { 9412bd64307SKanchan Joshi if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 94214a1336eSChristoph Hellwig dev_warn(ctrl->device, 94314a1336eSChristoph Hellwig "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 9440d0b660fSChristoph Hellwig return 0; 9450d0b660fSChristoph Hellwig } 946a4a6f3c8SAnton Eidelman static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 947a4a6f3c8SAnton Eidelman { 948a4a6f3c8SAnton Eidelman } 9490d0b660fSChristoph Hellwig static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 9500d0b660fSChristoph Hellwig { 9510d0b660fSChristoph Hellwig } 9520d0b660fSChristoph Hellwig static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 9530d0b660fSChristoph Hellwig { 9540d0b660fSChristoph Hellwig } 955b9156daeSSagi Grimberg static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 956b9156daeSSagi Grimberg { 957b9156daeSSagi Grimberg } 958b9156daeSSagi Grimberg static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 959b9156daeSSagi Grimberg { 960b9156daeSSagi Grimberg } 961b9156daeSSagi Grimberg static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 962b9156daeSSagi Grimberg { 963b9156daeSSagi Grimberg } 964e3d34794SHannes Reinecke static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 965e3d34794SHannes Reinecke { 966e3d34794SHannes Reinecke } 96732acab31SChristoph Hellwig #endif /* CONFIG_NVME_MULTIPATH */ 96832acab31SChristoph Hellwig 9697fad20ddSChristoph Hellwig int nvme_revalidate_zones(struct nvme_ns *ns); 9708b4fb0f9SChristoph Hellwig int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 9718b4fb0f9SChristoph Hellwig unsigned int nr_zones, report_zones_cb cb, void *data); 972240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 973d525c3c0SChristoph Hellwig int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 974240e6ee2SKeith Busch blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 975240e6ee2SKeith Busch struct nvme_command *cmnd, 976240e6ee2SKeith Busch enum nvme_zone_mgmt_action action); 977240e6ee2SKeith Busch #else 978240e6ee2SKeith Busch static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 979240e6ee2SKeith Busch struct request *req, struct nvme_command *cmnd, 980240e6ee2SKeith Busch enum nvme_zone_mgmt_action action) 981240e6ee2SKeith Busch { 982240e6ee2SKeith Busch return BLK_STS_NOTSUPP; 983240e6ee2SKeith Busch } 984240e6ee2SKeith Busch 985d525c3c0SChristoph Hellwig static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 986240e6ee2SKeith Busch { 987240e6ee2SKeith Busch dev_warn(ns->ctrl->device, 988240e6ee2SKeith Busch "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 989240e6ee2SKeith Busch return -EPROTONOSUPPORT; 990240e6ee2SKeith Busch } 991240e6ee2SKeith Busch #endif 992240e6ee2SKeith Busch 99372e8b5cdSChaitanya Kulkarni static inline int nvme_ctrl_init_connect_q(struct nvme_ctrl *ctrl) 99472e8b5cdSChaitanya Kulkarni { 99572e8b5cdSChaitanya Kulkarni ctrl->connect_q = blk_mq_init_queue(ctrl->tagset); 99672e8b5cdSChaitanya Kulkarni if (IS_ERR(ctrl->connect_q)) 99772e8b5cdSChaitanya Kulkarni return PTR_ERR(ctrl->connect_q); 99872e8b5cdSChaitanya Kulkarni return 0; 99972e8b5cdSChaitanya Kulkarni } 100072e8b5cdSChaitanya Kulkarni 100140267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 100240267efdSSimon A. F. Lund { 100340267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 100440267efdSSimon A. F. Lund } 1005ca064085SMatias Bjørling 1006400b6a7bSGuenter Roeck #ifdef CONFIG_NVME_HWMON 100759e330f8SKeith Busch int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1008ed7770f6SHannes Reinecke void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1009400b6a7bSGuenter Roeck #else 101059e330f8SKeith Busch static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 101159e330f8SKeith Busch { 101259e330f8SKeith Busch return 0; 101359e330f8SKeith Busch } 1014ed7770f6SHannes Reinecke 1015ed7770f6SHannes Reinecke static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1016ed7770f6SHannes Reinecke { 1017ed7770f6SHannes Reinecke } 1018400b6a7bSGuenter Roeck #endif 1019400b6a7bSGuenter Roeck 102073eefc27SChaitanya Kulkarni static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 102173eefc27SChaitanya Kulkarni { 102273eefc27SChaitanya Kulkarni return ctrl->sgls & ((1 << 0) | (1 << 1)); 102373eefc27SChaitanya Kulkarni } 102473eefc27SChaitanya Kulkarni 1025f50fff73SHannes Reinecke #ifdef CONFIG_NVME_AUTH 1026f50fff73SHannes Reinecke void nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1027f50fff73SHannes Reinecke void nvme_auth_stop(struct nvme_ctrl *ctrl); 1028f50fff73SHannes Reinecke int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1029f50fff73SHannes Reinecke int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1030f50fff73SHannes Reinecke void nvme_auth_reset(struct nvme_ctrl *ctrl); 1031f50fff73SHannes Reinecke void nvme_auth_free(struct nvme_ctrl *ctrl); 1032f50fff73SHannes Reinecke #else 1033f50fff73SHannes Reinecke static inline void nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) {}; 1034f50fff73SHannes Reinecke static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1035f50fff73SHannes Reinecke static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1036f50fff73SHannes Reinecke { 1037f50fff73SHannes Reinecke return -EPROTONOSUPPORT; 1038f50fff73SHannes Reinecke } 1039f50fff73SHannes Reinecke static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1040f50fff73SHannes Reinecke { 1041f50fff73SHannes Reinecke return NVME_SC_AUTH_REQUIRED; 1042f50fff73SHannes Reinecke } 1043f50fff73SHannes Reinecke static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1044f50fff73SHannes Reinecke #endif 1045f50fff73SHannes Reinecke 1046df21b6b1SLogan Gunthorpe u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1047df21b6b1SLogan Gunthorpe u8 opcode); 1048bc8fb906SKeith Busch int nvme_execute_passthru_rq(struct request *rq, u32 *effects); 1049bc8fb906SKeith Busch void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects, 1050bc8fb906SKeith Busch struct nvme_command *cmd, int status); 1051b2702aaaSChaitanya Kulkarni struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 105224493b8bSLogan Gunthorpe struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 105324493b8bSLogan Gunthorpe void nvme_put_ns(struct nvme_ns *ns); 1054df21b6b1SLogan Gunthorpe 105543dc9878SAdam Manzanares static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 105643dc9878SAdam Manzanares { 105743dc9878SAdam Manzanares return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 105843dc9878SAdam Manzanares } 105943dc9878SAdam Manzanares 1060bd83fe6fSAlan Adamson #ifdef CONFIG_NVME_VERBOSE_ERRORS 1061bd83fe6fSAlan Adamson const unsigned char *nvme_get_error_status_str(u16 status); 1062bd83fe6fSAlan Adamson const unsigned char *nvme_get_opcode_str(u8 opcode); 1063bd83fe6fSAlan Adamson const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1064bd83fe6fSAlan Adamson #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1065bd83fe6fSAlan Adamson static inline const unsigned char *nvme_get_error_status_str(u16 status) 1066bd83fe6fSAlan Adamson { 1067bd83fe6fSAlan Adamson return "I/O Error"; 1068bd83fe6fSAlan Adamson } 1069bd83fe6fSAlan Adamson static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1070bd83fe6fSAlan Adamson { 1071bd83fe6fSAlan Adamson return "I/O Cmd"; 1072bd83fe6fSAlan Adamson } 1073bd83fe6fSAlan Adamson static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1074bd83fe6fSAlan Adamson { 1075bd83fe6fSAlan Adamson return "Admin Cmd"; 1076bd83fe6fSAlan Adamson } 1077bd83fe6fSAlan Adamson #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1078bd83fe6fSAlan Adamson 107957dacad5SJay Sternberg #endif /* _NVME_H */ 1080