1bc50ad75SChristoph Hellwig /* SPDX-License-Identifier: GPL-2.0 */ 257dacad5SJay Sternberg /* 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg */ 557dacad5SJay Sternberg 657dacad5SJay Sternberg #ifndef _NVME_H 757dacad5SJay Sternberg #define _NVME_H 857dacad5SJay Sternberg 957dacad5SJay Sternberg #include <linux/nvme.h> 10a6a5149bSChristoph Hellwig #include <linux/cdev.h> 1157dacad5SJay Sternberg #include <linux/pci.h> 1257dacad5SJay Sternberg #include <linux/kref.h> 1357dacad5SJay Sternberg #include <linux/blk-mq.h> 14b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 15a98e58e5SScott Bauer #include <linux/sed-opal.h> 16b9e03857SThomas Tai #include <linux/fault-inject.h> 17978628ecSJohannes Thumshirn #include <linux/rcupdate.h> 1857dacad5SJay Sternberg 1935fe0d12SHannes Reinecke #include <trace/events/block.h> 2035fe0d12SHannes Reinecke 218ae4e447SMarc Olson extern unsigned int nvme_io_timeout; 2257dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2357dacad5SJay Sternberg 248ae4e447SMarc Olson extern unsigned int admin_timeout; 2521d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 2621d34711SChristoph Hellwig 27038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 28038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 29038bd4cbSSagi Grimberg 309a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 31b227c59bSRoy Shterman extern struct workqueue_struct *nvme_reset_wq; 32b227c59bSRoy Shterman extern struct workqueue_struct *nvme_delete_wq; 339a6327d2SSagi Grimberg 34ca064085SMatias Bjørling enum { 35ca064085SMatias Bjørling NVME_NS_LBA = 0, 36ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 37ca064085SMatias Bjørling }; 38ca064085SMatias Bjørling 3957dacad5SJay Sternberg /* 40106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 41106198edSChristoph Hellwig * the standard. 4257dacad5SJay Sternberg */ 43106198edSChristoph Hellwig enum nvme_quirks { 44106198edSChristoph Hellwig /* 45106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 46106198edSChristoph Hellwig * specific Identify field. 47106198edSChristoph Hellwig */ 48106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 49540c801cSKeith Busch 50540c801cSKeith Busch /* 51540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 52540c801cSKeith Busch * correctly. 53540c801cSKeith Busch */ 54540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 5508095e70SKeith Busch 5608095e70SKeith Busch /* 57e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 58e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 5908095e70SKeith Busch */ 60e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 6154adc010SGuilherme G. Piccoli 6254adc010SGuilherme G. Piccoli /* 6354adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 6454adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 6554adc010SGuilherme G. Piccoli */ 6654adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 67c5552fdeSAndy Lutomirski 68c5552fdeSAndy Lutomirski /* 69c5552fdeSAndy Lutomirski * APST should not be used. 70c5552fdeSAndy Lutomirski */ 71c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 72ff5350a8SAndy Lutomirski 73ff5350a8SAndy Lutomirski /* 74ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 75ff5350a8SAndy Lutomirski */ 76ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 77608cc4b1SChristoph Hellwig 78608cc4b1SChristoph Hellwig /* 79608cc4b1SChristoph Hellwig * Supports the LighNVM command set if indicated in vs[1]. 80608cc4b1SChristoph Hellwig */ 81608cc4b1SChristoph Hellwig NVME_QUIRK_LIGHTNVM = (1 << 6), 829abd68efSJens Axboe 839abd68efSJens Axboe /* 849abd68efSJens Axboe * Set MEDIUM priority on SQ creation 859abd68efSJens Axboe */ 869abd68efSJens Axboe NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 876299358dSJames Dingwall 886299358dSJames Dingwall /* 896299358dSJames Dingwall * Ignore device provided subnqn. 906299358dSJames Dingwall */ 916299358dSJames Dingwall NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 927b210e4eSChristoph Hellwig 937b210e4eSChristoph Hellwig /* 947b210e4eSChristoph Hellwig * Broken Write Zeroes. 957b210e4eSChristoph Hellwig */ 967b210e4eSChristoph Hellwig NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 97cb32de1bSMario Limonciello 98cb32de1bSMario Limonciello /* 99cb32de1bSMario Limonciello * Force simple suspend/resume path. 100cb32de1bSMario Limonciello */ 101cb32de1bSMario Limonciello NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 1027ad67ca5SLinus Torvalds 1037ad67ca5SLinus Torvalds /* 10466341331SBenjamin Herrenschmidt * Use only one interrupt vector for all queues 10566341331SBenjamin Herrenschmidt */ 1067ad67ca5SLinus Torvalds NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 10766341331SBenjamin Herrenschmidt 10866341331SBenjamin Herrenschmidt /* 10966341331SBenjamin Herrenschmidt * Use non-standard 128 bytes SQEs. 11066341331SBenjamin Herrenschmidt */ 1117ad67ca5SLinus Torvalds NVME_QUIRK_128_BYTES_SQES = (1 << 12), 112d38e9f04SBenjamin Herrenschmidt 113d38e9f04SBenjamin Herrenschmidt /* 114d38e9f04SBenjamin Herrenschmidt * Prevent tag overlap between queues 115d38e9f04SBenjamin Herrenschmidt */ 1167ad67ca5SLinus Torvalds NVME_QUIRK_SHARED_TAGS = (1 << 13), 117106198edSChristoph Hellwig }; 118106198edSChristoph Hellwig 119d49187e9SChristoph Hellwig /* 120d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 121d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 122d49187e9SChristoph Hellwig */ 123d49187e9SChristoph Hellwig struct nvme_request { 124d49187e9SChristoph Hellwig struct nvme_command *cmd; 125d49187e9SChristoph Hellwig union nvme_result result; 12644e44b29SChristoph Hellwig u8 retries; 12727fa9bc5SChristoph Hellwig u8 flags; 12827fa9bc5SChristoph Hellwig u16 status; 12959e29ce6SSagi Grimberg struct nvme_ctrl *ctrl; 13027fa9bc5SChristoph Hellwig }; 13127fa9bc5SChristoph Hellwig 13232acab31SChristoph Hellwig /* 13332acab31SChristoph Hellwig * Mark a bio as coming in through the mpath node. 13432acab31SChristoph Hellwig */ 13532acab31SChristoph Hellwig #define REQ_NVME_MPATH REQ_DRV 13632acab31SChristoph Hellwig 13727fa9bc5SChristoph Hellwig enum { 13827fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 139bb06ec31SJames Smart NVME_REQ_USERCMD = (1 << 1), 140d49187e9SChristoph Hellwig }; 141d49187e9SChristoph Hellwig 142d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 143d49187e9SChristoph Hellwig { 144d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 145d49187e9SChristoph Hellwig } 146d49187e9SChristoph Hellwig 1475d87eb94SKeith Busch static inline u16 nvme_req_qid(struct request *req) 1485d87eb94SKeith Busch { 1495d87eb94SKeith Busch if (!req->rq_disk) 1505d87eb94SKeith Busch return 0; 1515d87eb94SKeith Busch return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 1525d87eb94SKeith Busch } 1535d87eb94SKeith Busch 15454adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 15554adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 15654adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 15754adc010SGuilherme G. Piccoli * found empirically. 15854adc010SGuilherme G. Piccoli */ 1598c97eeccSJeff Lien #define NVME_QUIRK_DELAY_AMOUNT 2300 16054adc010SGuilherme G. Piccoli 161bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 162bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 163bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 1642b1b7e78SJianchao Wang NVME_CTRL_ADMIN_ONLY, /* Only admin queue live */ 165bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 166ad6a0a52SMax Gurtovoy NVME_CTRL_CONNECTING, 167bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 1680ff9d4e1SKeith Busch NVME_CTRL_DEAD, 169bb8d261eSChristoph Hellwig }; 170bb8d261eSChristoph Hellwig 171a3646451SAkinobu Mita struct nvme_fault_inject { 172a3646451SAkinobu Mita #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 173a3646451SAkinobu Mita struct fault_attr attr; 174a3646451SAkinobu Mita struct dentry *parent; 175a3646451SAkinobu Mita bool dont_retry; /* DNR, do not retry */ 176a3646451SAkinobu Mita u16 status; /* status code */ 177a3646451SAkinobu Mita #endif 178a3646451SAkinobu Mita }; 179a3646451SAkinobu Mita 1801c63dc66SChristoph Hellwig struct nvme_ctrl { 1816e3ca03eSSagi Grimberg bool comp_seen; 182bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 183bd4da3abSAndy Lutomirski bool identified; 184bb8d261eSChristoph Hellwig spinlock_t lock; 185e7ad43c3SKeith Busch struct mutex scan_lock; 1861c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 18757dacad5SJay Sternberg struct request_queue *admin_q; 18807bfcd09SChristoph Hellwig struct request_queue *connect_q; 189e7832cb4SSagi Grimberg struct request_queue *fabrics_q; 19057dacad5SJay Sternberg struct device *dev; 19157dacad5SJay Sternberg int instance; 192103e515eSHannes Reinecke int numa_node; 1935bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 19434b6c231SSagi Grimberg struct blk_mq_tag_set *admin_tagset; 1955bae7f73SChristoph Hellwig struct list_head namespaces; 196765cc031SJianchao Wang struct rw_semaphore namespaces_rwsem; 197d22524a4SChristoph Hellwig struct device ctrl_device; 1985bae7f73SChristoph Hellwig struct device *device; /* char device */ 199a6a5149bSChristoph Hellwig struct cdev cdev; 200d86c4d8eSChristoph Hellwig struct work_struct reset_work; 201c5017e85SChristoph Hellwig struct work_struct delete_work; 2021c63dc66SChristoph Hellwig 203ab9e00ccSChristoph Hellwig struct nvme_subsystem *subsys; 204ab9e00ccSChristoph Hellwig struct list_head subsys_entry; 205ab9e00ccSChristoph Hellwig 2064f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 207a98e58e5SScott Bauer 20857dacad5SJay Sternberg char name[12]; 20976e3914aSChristoph Hellwig u16 cntlid; 2105fd4ce1bSChristoph Hellwig 2115fd4ce1bSChristoph Hellwig u32 ctrl_config; 212b6dccf7fSArnav Dawn u16 mtfa; 213d858e5f0SSagi Grimberg u32 queue_count; 2145fd4ce1bSChristoph Hellwig 21520d0dfe6SSagi Grimberg u64 cap; 2165fd4ce1bSChristoph Hellwig u32 page_size; 21757dacad5SJay Sternberg u32 max_hw_sectors; 218943e942eSJens Axboe u32 max_segments; 21949cd84b6SKeith Busch u16 crdt[3]; 22057dacad5SJay Sternberg u16 oncs; 2218a9ae523SScott Bauer u16 oacs; 222f5d11840SJens Axboe u16 nssa; 223f5d11840SJens Axboe u16 nr_streams; 224*f968688fSKeith Busch u16 sqsize; 2250d0b660fSChristoph Hellwig u32 max_namespaces; 2266bf25d16SChristoph Hellwig atomic_t abort_limit; 22757dacad5SJay Sternberg u8 vwc; 228f3ca80fcSChristoph Hellwig u32 vs; 22907bfcd09SChristoph Hellwig u32 sgls; 230038bd4cbSSagi Grimberg u16 kas; 231c5552fdeSAndy Lutomirski u8 npss; 232c5552fdeSAndy Lutomirski u8 apsta; 233c0561f82SHannes Reinecke u32 oaes; 234e3d7874dSKeith Busch u32 aen_result; 2353e53ba38SSagi Grimberg u32 ctratt; 23607fbd32aSMartin K. Petersen unsigned int shutdown_timeout; 237038bd4cbSSagi Grimberg unsigned int kato; 238f3ca80fcSChristoph Hellwig bool subsystem; 239106198edSChristoph Hellwig unsigned long quirks; 240c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 24184fef62dSKeith Busch struct nvme_effects_log *effects; 2425955be21SChristoph Hellwig struct work_struct scan_work; 243f866fc42SChristoph Hellwig struct work_struct async_event_work; 244038bd4cbSSagi Grimberg struct delayed_work ka_work; 2450a34e466SRoland Dreier struct nvme_command ka_cmd; 246b6dccf7fSArnav Dawn struct work_struct fw_act_work; 24730d90964SChristoph Hellwig unsigned long events; 24807bfcd09SChristoph Hellwig 2490d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 2500d0b660fSChristoph Hellwig /* asymmetric namespace access: */ 2510d0b660fSChristoph Hellwig u8 anacap; 2520d0b660fSChristoph Hellwig u8 anatt; 2530d0b660fSChristoph Hellwig u32 anagrpmax; 2540d0b660fSChristoph Hellwig u32 nanagrpid; 2550d0b660fSChristoph Hellwig struct mutex ana_lock; 2560d0b660fSChristoph Hellwig struct nvme_ana_rsp_hdr *ana_log_buf; 2570d0b660fSChristoph Hellwig size_t ana_log_size; 2580d0b660fSChristoph Hellwig struct timer_list anatt_timer; 2590d0b660fSChristoph Hellwig struct work_struct ana_work; 2600d0b660fSChristoph Hellwig #endif 2610d0b660fSChristoph Hellwig 262c5552fdeSAndy Lutomirski /* Power saving configuration */ 263c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 26476a5af84SKai-Heng Feng bool apst_enabled; 265c5552fdeSAndy Lutomirski 266044a9df1SChristoph Hellwig /* PCIe only: */ 267fe6d53c9SChristoph Hellwig u32 hmpre; 268fe6d53c9SChristoph Hellwig u32 hmmin; 269044a9df1SChristoph Hellwig u32 hmminds; 270044a9df1SChristoph Hellwig u16 hmmaxd; 271fe6d53c9SChristoph Hellwig 27207bfcd09SChristoph Hellwig /* Fabrics only */ 27307bfcd09SChristoph Hellwig u32 ioccsz; 27407bfcd09SChristoph Hellwig u32 iorcsz; 27507bfcd09SChristoph Hellwig u16 icdoff; 27607bfcd09SChristoph Hellwig u16 maxcmd; 277fdf9dfa8SSagi Grimberg int nr_reconnects; 27807bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 279cb5b7262SJens Axboe 280cb5b7262SJens Axboe struct page *discard_page; 281cb5b7262SJens Axboe unsigned long discard_page_busy; 282f79d5fdaSAkinobu Mita 283f79d5fdaSAkinobu Mita struct nvme_fault_inject fault_inject; 28457dacad5SJay Sternberg }; 28557dacad5SJay Sternberg 28675c10e73SHannes Reinecke enum nvme_iopolicy { 28775c10e73SHannes Reinecke NVME_IOPOLICY_NUMA, 28875c10e73SHannes Reinecke NVME_IOPOLICY_RR, 28975c10e73SHannes Reinecke }; 29075c10e73SHannes Reinecke 291ab9e00ccSChristoph Hellwig struct nvme_subsystem { 292ab9e00ccSChristoph Hellwig int instance; 293ab9e00ccSChristoph Hellwig struct device dev; 294ab9e00ccSChristoph Hellwig /* 295ab9e00ccSChristoph Hellwig * Because we unregister the device on the last put we need 296ab9e00ccSChristoph Hellwig * a separate refcount. 297ab9e00ccSChristoph Hellwig */ 298ab9e00ccSChristoph Hellwig struct kref ref; 299ab9e00ccSChristoph Hellwig struct list_head entry; 300ab9e00ccSChristoph Hellwig struct mutex lock; 301ab9e00ccSChristoph Hellwig struct list_head ctrls; 302ed754e5dSChristoph Hellwig struct list_head nsheads; 303ab9e00ccSChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 304ab9e00ccSChristoph Hellwig char serial[20]; 305ab9e00ccSChristoph Hellwig char model[40]; 306ab9e00ccSChristoph Hellwig char firmware_rev[8]; 307ab9e00ccSChristoph Hellwig u8 cmic; 308ab9e00ccSChristoph Hellwig u16 vendor_id; 30981adb863SBart Van Assche u16 awupf; /* 0's based awupf value. */ 310ed754e5dSChristoph Hellwig struct ida ns_ida; 31175c10e73SHannes Reinecke #ifdef CONFIG_NVME_MULTIPATH 31275c10e73SHannes Reinecke enum nvme_iopolicy iopolicy; 31375c10e73SHannes Reinecke #endif 314ab9e00ccSChristoph Hellwig }; 315ab9e00ccSChristoph Hellwig 316002fab04SChristoph Hellwig /* 317002fab04SChristoph Hellwig * Container structure for uniqueue namespace identifiers. 318002fab04SChristoph Hellwig */ 319002fab04SChristoph Hellwig struct nvme_ns_ids { 320002fab04SChristoph Hellwig u8 eui64[8]; 321002fab04SChristoph Hellwig u8 nguid[16]; 322002fab04SChristoph Hellwig uuid_t uuid; 323002fab04SChristoph Hellwig }; 324002fab04SChristoph Hellwig 325ed754e5dSChristoph Hellwig /* 326ed754e5dSChristoph Hellwig * Anchor structure for namespaces. There is one for each namespace in a 327ed754e5dSChristoph Hellwig * NVMe subsystem that any of our controllers can see, and the namespace 328ed754e5dSChristoph Hellwig * structure for each controller is chained of it. For private namespaces 329ed754e5dSChristoph Hellwig * there is a 1:1 relation to our namespace structures, that is ->list 330ed754e5dSChristoph Hellwig * only ever has a single entry for private namespaces. 331ed754e5dSChristoph Hellwig */ 332ed754e5dSChristoph Hellwig struct nvme_ns_head { 333ed754e5dSChristoph Hellwig struct list_head list; 334ed754e5dSChristoph Hellwig struct srcu_struct srcu; 335ed754e5dSChristoph Hellwig struct nvme_subsystem *subsys; 336ed754e5dSChristoph Hellwig unsigned ns_id; 337ed754e5dSChristoph Hellwig struct nvme_ns_ids ids; 338ed754e5dSChristoph Hellwig struct list_head entry; 339ed754e5dSChristoph Hellwig struct kref ref; 340ed754e5dSChristoph Hellwig int instance; 341f3334447SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 342f3334447SChristoph Hellwig struct gendisk *disk; 343f3334447SChristoph Hellwig struct bio_list requeue_list; 344f3334447SChristoph Hellwig spinlock_t requeue_lock; 345f3334447SChristoph Hellwig struct work_struct requeue_work; 346f3334447SChristoph Hellwig struct mutex lock; 347f3334447SChristoph Hellwig struct nvme_ns __rcu *current_path[]; 348f3334447SChristoph Hellwig #endif 349ed754e5dSChristoph Hellwig }; 350ed754e5dSChristoph Hellwig 35157dacad5SJay Sternberg struct nvme_ns { 35257dacad5SJay Sternberg struct list_head list; 35357dacad5SJay Sternberg 3541c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 35557dacad5SJay Sternberg struct request_queue *queue; 35657dacad5SJay Sternberg struct gendisk *disk; 3570d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 3580d0b660fSChristoph Hellwig enum nvme_ana_state ana_state; 3590d0b660fSChristoph Hellwig u32 ana_grpid; 3600d0b660fSChristoph Hellwig #endif 361ed754e5dSChristoph Hellwig struct list_head siblings; 362b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 36357dacad5SJay Sternberg struct kref kref; 364ed754e5dSChristoph Hellwig struct nvme_ns_head *head; 36557dacad5SJay Sternberg 36657dacad5SJay Sternberg int lba_shift; 36757dacad5SJay Sternberg u16 ms; 368f5d11840SJens Axboe u16 sgs; 369f5d11840SJens Axboe u32 sws; 37057dacad5SJay Sternberg bool ext; 37157dacad5SJay Sternberg u8 pi_type; 372646017a6SKeith Busch unsigned long flags; 373646017a6SKeith Busch #define NVME_NS_REMOVING 0 37469d9a99cSKeith Busch #define NVME_NS_DEAD 1 3750d0b660fSChristoph Hellwig #define NVME_NS_ANA_PENDING 2 37657eeaf8eSChristoph Hellwig u16 noiob; 377b9e03857SThomas Tai 378b9e03857SThomas Tai struct nvme_fault_inject fault_inject; 379b9e03857SThomas Tai 38057dacad5SJay Sternberg }; 38157dacad5SJay Sternberg 3821c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 3831a353d85SMing Lin const char *name; 384e439bb12SSagi Grimberg struct module *module; 385d3d5b87dSChristoph Hellwig unsigned int flags; 386d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 387c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 388e0596ab2SLogan Gunthorpe #define NVME_F_PCI_P2PDMA (1 << 2) 3891c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 3905fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 3917fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 3921673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 393ad22c355SKeith Busch void (*submit_async_event)(struct nvme_ctrl *ctrl); 394c5017e85SChristoph Hellwig void (*delete_ctrl)(struct nvme_ctrl *ctrl); 3951a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 39657dacad5SJay Sternberg }; 39757dacad5SJay Sternberg 398b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 399a3646451SAkinobu Mita void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 400a3646451SAkinobu Mita const char *dev_name); 401a3646451SAkinobu Mita void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 402b9e03857SThomas Tai void nvme_should_fail(struct request *req); 403b9e03857SThomas Tai #else 404a3646451SAkinobu Mita static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 405a3646451SAkinobu Mita const char *dev_name) 406a3646451SAkinobu Mita { 407a3646451SAkinobu Mita } 408a3646451SAkinobu Mita static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 409a3646451SAkinobu Mita { 410a3646451SAkinobu Mita } 411b9e03857SThomas Tai static inline void nvme_should_fail(struct request *req) {} 412b9e03857SThomas Tai #endif 413b9e03857SThomas Tai 414f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 415f3ca80fcSChristoph Hellwig { 416f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 417f3ca80fcSChristoph Hellwig return -ENOTTY; 418f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 419f3ca80fcSChristoph Hellwig } 420f3ca80fcSChristoph Hellwig 42157dacad5SJay Sternberg static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 42257dacad5SJay Sternberg { 42357dacad5SJay Sternberg return (sector >> (ns->lba_shift - 9)); 42457dacad5SJay Sternberg } 42557dacad5SJay Sternberg 42627fa9bc5SChristoph Hellwig static inline void nvme_end_request(struct request *req, __le16 status, 42727fa9bc5SChristoph Hellwig union nvme_result result) 42815a190f7SChristoph Hellwig { 42927fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 43027fa9bc5SChristoph Hellwig 43127fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 43227fa9bc5SChristoph Hellwig rq->result = result; 433b9e03857SThomas Tai /* inject error when permitted by fault injection framework */ 434b9e03857SThomas Tai nvme_should_fail(req); 43508e0029aSChristoph Hellwig blk_mq_complete_request(req); 43615a190f7SChristoph Hellwig } 43715a190f7SChristoph Hellwig 438d22524a4SChristoph Hellwig static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 439d22524a4SChristoph Hellwig { 440d22524a4SChristoph Hellwig get_device(ctrl->device); 441d22524a4SChristoph Hellwig } 442d22524a4SChristoph Hellwig 443d22524a4SChristoph Hellwig static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 444d22524a4SChristoph Hellwig { 445d22524a4SChristoph Hellwig put_device(ctrl->device); 446d22524a4SChristoph Hellwig } 447d22524a4SChristoph Hellwig 44877f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 4497baa8572SJens Axboe bool nvme_cancel_request(struct request *req, void *data, bool reserved); 450bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 451bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 452b5b05048SSagi Grimberg int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 453c0f2f45bSSagi Grimberg int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 4545fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 455f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 456f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 45753029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 458d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 459d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 4601673f1f0SChristoph Hellwig void nvme_put_ctrl(struct nvme_ctrl *ctrl); 4617fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 4625bae7f73SChristoph Hellwig 4635bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 4641673f1f0SChristoph Hellwig 4654f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 4664f1244c8SChristoph Hellwig bool send); 467a98e58e5SScott Bauer 4687bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 469287a63ebSChristoph Hellwig volatile union nvme_result *res); 470f866fc42SChristoph Hellwig 47125646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 47225646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 47369d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 474d6135c3aSKeith Busch void nvme_sync_queues(struct nvme_ctrl *ctrl); 475302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 476302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 477302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 478302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 479363c9aacSSagi Grimberg 480eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 4814160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 4829a95e4efSBart Van Assche struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 483f7f1fc36SMax Gurtovoy void nvme_cleanup_cmd(struct request *req); 484fc17b653SChristoph Hellwig blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 4858093f7caSMing Lin struct nvme_command *cmd); 48657dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 48757dacad5SJay Sternberg void *buf, unsigned bufflen); 48857dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 489d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 4909a95e4efSBart Van Assche unsigned timeout, int qid, int at_head, 4916287b51cSSagi Grimberg blk_mq_req_flags_t flags, bool poll); 4921a87ee65SKeith Busch int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 4931a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 4941a87ee65SKeith Busch u32 *result); 4951a87ee65SKeith Busch int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 4961a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 4971a87ee65SKeith Busch u32 *result); 4989a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 499038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 500d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 50179c48ccfSSagi Grimberg int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 502c5017e85SChristoph Hellwig int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 50357dacad5SJay Sternberg 5040e98719bSChristoph Hellwig int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 5050e98719bSChristoph Hellwig void *log, size_t size, u64 offset); 506d558fb51SMatias Bjørling 50733b14f67SHannes Reinecke extern const struct attribute_group *nvme_ns_id_attr_groups[]; 50832acab31SChristoph Hellwig extern const struct block_device_operations nvme_ns_head_ops; 50932acab31SChristoph Hellwig 51032acab31SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 51166b20ac0SMarta Rybczynska static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 51266b20ac0SMarta Rybczynska { 51366b20ac0SMarta Rybczynska return ctrl->ana_log_buf != NULL; 51466b20ac0SMarta Rybczynska } 51566b20ac0SMarta Rybczynska 516b9156daeSSagi Grimberg void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 517b9156daeSSagi Grimberg void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 518b9156daeSSagi Grimberg void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 519a785dbccSKeith Busch void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 520a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags); 52132acab31SChristoph Hellwig void nvme_failover_req(struct request *req); 52232acab31SChristoph Hellwig void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 52332acab31SChristoph Hellwig int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 5240d0b660fSChristoph Hellwig void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 52532acab31SChristoph Hellwig void nvme_mpath_remove_disk(struct nvme_ns_head *head); 5260d0b660fSChristoph Hellwig int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 5270d0b660fSChristoph Hellwig void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 5280d0b660fSChristoph Hellwig void nvme_mpath_stop(struct nvme_ctrl *ctrl); 5290157ec8dSSagi Grimberg bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 5300157ec8dSSagi Grimberg void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 53132acab31SChristoph Hellwig struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 532479a322fSSagi Grimberg 533479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 534479a322fSSagi Grimberg { 535479a322fSSagi Grimberg struct nvme_ns_head *head = ns->head; 536479a322fSSagi Grimberg 537479a322fSSagi Grimberg if (head->disk && list_empty(&head->list)) 538479a322fSSagi Grimberg kblockd_schedule_work(&head->requeue_work); 539479a322fSSagi Grimberg } 540479a322fSSagi Grimberg 54135fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 54235fe0d12SHannes Reinecke blk_status_t status) 54335fe0d12SHannes Reinecke { 54435fe0d12SHannes Reinecke struct nvme_ns *ns = req->q->queuedata; 54535fe0d12SHannes Reinecke 54635fe0d12SHannes Reinecke if (req->cmd_flags & REQ_NVME_MPATH) 54735fe0d12SHannes Reinecke trace_block_bio_complete(ns->head->disk->queue, 54835fe0d12SHannes Reinecke req->bio, status); 54935fe0d12SHannes Reinecke } 55035fe0d12SHannes Reinecke 5510d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_grpid; 5520d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_state; 55375c10e73SHannes Reinecke extern struct device_attribute subsys_attr_iopolicy; 5540d0b660fSChristoph Hellwig 55532acab31SChristoph Hellwig #else 5560d0b660fSChristoph Hellwig static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 5570d0b660fSChristoph Hellwig { 5580d0b660fSChristoph Hellwig return false; 5590d0b660fSChristoph Hellwig } 560a785dbccSKeith Busch /* 561a785dbccSKeith Busch * Without the multipath code enabled, multiple controller per subsystems are 562a785dbccSKeith Busch * visible as devices and thus we cannot use the subsystem instance. 563a785dbccSKeith Busch */ 564a785dbccSKeith Busch static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 565a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags) 566a785dbccSKeith Busch { 567a785dbccSKeith Busch sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 568a785dbccSKeith Busch } 569a785dbccSKeith Busch 57032acab31SChristoph Hellwig static inline void nvme_failover_req(struct request *req) 57132acab31SChristoph Hellwig { 57232acab31SChristoph Hellwig } 57332acab31SChristoph Hellwig static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 57432acab31SChristoph Hellwig { 57532acab31SChristoph Hellwig } 57632acab31SChristoph Hellwig static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 57732acab31SChristoph Hellwig struct nvme_ns_head *head) 57832acab31SChristoph Hellwig { 57932acab31SChristoph Hellwig return 0; 58032acab31SChristoph Hellwig } 5810d0b660fSChristoph Hellwig static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 5820d0b660fSChristoph Hellwig struct nvme_id_ns *id) 58332acab31SChristoph Hellwig { 58432acab31SChristoph Hellwig } 58532acab31SChristoph Hellwig static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 58632acab31SChristoph Hellwig { 58732acab31SChristoph Hellwig } 5880157ec8dSSagi Grimberg static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 5890157ec8dSSagi Grimberg { 5900157ec8dSSagi Grimberg return false; 5910157ec8dSSagi Grimberg } 5920157ec8dSSagi Grimberg static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 59332acab31SChristoph Hellwig { 59432acab31SChristoph Hellwig } 595479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 596479a322fSSagi Grimberg { 597479a322fSSagi Grimberg } 59835fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 59935fe0d12SHannes Reinecke blk_status_t status) 60035fe0d12SHannes Reinecke { 60135fe0d12SHannes Reinecke } 6020d0b660fSChristoph Hellwig static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 6030d0b660fSChristoph Hellwig struct nvme_id_ctrl *id) 6040d0b660fSChristoph Hellwig { 60514a1336eSChristoph Hellwig if (ctrl->subsys->cmic & (1 << 3)) 60614a1336eSChristoph Hellwig dev_warn(ctrl->device, 60714a1336eSChristoph Hellwig "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 6080d0b660fSChristoph Hellwig return 0; 6090d0b660fSChristoph Hellwig } 6100d0b660fSChristoph Hellwig static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 6110d0b660fSChristoph Hellwig { 6120d0b660fSChristoph Hellwig } 6130d0b660fSChristoph Hellwig static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 6140d0b660fSChristoph Hellwig { 6150d0b660fSChristoph Hellwig } 616b9156daeSSagi Grimberg static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 617b9156daeSSagi Grimberg { 618b9156daeSSagi Grimberg } 619b9156daeSSagi Grimberg static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 620b9156daeSSagi Grimberg { 621b9156daeSSagi Grimberg } 622b9156daeSSagi Grimberg static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 623b9156daeSSagi Grimberg { 624b9156daeSSagi Grimberg } 62532acab31SChristoph Hellwig #endif /* CONFIG_NVME_MULTIPATH */ 62632acab31SChristoph Hellwig 627c4699e70SKeith Busch #ifdef CONFIG_NVM 6283dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 629b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 63033b14f67SHannes Reinecke extern const struct attribute_group nvme_nvm_attr_group; 63184d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 632c4699e70SKeith Busch #else 633b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 6343dc87dd0SMatias Bjørling int node) 635c4699e70SKeith Busch { 636c4699e70SKeith Busch return 0; 637c4699e70SKeith Busch } 638c4699e70SKeith Busch 639b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 64084d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 64184d4add7SMatias Bjørling unsigned long arg) 64284d4add7SMatias Bjørling { 64384d4add7SMatias Bjørling return -ENOTTY; 64484d4add7SMatias Bjørling } 6453dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 6463dc87dd0SMatias Bjørling 64740267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 64840267efdSSimon A. F. Lund { 64940267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 65040267efdSSimon A. F. Lund } 651ca064085SMatias Bjørling 65257dacad5SJay Sternberg #endif /* _NVME_H */ 653