1bc50ad75SChristoph Hellwig /* SPDX-License-Identifier: GPL-2.0 */ 257dacad5SJay Sternberg /* 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg */ 557dacad5SJay Sternberg 657dacad5SJay Sternberg #ifndef _NVME_H 757dacad5SJay Sternberg #define _NVME_H 857dacad5SJay Sternberg 957dacad5SJay Sternberg #include <linux/nvme.h> 10a6a5149bSChristoph Hellwig #include <linux/cdev.h> 1157dacad5SJay Sternberg #include <linux/pci.h> 1257dacad5SJay Sternberg #include <linux/kref.h> 1357dacad5SJay Sternberg #include <linux/blk-mq.h> 14b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 15a98e58e5SScott Bauer #include <linux/sed-opal.h> 16b9e03857SThomas Tai #include <linux/fault-inject.h> 17978628ecSJohannes Thumshirn #include <linux/rcupdate.h> 18c1ac9a4bSKeith Busch #include <linux/wait.h> 194d2ce688SJames Smart #include <linux/t10-pi.h> 2057dacad5SJay Sternberg 2135fe0d12SHannes Reinecke #include <trace/events/block.h> 2235fe0d12SHannes Reinecke 238ae4e447SMarc Olson extern unsigned int nvme_io_timeout; 2457dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2557dacad5SJay Sternberg 268ae4e447SMarc Olson extern unsigned int admin_timeout; 2721d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 2821d34711SChristoph Hellwig 29038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 30038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 31038bd4cbSSagi Grimberg 3238e18002SIsrael Rukshin #ifdef CONFIG_ARCH_NO_SG_CHAIN 3338e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 0 34ba7ca2aeSIsrael Rukshin #define NVME_INLINE_METADATA_SG_CNT 0 3538e18002SIsrael Rukshin #else 3638e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 2 37ba7ca2aeSIsrael Rukshin #define NVME_INLINE_METADATA_SG_CNT 1 3838e18002SIsrael Rukshin #endif 3938e18002SIsrael Rukshin 406c3c05b0SChaitanya Kulkarni /* 416c3c05b0SChaitanya Kulkarni * Default to a 4K page size, with the intention to update this 426c3c05b0SChaitanya Kulkarni * path in the future to accommodate architectures with differing 436c3c05b0SChaitanya Kulkarni * kernel and IO page sizes. 446c3c05b0SChaitanya Kulkarni */ 456c3c05b0SChaitanya Kulkarni #define NVME_CTRL_PAGE_SHIFT 12 466c3c05b0SChaitanya Kulkarni #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 476c3c05b0SChaitanya Kulkarni 489a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 49b227c59bSRoy Shterman extern struct workqueue_struct *nvme_reset_wq; 50b227c59bSRoy Shterman extern struct workqueue_struct *nvme_delete_wq; 519a6327d2SSagi Grimberg 52ca064085SMatias Bjørling enum { 53ca064085SMatias Bjørling NVME_NS_LBA = 0, 54ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 55ca064085SMatias Bjørling }; 56ca064085SMatias Bjørling 5757dacad5SJay Sternberg /* 58106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 59106198edSChristoph Hellwig * the standard. 6057dacad5SJay Sternberg */ 61106198edSChristoph Hellwig enum nvme_quirks { 62106198edSChristoph Hellwig /* 63106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 64106198edSChristoph Hellwig * specific Identify field. 65106198edSChristoph Hellwig */ 66106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 67540c801cSKeith Busch 68540c801cSKeith Busch /* 69540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 70540c801cSKeith Busch * correctly. 71540c801cSKeith Busch */ 72540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 7308095e70SKeith Busch 7408095e70SKeith Busch /* 75e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 76e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 7708095e70SKeith Busch */ 78e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 7954adc010SGuilherme G. Piccoli 8054adc010SGuilherme G. Piccoli /* 8154adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 8254adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 8354adc010SGuilherme G. Piccoli */ 8454adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 85c5552fdeSAndy Lutomirski 86c5552fdeSAndy Lutomirski /* 87c5552fdeSAndy Lutomirski * APST should not be used. 88c5552fdeSAndy Lutomirski */ 89c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 90ff5350a8SAndy Lutomirski 91ff5350a8SAndy Lutomirski /* 92ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 93ff5350a8SAndy Lutomirski */ 94ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 95608cc4b1SChristoph Hellwig 96608cc4b1SChristoph Hellwig /* 97608cc4b1SChristoph Hellwig * Supports the LighNVM command set if indicated in vs[1]. 98608cc4b1SChristoph Hellwig */ 99608cc4b1SChristoph Hellwig NVME_QUIRK_LIGHTNVM = (1 << 6), 1009abd68efSJens Axboe 1019abd68efSJens Axboe /* 1029abd68efSJens Axboe * Set MEDIUM priority on SQ creation 1039abd68efSJens Axboe */ 1049abd68efSJens Axboe NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 1056299358dSJames Dingwall 1066299358dSJames Dingwall /* 1076299358dSJames Dingwall * Ignore device provided subnqn. 1086299358dSJames Dingwall */ 1096299358dSJames Dingwall NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 1107b210e4eSChristoph Hellwig 1117b210e4eSChristoph Hellwig /* 1127b210e4eSChristoph Hellwig * Broken Write Zeroes. 1137b210e4eSChristoph Hellwig */ 1147b210e4eSChristoph Hellwig NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 115cb32de1bSMario Limonciello 116cb32de1bSMario Limonciello /* 117cb32de1bSMario Limonciello * Force simple suspend/resume path. 118cb32de1bSMario Limonciello */ 119cb32de1bSMario Limonciello NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 1207ad67ca5SLinus Torvalds 1217ad67ca5SLinus Torvalds /* 12266341331SBenjamin Herrenschmidt * Use only one interrupt vector for all queues 12366341331SBenjamin Herrenschmidt */ 1247ad67ca5SLinus Torvalds NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 12566341331SBenjamin Herrenschmidt 12666341331SBenjamin Herrenschmidt /* 12766341331SBenjamin Herrenschmidt * Use non-standard 128 bytes SQEs. 12866341331SBenjamin Herrenschmidt */ 1297ad67ca5SLinus Torvalds NVME_QUIRK_128_BYTES_SQES = (1 << 12), 130d38e9f04SBenjamin Herrenschmidt 131d38e9f04SBenjamin Herrenschmidt /* 132d38e9f04SBenjamin Herrenschmidt * Prevent tag overlap between queues 133d38e9f04SBenjamin Herrenschmidt */ 1347ad67ca5SLinus Torvalds NVME_QUIRK_SHARED_TAGS = (1 << 13), 1356c6aa2f2SAkinobu Mita 1366c6aa2f2SAkinobu Mita /* 1376c6aa2f2SAkinobu Mita * Don't change the value of the temperature threshold feature 1386c6aa2f2SAkinobu Mita */ 1396c6aa2f2SAkinobu Mita NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 140106198edSChristoph Hellwig }; 141106198edSChristoph Hellwig 142d49187e9SChristoph Hellwig /* 143d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 144d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 145d49187e9SChristoph Hellwig */ 146d49187e9SChristoph Hellwig struct nvme_request { 147d49187e9SChristoph Hellwig struct nvme_command *cmd; 148d49187e9SChristoph Hellwig union nvme_result result; 14944e44b29SChristoph Hellwig u8 retries; 15027fa9bc5SChristoph Hellwig u8 flags; 15127fa9bc5SChristoph Hellwig u16 status; 15259e29ce6SSagi Grimberg struct nvme_ctrl *ctrl; 15327fa9bc5SChristoph Hellwig }; 15427fa9bc5SChristoph Hellwig 15532acab31SChristoph Hellwig /* 15632acab31SChristoph Hellwig * Mark a bio as coming in through the mpath node. 15732acab31SChristoph Hellwig */ 15832acab31SChristoph Hellwig #define REQ_NVME_MPATH REQ_DRV 15932acab31SChristoph Hellwig 16027fa9bc5SChristoph Hellwig enum { 16127fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 162bb06ec31SJames Smart NVME_REQ_USERCMD = (1 << 1), 163d49187e9SChristoph Hellwig }; 164d49187e9SChristoph Hellwig 165d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 166d49187e9SChristoph Hellwig { 167d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 168d49187e9SChristoph Hellwig } 169d49187e9SChristoph Hellwig 1705d87eb94SKeith Busch static inline u16 nvme_req_qid(struct request *req) 1715d87eb94SKeith Busch { 1725d87eb94SKeith Busch if (!req->rq_disk) 1735d87eb94SKeith Busch return 0; 1745d87eb94SKeith Busch return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 1755d87eb94SKeith Busch } 1765d87eb94SKeith Busch 17754adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 17854adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 17954adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 18054adc010SGuilherme G. Piccoli * found empirically. 18154adc010SGuilherme G. Piccoli */ 1828c97eeccSJeff Lien #define NVME_QUIRK_DELAY_AMOUNT 2300 18354adc010SGuilherme G. Piccoli 1844212f4e9SSagi Grimberg /* 1854212f4e9SSagi Grimberg * enum nvme_ctrl_state: Controller state 1864212f4e9SSagi Grimberg * 1874212f4e9SSagi Grimberg * @NVME_CTRL_NEW: New controller just allocated, initial state 1884212f4e9SSagi Grimberg * @NVME_CTRL_LIVE: Controller is connected and I/O capable 1894212f4e9SSagi Grimberg * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 1904212f4e9SSagi Grimberg * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 1914212f4e9SSagi Grimberg * transport 1924212f4e9SSagi Grimberg * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 193ecca390eSSagi Grimberg * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 194ecca390eSSagi Grimberg * disabled/failed immediately. This state comes 195ecca390eSSagi Grimberg * after all async event processing took place and 196ecca390eSSagi Grimberg * before ns removal and the controller deletion 197ecca390eSSagi Grimberg * progress 1984212f4e9SSagi Grimberg * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 1994212f4e9SSagi Grimberg * shutdown or removal. In this case we forcibly 2004212f4e9SSagi Grimberg * kill all inflight I/O as they have no chance to 2014212f4e9SSagi Grimberg * complete 2024212f4e9SSagi Grimberg */ 203bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 204bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 205bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 206bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 207ad6a0a52SMax Gurtovoy NVME_CTRL_CONNECTING, 208bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 209ecca390eSSagi Grimberg NVME_CTRL_DELETING_NOIO, 2100ff9d4e1SKeith Busch NVME_CTRL_DEAD, 211bb8d261eSChristoph Hellwig }; 212bb8d261eSChristoph Hellwig 213a3646451SAkinobu Mita struct nvme_fault_inject { 214a3646451SAkinobu Mita #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 215a3646451SAkinobu Mita struct fault_attr attr; 216a3646451SAkinobu Mita struct dentry *parent; 217a3646451SAkinobu Mita bool dont_retry; /* DNR, do not retry */ 218a3646451SAkinobu Mita u16 status; /* status code */ 219a3646451SAkinobu Mita #endif 220a3646451SAkinobu Mita }; 221a3646451SAkinobu Mita 222be93e87eSKeith Busch struct nvme_cel { 223be93e87eSKeith Busch struct list_head entry; 224be93e87eSKeith Busch struct nvme_effects_log log; 225be93e87eSKeith Busch u8 csi; 226be93e87eSKeith Busch }; 227be93e87eSKeith Busch 2281c63dc66SChristoph Hellwig struct nvme_ctrl { 2296e3ca03eSSagi Grimberg bool comp_seen; 230bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 231bd4da3abSAndy Lutomirski bool identified; 232bb8d261eSChristoph Hellwig spinlock_t lock; 233e7ad43c3SKeith Busch struct mutex scan_lock; 2341c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 23557dacad5SJay Sternberg struct request_queue *admin_q; 23607bfcd09SChristoph Hellwig struct request_queue *connect_q; 237e7832cb4SSagi Grimberg struct request_queue *fabrics_q; 23857dacad5SJay Sternberg struct device *dev; 23957dacad5SJay Sternberg int instance; 240103e515eSHannes Reinecke int numa_node; 2415bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 24234b6c231SSagi Grimberg struct blk_mq_tag_set *admin_tagset; 2435bae7f73SChristoph Hellwig struct list_head namespaces; 244765cc031SJianchao Wang struct rw_semaphore namespaces_rwsem; 245d22524a4SChristoph Hellwig struct device ctrl_device; 2465bae7f73SChristoph Hellwig struct device *device; /* char device */ 247a6a5149bSChristoph Hellwig struct cdev cdev; 248d86c4d8eSChristoph Hellwig struct work_struct reset_work; 249c5017e85SChristoph Hellwig struct work_struct delete_work; 250c1ac9a4bSKeith Busch wait_queue_head_t state_wq; 2511c63dc66SChristoph Hellwig 252ab9e00ccSChristoph Hellwig struct nvme_subsystem *subsys; 253ab9e00ccSChristoph Hellwig struct list_head subsys_entry; 254ab9e00ccSChristoph Hellwig 2554f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 256a98e58e5SScott Bauer 25757dacad5SJay Sternberg char name[12]; 25876e3914aSChristoph Hellwig u16 cntlid; 2595fd4ce1bSChristoph Hellwig 2605fd4ce1bSChristoph Hellwig u32 ctrl_config; 261b6dccf7fSArnav Dawn u16 mtfa; 262d858e5f0SSagi Grimberg u32 queue_count; 2635fd4ce1bSChristoph Hellwig 26420d0dfe6SSagi Grimberg u64 cap; 26557dacad5SJay Sternberg u32 max_hw_sectors; 266943e942eSJens Axboe u32 max_segments; 26795093350SMax Gurtovoy u32 max_integrity_segments; 268240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 269240e6ee2SKeith Busch u32 max_zone_append; 270240e6ee2SKeith Busch #endif 27149cd84b6SKeith Busch u16 crdt[3]; 27257dacad5SJay Sternberg u16 oncs; 2738a9ae523SScott Bauer u16 oacs; 274f5d11840SJens Axboe u16 nssa; 275f5d11840SJens Axboe u16 nr_streams; 276f968688fSKeith Busch u16 sqsize; 2770d0b660fSChristoph Hellwig u32 max_namespaces; 2786bf25d16SChristoph Hellwig atomic_t abort_limit; 27957dacad5SJay Sternberg u8 vwc; 280f3ca80fcSChristoph Hellwig u32 vs; 28107bfcd09SChristoph Hellwig u32 sgls; 282038bd4cbSSagi Grimberg u16 kas; 283c5552fdeSAndy Lutomirski u8 npss; 284c5552fdeSAndy Lutomirski u8 apsta; 285400b6a7bSGuenter Roeck u16 wctemp; 286400b6a7bSGuenter Roeck u16 cctemp; 287c0561f82SHannes Reinecke u32 oaes; 288e3d7874dSKeith Busch u32 aen_result; 2893e53ba38SSagi Grimberg u32 ctratt; 29007fbd32aSMartin K. Petersen unsigned int shutdown_timeout; 291038bd4cbSSagi Grimberg unsigned int kato; 292f3ca80fcSChristoph Hellwig bool subsystem; 293106198edSChristoph Hellwig unsigned long quirks; 294c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 29584fef62dSKeith Busch struct nvme_effects_log *effects; 296be93e87eSKeith Busch struct list_head cels; 2975955be21SChristoph Hellwig struct work_struct scan_work; 298f866fc42SChristoph Hellwig struct work_struct async_event_work; 299038bd4cbSSagi Grimberg struct delayed_work ka_work; 3000a34e466SRoland Dreier struct nvme_command ka_cmd; 301b6dccf7fSArnav Dawn struct work_struct fw_act_work; 30230d90964SChristoph Hellwig unsigned long events; 303ce151813SIsrael Rukshin bool created; 30407bfcd09SChristoph Hellwig 3050d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 3060d0b660fSChristoph Hellwig /* asymmetric namespace access: */ 3070d0b660fSChristoph Hellwig u8 anacap; 3080d0b660fSChristoph Hellwig u8 anatt; 3090d0b660fSChristoph Hellwig u32 anagrpmax; 3100d0b660fSChristoph Hellwig u32 nanagrpid; 3110d0b660fSChristoph Hellwig struct mutex ana_lock; 3120d0b660fSChristoph Hellwig struct nvme_ana_rsp_hdr *ana_log_buf; 3130d0b660fSChristoph Hellwig size_t ana_log_size; 3140d0b660fSChristoph Hellwig struct timer_list anatt_timer; 3150d0b660fSChristoph Hellwig struct work_struct ana_work; 3160d0b660fSChristoph Hellwig #endif 3170d0b660fSChristoph Hellwig 318c5552fdeSAndy Lutomirski /* Power saving configuration */ 319c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 32076a5af84SKai-Heng Feng bool apst_enabled; 321c5552fdeSAndy Lutomirski 322044a9df1SChristoph Hellwig /* PCIe only: */ 323fe6d53c9SChristoph Hellwig u32 hmpre; 324fe6d53c9SChristoph Hellwig u32 hmmin; 325044a9df1SChristoph Hellwig u32 hmminds; 326044a9df1SChristoph Hellwig u16 hmmaxd; 327fe6d53c9SChristoph Hellwig 32807bfcd09SChristoph Hellwig /* Fabrics only */ 32907bfcd09SChristoph Hellwig u32 ioccsz; 33007bfcd09SChristoph Hellwig u32 iorcsz; 33107bfcd09SChristoph Hellwig u16 icdoff; 33207bfcd09SChristoph Hellwig u16 maxcmd; 333fdf9dfa8SSagi Grimberg int nr_reconnects; 33407bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 335cb5b7262SJens Axboe 336cb5b7262SJens Axboe struct page *discard_page; 337cb5b7262SJens Axboe unsigned long discard_page_busy; 338f79d5fdaSAkinobu Mita 339f79d5fdaSAkinobu Mita struct nvme_fault_inject fault_inject; 34057dacad5SJay Sternberg }; 34157dacad5SJay Sternberg 34275c10e73SHannes Reinecke enum nvme_iopolicy { 34375c10e73SHannes Reinecke NVME_IOPOLICY_NUMA, 34475c10e73SHannes Reinecke NVME_IOPOLICY_RR, 34575c10e73SHannes Reinecke }; 34675c10e73SHannes Reinecke 347ab9e00ccSChristoph Hellwig struct nvme_subsystem { 348ab9e00ccSChristoph Hellwig int instance; 349ab9e00ccSChristoph Hellwig struct device dev; 350ab9e00ccSChristoph Hellwig /* 351ab9e00ccSChristoph Hellwig * Because we unregister the device on the last put we need 352ab9e00ccSChristoph Hellwig * a separate refcount. 353ab9e00ccSChristoph Hellwig */ 354ab9e00ccSChristoph Hellwig struct kref ref; 355ab9e00ccSChristoph Hellwig struct list_head entry; 356ab9e00ccSChristoph Hellwig struct mutex lock; 357ab9e00ccSChristoph Hellwig struct list_head ctrls; 358ed754e5dSChristoph Hellwig struct list_head nsheads; 359ab9e00ccSChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 360ab9e00ccSChristoph Hellwig char serial[20]; 361ab9e00ccSChristoph Hellwig char model[40]; 362ab9e00ccSChristoph Hellwig char firmware_rev[8]; 363ab9e00ccSChristoph Hellwig u8 cmic; 364ab9e00ccSChristoph Hellwig u16 vendor_id; 36581adb863SBart Van Assche u16 awupf; /* 0's based awupf value. */ 366ed754e5dSChristoph Hellwig struct ida ns_ida; 36775c10e73SHannes Reinecke #ifdef CONFIG_NVME_MULTIPATH 36875c10e73SHannes Reinecke enum nvme_iopolicy iopolicy; 36975c10e73SHannes Reinecke #endif 370ab9e00ccSChristoph Hellwig }; 371ab9e00ccSChristoph Hellwig 372002fab04SChristoph Hellwig /* 373002fab04SChristoph Hellwig * Container structure for uniqueue namespace identifiers. 374002fab04SChristoph Hellwig */ 375002fab04SChristoph Hellwig struct nvme_ns_ids { 376002fab04SChristoph Hellwig u8 eui64[8]; 377002fab04SChristoph Hellwig u8 nguid[16]; 378002fab04SChristoph Hellwig uuid_t uuid; 37971010c30SNiklas Cassel u8 csi; 380002fab04SChristoph Hellwig }; 381002fab04SChristoph Hellwig 382ed754e5dSChristoph Hellwig /* 383ed754e5dSChristoph Hellwig * Anchor structure for namespaces. There is one for each namespace in a 384ed754e5dSChristoph Hellwig * NVMe subsystem that any of our controllers can see, and the namespace 385ed754e5dSChristoph Hellwig * structure for each controller is chained of it. For private namespaces 386ed754e5dSChristoph Hellwig * there is a 1:1 relation to our namespace structures, that is ->list 387ed754e5dSChristoph Hellwig * only ever has a single entry for private namespaces. 388ed754e5dSChristoph Hellwig */ 389ed754e5dSChristoph Hellwig struct nvme_ns_head { 390ed754e5dSChristoph Hellwig struct list_head list; 391ed754e5dSChristoph Hellwig struct srcu_struct srcu; 392ed754e5dSChristoph Hellwig struct nvme_subsystem *subsys; 393ed754e5dSChristoph Hellwig unsigned ns_id; 394ed754e5dSChristoph Hellwig struct nvme_ns_ids ids; 395ed754e5dSChristoph Hellwig struct list_head entry; 396ed754e5dSChristoph Hellwig struct kref ref; 3970c284db7SKeith Busch bool shared; 398ed754e5dSChristoph Hellwig int instance; 399be93e87eSKeith Busch struct nvme_effects_log *effects; 400f3334447SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 401f3334447SChristoph Hellwig struct gendisk *disk; 402f3334447SChristoph Hellwig struct bio_list requeue_list; 403f3334447SChristoph Hellwig spinlock_t requeue_lock; 404f3334447SChristoph Hellwig struct work_struct requeue_work; 405f3334447SChristoph Hellwig struct mutex lock; 406d8a22f85SAnton Eidelman unsigned long flags; 407d8a22f85SAnton Eidelman #define NVME_NSHEAD_DISK_LIVE 0 408f3334447SChristoph Hellwig struct nvme_ns __rcu *current_path[]; 409f3334447SChristoph Hellwig #endif 410ed754e5dSChristoph Hellwig }; 411ed754e5dSChristoph Hellwig 412ffc89b1dSMax Gurtovoy enum nvme_ns_features { 413ffc89b1dSMax Gurtovoy NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 414b29f8485SMax Gurtovoy NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 415ffc89b1dSMax Gurtovoy }; 416ffc89b1dSMax Gurtovoy 41757dacad5SJay Sternberg struct nvme_ns { 41857dacad5SJay Sternberg struct list_head list; 41957dacad5SJay Sternberg 4201c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 42157dacad5SJay Sternberg struct request_queue *queue; 42257dacad5SJay Sternberg struct gendisk *disk; 4230d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 4240d0b660fSChristoph Hellwig enum nvme_ana_state ana_state; 4250d0b660fSChristoph Hellwig u32 ana_grpid; 4260d0b660fSChristoph Hellwig #endif 427ed754e5dSChristoph Hellwig struct list_head siblings; 428b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 42957dacad5SJay Sternberg struct kref kref; 430ed754e5dSChristoph Hellwig struct nvme_ns_head *head; 43157dacad5SJay Sternberg 43257dacad5SJay Sternberg int lba_shift; 43357dacad5SJay Sternberg u16 ms; 434f5d11840SJens Axboe u16 sgs; 435f5d11840SJens Axboe u32 sws; 43657dacad5SJay Sternberg u8 pi_type; 437240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 438240e6ee2SKeith Busch u64 zsze; 439240e6ee2SKeith Busch #endif 440ffc89b1dSMax Gurtovoy unsigned long features; 441646017a6SKeith Busch unsigned long flags; 442646017a6SKeith Busch #define NVME_NS_REMOVING 0 44369d9a99cSKeith Busch #define NVME_NS_DEAD 1 4440d0b660fSChristoph Hellwig #define NVME_NS_ANA_PENDING 2 445b9e03857SThomas Tai 446b9e03857SThomas Tai struct nvme_fault_inject fault_inject; 447b9e03857SThomas Tai 44857dacad5SJay Sternberg }; 44957dacad5SJay Sternberg 4504d2ce688SJames Smart /* NVMe ns supports metadata actions by the controller (generate/strip) */ 4514d2ce688SJames Smart static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 4524d2ce688SJames Smart { 4534d2ce688SJames Smart return ns->pi_type && ns->ms == sizeof(struct t10_pi_tuple); 4544d2ce688SJames Smart } 4554d2ce688SJames Smart 4561c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 4571a353d85SMing Lin const char *name; 458e439bb12SSagi Grimberg struct module *module; 459d3d5b87dSChristoph Hellwig unsigned int flags; 460d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 461c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 462e0596ab2SLogan Gunthorpe #define NVME_F_PCI_P2PDMA (1 << 2) 4631c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 4645fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 4657fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 4661673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 467ad22c355SKeith Busch void (*submit_async_event)(struct nvme_ctrl *ctrl); 468c5017e85SChristoph Hellwig void (*delete_ctrl)(struct nvme_ctrl *ctrl); 4691a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 47057dacad5SJay Sternberg }; 47157dacad5SJay Sternberg 472b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 473a3646451SAkinobu Mita void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 474a3646451SAkinobu Mita const char *dev_name); 475a3646451SAkinobu Mita void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 476b9e03857SThomas Tai void nvme_should_fail(struct request *req); 477b9e03857SThomas Tai #else 478a3646451SAkinobu Mita static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 479a3646451SAkinobu Mita const char *dev_name) 480a3646451SAkinobu Mita { 481a3646451SAkinobu Mita } 482a3646451SAkinobu Mita static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 483a3646451SAkinobu Mita { 484a3646451SAkinobu Mita } 485b9e03857SThomas Tai static inline void nvme_should_fail(struct request *req) {} 486b9e03857SThomas Tai #endif 487b9e03857SThomas Tai 488f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 489f3ca80fcSChristoph Hellwig { 490f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 491f3ca80fcSChristoph Hellwig return -ENOTTY; 492f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 493f3ca80fcSChristoph Hellwig } 494f3ca80fcSChristoph Hellwig 495314d48ddSDamien Le Moal /* 496314d48ddSDamien Le Moal * Convert a 512B sector number to a device logical block number. 497314d48ddSDamien Le Moal */ 498314d48ddSDamien Le Moal static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 49957dacad5SJay Sternberg { 500314d48ddSDamien Le Moal return sector >> (ns->lba_shift - SECTOR_SHIFT); 50157dacad5SJay Sternberg } 50257dacad5SJay Sternberg 503e08f2ae8SDamien Le Moal /* 504e08f2ae8SDamien Le Moal * Convert a device logical block number to a 512B sector number. 505e08f2ae8SDamien Le Moal */ 506e08f2ae8SDamien Le Moal static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 507e08f2ae8SDamien Le Moal { 508e08f2ae8SDamien Le Moal return lba << (ns->lba_shift - SECTOR_SHIFT); 50957dacad5SJay Sternberg } 51057dacad5SJay Sternberg 51171fb90ebSKeith Busch /* 51271fb90ebSKeith Busch * Convert byte length to nvme's 0-based num dwords 51371fb90ebSKeith Busch */ 51471fb90ebSKeith Busch static inline u32 nvme_bytes_to_numd(size_t len) 51571fb90ebSKeith Busch { 51671fb90ebSKeith Busch return (len >> 2) - 1; 51771fb90ebSKeith Busch } 51871fb90ebSKeith Busch 519ff029451SChristoph Hellwig static inline bool nvme_end_request(struct request *req, __le16 status, 52027fa9bc5SChristoph Hellwig union nvme_result result) 52115a190f7SChristoph Hellwig { 52227fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 52327fa9bc5SChristoph Hellwig 52427fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 52527fa9bc5SChristoph Hellwig rq->result = result; 526b9e03857SThomas Tai /* inject error when permitted by fault injection framework */ 527b9e03857SThomas Tai nvme_should_fail(req); 528ff029451SChristoph Hellwig if (unlikely(blk_should_fake_timeout(req->q))) 529ff029451SChristoph Hellwig return true; 530ff029451SChristoph Hellwig return blk_mq_complete_request_remote(req); 53115a190f7SChristoph Hellwig } 53215a190f7SChristoph Hellwig 533d22524a4SChristoph Hellwig static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 534d22524a4SChristoph Hellwig { 535d22524a4SChristoph Hellwig get_device(ctrl->device); 536d22524a4SChristoph Hellwig } 537d22524a4SChristoph Hellwig 538d22524a4SChristoph Hellwig static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 539d22524a4SChristoph Hellwig { 540d22524a4SChristoph Hellwig put_device(ctrl->device); 541d22524a4SChristoph Hellwig } 542d22524a4SChristoph Hellwig 54358a8df67SIsrael Rukshin static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 54458a8df67SIsrael Rukshin { 54558a8df67SIsrael Rukshin return !qid && command_id >= NVME_AQ_BLK_MQ_DEPTH; 54658a8df67SIsrael Rukshin } 54758a8df67SIsrael Rukshin 54877f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 5497baa8572SJens Axboe bool nvme_cancel_request(struct request *req, void *data, bool reserved); 550bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 551bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 552c1ac9a4bSKeith Busch bool nvme_wait_reset(struct nvme_ctrl *ctrl); 553b5b05048SSagi Grimberg int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 554c0f2f45bSSagi Grimberg int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 5555fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 556f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 557f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 55853029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 559d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 560d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 5617fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 5625bae7f73SChristoph Hellwig 5635bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 5641673f1f0SChristoph Hellwig 5654f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 5664f1244c8SChristoph Hellwig bool send); 567a98e58e5SScott Bauer 5687bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 569287a63ebSChristoph Hellwig volatile union nvme_result *res); 570f866fc42SChristoph Hellwig 57125646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 57225646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 57369d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 574d6135c3aSKeith Busch void nvme_sync_queues(struct nvme_ctrl *ctrl); 575302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 576302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 577302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 578302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 579363c9aacSSagi Grimberg 580eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 5814160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 5829a95e4efSBart Van Assche struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 583f7f1fc36SMax Gurtovoy void nvme_cleanup_cmd(struct request *req); 584fc17b653SChristoph Hellwig blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 5858093f7caSMing Lin struct nvme_command *cmd); 58657dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 58757dacad5SJay Sternberg void *buf, unsigned bufflen); 58857dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 589d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 5909a95e4efSBart Van Assche unsigned timeout, int qid, int at_head, 5916287b51cSSagi Grimberg blk_mq_req_flags_t flags, bool poll); 5921a87ee65SKeith Busch int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 5931a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 5941a87ee65SKeith Busch u32 *result); 5951a87ee65SKeith Busch int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 5961a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 5971a87ee65SKeith Busch u32 *result); 5989a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 599038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 600d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 60179c48ccfSSagi Grimberg int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 602c1ac9a4bSKeith Busch int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 603c5017e85SChristoph Hellwig int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 60457dacad5SJay Sternberg 605be93e87eSKeith Busch int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 6060e98719bSChristoph Hellwig void *log, size_t size, u64 offset); 607240e6ee2SKeith Busch struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk, 608240e6ee2SKeith Busch struct nvme_ns_head **head, int *srcu_idx); 609240e6ee2SKeith Busch void nvme_put_ns_from_disk(struct nvme_ns_head *head, int idx); 610d558fb51SMatias Bjørling 61133b14f67SHannes Reinecke extern const struct attribute_group *nvme_ns_id_attr_groups[]; 61232acab31SChristoph Hellwig extern const struct block_device_operations nvme_ns_head_ops; 61332acab31SChristoph Hellwig 61432acab31SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 61566b20ac0SMarta Rybczynska static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 61666b20ac0SMarta Rybczynska { 61766b20ac0SMarta Rybczynska return ctrl->ana_log_buf != NULL; 61866b20ac0SMarta Rybczynska } 61966b20ac0SMarta Rybczynska 620b9156daeSSagi Grimberg void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 621b9156daeSSagi Grimberg void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 622b9156daeSSagi Grimberg void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 623a785dbccSKeith Busch void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 624a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags); 625764e9332SJohn Meneghini bool nvme_failover_req(struct request *req); 62632acab31SChristoph Hellwig void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 62732acab31SChristoph Hellwig int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 6280d0b660fSChristoph Hellwig void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 62932acab31SChristoph Hellwig void nvme_mpath_remove_disk(struct nvme_ns_head *head); 6300d0b660fSChristoph Hellwig int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 6310d0b660fSChristoph Hellwig void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 6320d0b660fSChristoph Hellwig void nvme_mpath_stop(struct nvme_ctrl *ctrl); 6330157ec8dSSagi Grimberg bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 6340157ec8dSSagi Grimberg void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 63532acab31SChristoph Hellwig struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 636c62b37d9SChristoph Hellwig blk_qc_t nvme_ns_head_submit_bio(struct bio *bio); 637479a322fSSagi Grimberg 638479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 639479a322fSSagi Grimberg { 640479a322fSSagi Grimberg struct nvme_ns_head *head = ns->head; 641479a322fSSagi Grimberg 642479a322fSSagi Grimberg if (head->disk && list_empty(&head->list)) 643479a322fSSagi Grimberg kblockd_schedule_work(&head->requeue_work); 644479a322fSSagi Grimberg } 645479a322fSSagi Grimberg 64635fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 64735fe0d12SHannes Reinecke blk_status_t status) 64835fe0d12SHannes Reinecke { 64935fe0d12SHannes Reinecke struct nvme_ns *ns = req->q->queuedata; 65035fe0d12SHannes Reinecke 65135fe0d12SHannes Reinecke if (req->cmd_flags & REQ_NVME_MPATH) 652d24de76aSChristoph Hellwig trace_block_bio_complete(ns->head->disk->queue, req->bio); 65335fe0d12SHannes Reinecke } 65435fe0d12SHannes Reinecke 6550d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_grpid; 6560d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_state; 65775c10e73SHannes Reinecke extern struct device_attribute subsys_attr_iopolicy; 6580d0b660fSChristoph Hellwig 65932acab31SChristoph Hellwig #else 6600d0b660fSChristoph Hellwig static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 6610d0b660fSChristoph Hellwig { 6620d0b660fSChristoph Hellwig return false; 6630d0b660fSChristoph Hellwig } 664a785dbccSKeith Busch /* 665a785dbccSKeith Busch * Without the multipath code enabled, multiple controller per subsystems are 666a785dbccSKeith Busch * visible as devices and thus we cannot use the subsystem instance. 667a785dbccSKeith Busch */ 668a785dbccSKeith Busch static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 669a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags) 670a785dbccSKeith Busch { 671a785dbccSKeith Busch sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 672a785dbccSKeith Busch } 673a785dbccSKeith Busch 674764e9332SJohn Meneghini static inline bool nvme_failover_req(struct request *req) 67532acab31SChristoph Hellwig { 676764e9332SJohn Meneghini return false; 67732acab31SChristoph Hellwig } 67832acab31SChristoph Hellwig static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 67932acab31SChristoph Hellwig { 68032acab31SChristoph Hellwig } 68132acab31SChristoph Hellwig static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 68232acab31SChristoph Hellwig struct nvme_ns_head *head) 68332acab31SChristoph Hellwig { 68432acab31SChristoph Hellwig return 0; 68532acab31SChristoph Hellwig } 6860d0b660fSChristoph Hellwig static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 6870d0b660fSChristoph Hellwig struct nvme_id_ns *id) 68832acab31SChristoph Hellwig { 68932acab31SChristoph Hellwig } 69032acab31SChristoph Hellwig static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 69132acab31SChristoph Hellwig { 69232acab31SChristoph Hellwig } 6930157ec8dSSagi Grimberg static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 6940157ec8dSSagi Grimberg { 6950157ec8dSSagi Grimberg return false; 6960157ec8dSSagi Grimberg } 6970157ec8dSSagi Grimberg static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 69832acab31SChristoph Hellwig { 69932acab31SChristoph Hellwig } 700479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 701479a322fSSagi Grimberg { 702479a322fSSagi Grimberg } 70335fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 70435fe0d12SHannes Reinecke blk_status_t status) 70535fe0d12SHannes Reinecke { 70635fe0d12SHannes Reinecke } 7070d0b660fSChristoph Hellwig static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 7080d0b660fSChristoph Hellwig struct nvme_id_ctrl *id) 7090d0b660fSChristoph Hellwig { 71014a1336eSChristoph Hellwig if (ctrl->subsys->cmic & (1 << 3)) 71114a1336eSChristoph Hellwig dev_warn(ctrl->device, 71214a1336eSChristoph Hellwig "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 7130d0b660fSChristoph Hellwig return 0; 7140d0b660fSChristoph Hellwig } 7150d0b660fSChristoph Hellwig static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 7160d0b660fSChristoph Hellwig { 7170d0b660fSChristoph Hellwig } 7180d0b660fSChristoph Hellwig static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 7190d0b660fSChristoph Hellwig { 7200d0b660fSChristoph Hellwig } 721b9156daeSSagi Grimberg static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 722b9156daeSSagi Grimberg { 723b9156daeSSagi Grimberg } 724b9156daeSSagi Grimberg static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 725b9156daeSSagi Grimberg { 726b9156daeSSagi Grimberg } 727b9156daeSSagi Grimberg static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 728b9156daeSSagi Grimberg { 729b9156daeSSagi Grimberg } 73032acab31SChristoph Hellwig #endif /* CONFIG_NVME_MULTIPATH */ 73132acab31SChristoph Hellwig 732240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 733240e6ee2SKeith Busch int nvme_update_zone_info(struct gendisk *disk, struct nvme_ns *ns, 734240e6ee2SKeith Busch unsigned lbaf); 735240e6ee2SKeith Busch 736240e6ee2SKeith Busch int nvme_report_zones(struct gendisk *disk, sector_t sector, 737240e6ee2SKeith Busch unsigned int nr_zones, report_zones_cb cb, void *data); 738240e6ee2SKeith Busch 739240e6ee2SKeith Busch blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 740240e6ee2SKeith Busch struct nvme_command *cmnd, 741240e6ee2SKeith Busch enum nvme_zone_mgmt_action action); 742240e6ee2SKeith Busch #else 743240e6ee2SKeith Busch #define nvme_report_zones NULL 744240e6ee2SKeith Busch 745240e6ee2SKeith Busch static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 746240e6ee2SKeith Busch struct request *req, struct nvme_command *cmnd, 747240e6ee2SKeith Busch enum nvme_zone_mgmt_action action) 748240e6ee2SKeith Busch { 749240e6ee2SKeith Busch return BLK_STS_NOTSUPP; 750240e6ee2SKeith Busch } 751240e6ee2SKeith Busch 752240e6ee2SKeith Busch static inline int nvme_update_zone_info(struct gendisk *disk, 753240e6ee2SKeith Busch struct nvme_ns *ns, 754240e6ee2SKeith Busch unsigned lbaf) 755240e6ee2SKeith Busch { 756240e6ee2SKeith Busch dev_warn(ns->ctrl->device, 757240e6ee2SKeith Busch "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 758240e6ee2SKeith Busch return -EPROTONOSUPPORT; 759240e6ee2SKeith Busch } 760240e6ee2SKeith Busch #endif 761240e6ee2SKeith Busch 762c4699e70SKeith Busch #ifdef CONFIG_NVM 7633dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 764b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 76533b14f67SHannes Reinecke extern const struct attribute_group nvme_nvm_attr_group; 76684d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 767c4699e70SKeith Busch #else 768b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 7693dc87dd0SMatias Bjørling int node) 770c4699e70SKeith Busch { 771c4699e70SKeith Busch return 0; 772c4699e70SKeith Busch } 773c4699e70SKeith Busch 774b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 77584d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 77684d4add7SMatias Bjørling unsigned long arg) 77784d4add7SMatias Bjørling { 77884d4add7SMatias Bjørling return -ENOTTY; 77984d4add7SMatias Bjørling } 7803dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 7813dc87dd0SMatias Bjørling 78240267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 78340267efdSSimon A. F. Lund { 78440267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 78540267efdSSimon A. F. Lund } 786ca064085SMatias Bjørling 787400b6a7bSGuenter Roeck #ifdef CONFIG_NVME_HWMON 788400b6a7bSGuenter Roeck void nvme_hwmon_init(struct nvme_ctrl *ctrl); 789400b6a7bSGuenter Roeck #else 790400b6a7bSGuenter Roeck static inline void nvme_hwmon_init(struct nvme_ctrl *ctrl) { } 791400b6a7bSGuenter Roeck #endif 792400b6a7bSGuenter Roeck 793*df21b6b1SLogan Gunthorpe u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 794*df21b6b1SLogan Gunthorpe u8 opcode); 795*df21b6b1SLogan Gunthorpe 79657dacad5SJay Sternberg #endif /* _NVME_H */ 797