1bc50ad75SChristoph Hellwig /* SPDX-License-Identifier: GPL-2.0 */ 257dacad5SJay Sternberg /* 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg */ 557dacad5SJay Sternberg 657dacad5SJay Sternberg #ifndef _NVME_H 757dacad5SJay Sternberg #define _NVME_H 857dacad5SJay Sternberg 957dacad5SJay Sternberg #include <linux/nvme.h> 10a6a5149bSChristoph Hellwig #include <linux/cdev.h> 1157dacad5SJay Sternberg #include <linux/pci.h> 1257dacad5SJay Sternberg #include <linux/kref.h> 1357dacad5SJay Sternberg #include <linux/blk-mq.h> 14b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 15a98e58e5SScott Bauer #include <linux/sed-opal.h> 16b9e03857SThomas Tai #include <linux/fault-inject.h> 17978628ecSJohannes Thumshirn #include <linux/rcupdate.h> 1857dacad5SJay Sternberg 1935fe0d12SHannes Reinecke #include <trace/events/block.h> 2035fe0d12SHannes Reinecke 218ae4e447SMarc Olson extern unsigned int nvme_io_timeout; 2257dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2357dacad5SJay Sternberg 248ae4e447SMarc Olson extern unsigned int admin_timeout; 2521d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 2621d34711SChristoph Hellwig 27038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 28038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 29038bd4cbSSagi Grimberg 309a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 31b227c59bSRoy Shterman extern struct workqueue_struct *nvme_reset_wq; 32b227c59bSRoy Shterman extern struct workqueue_struct *nvme_delete_wq; 339a6327d2SSagi Grimberg 34ca064085SMatias Bjørling enum { 35ca064085SMatias Bjørling NVME_NS_LBA = 0, 36ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 37ca064085SMatias Bjørling }; 38ca064085SMatias Bjørling 3957dacad5SJay Sternberg /* 40106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 41106198edSChristoph Hellwig * the standard. 4257dacad5SJay Sternberg */ 43106198edSChristoph Hellwig enum nvme_quirks { 44106198edSChristoph Hellwig /* 45106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 46106198edSChristoph Hellwig * specific Identify field. 47106198edSChristoph Hellwig */ 48106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 49540c801cSKeith Busch 50540c801cSKeith Busch /* 51540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 52540c801cSKeith Busch * correctly. 53540c801cSKeith Busch */ 54540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 5508095e70SKeith Busch 5608095e70SKeith Busch /* 57e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 58e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 5908095e70SKeith Busch */ 60e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 6154adc010SGuilherme G. Piccoli 6254adc010SGuilherme G. Piccoli /* 6354adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 6454adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 6554adc010SGuilherme G. Piccoli */ 6654adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 67c5552fdeSAndy Lutomirski 68c5552fdeSAndy Lutomirski /* 69c5552fdeSAndy Lutomirski * APST should not be used. 70c5552fdeSAndy Lutomirski */ 71c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 72ff5350a8SAndy Lutomirski 73ff5350a8SAndy Lutomirski /* 74ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 75ff5350a8SAndy Lutomirski */ 76ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 77608cc4b1SChristoph Hellwig 78608cc4b1SChristoph Hellwig /* 79608cc4b1SChristoph Hellwig * Supports the LighNVM command set if indicated in vs[1]. 80608cc4b1SChristoph Hellwig */ 81608cc4b1SChristoph Hellwig NVME_QUIRK_LIGHTNVM = (1 << 6), 829abd68efSJens Axboe 839abd68efSJens Axboe /* 849abd68efSJens Axboe * Set MEDIUM priority on SQ creation 859abd68efSJens Axboe */ 869abd68efSJens Axboe NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 876299358dSJames Dingwall 886299358dSJames Dingwall /* 896299358dSJames Dingwall * Ignore device provided subnqn. 906299358dSJames Dingwall */ 916299358dSJames Dingwall NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 927b210e4eSChristoph Hellwig 937b210e4eSChristoph Hellwig /* 947b210e4eSChristoph Hellwig * Broken Write Zeroes. 957b210e4eSChristoph Hellwig */ 967b210e4eSChristoph Hellwig NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 9766341331SBenjamin Herrenschmidt 9866341331SBenjamin Herrenschmidt /* 9966341331SBenjamin Herrenschmidt * Use only one interrupt vector for all queues 10066341331SBenjamin Herrenschmidt */ 10166341331SBenjamin Herrenschmidt NVME_QUIRK_SINGLE_VECTOR = (1 << 10), 10266341331SBenjamin Herrenschmidt 10366341331SBenjamin Herrenschmidt /* 10466341331SBenjamin Herrenschmidt * Use non-standard 128 bytes SQEs. 10566341331SBenjamin Herrenschmidt */ 10666341331SBenjamin Herrenschmidt NVME_QUIRK_128_BYTES_SQES = (1 << 11), 107*d38e9f04SBenjamin Herrenschmidt 108*d38e9f04SBenjamin Herrenschmidt /* 109*d38e9f04SBenjamin Herrenschmidt * Prevent tag overlap between queues 110*d38e9f04SBenjamin Herrenschmidt */ 111*d38e9f04SBenjamin Herrenschmidt NVME_QUIRK_SHARED_TAGS = (1 << 12), 112106198edSChristoph Hellwig }; 113106198edSChristoph Hellwig 114d49187e9SChristoph Hellwig /* 115d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 116d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 117d49187e9SChristoph Hellwig */ 118d49187e9SChristoph Hellwig struct nvme_request { 119d49187e9SChristoph Hellwig struct nvme_command *cmd; 120d49187e9SChristoph Hellwig union nvme_result result; 12144e44b29SChristoph Hellwig u8 retries; 12227fa9bc5SChristoph Hellwig u8 flags; 12327fa9bc5SChristoph Hellwig u16 status; 12459e29ce6SSagi Grimberg struct nvme_ctrl *ctrl; 12527fa9bc5SChristoph Hellwig }; 12627fa9bc5SChristoph Hellwig 12732acab31SChristoph Hellwig /* 12832acab31SChristoph Hellwig * Mark a bio as coming in through the mpath node. 12932acab31SChristoph Hellwig */ 13032acab31SChristoph Hellwig #define REQ_NVME_MPATH REQ_DRV 13132acab31SChristoph Hellwig 13227fa9bc5SChristoph Hellwig enum { 13327fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 134bb06ec31SJames Smart NVME_REQ_USERCMD = (1 << 1), 135d49187e9SChristoph Hellwig }; 136d49187e9SChristoph Hellwig 137d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 138d49187e9SChristoph Hellwig { 139d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 140d49187e9SChristoph Hellwig } 141d49187e9SChristoph Hellwig 1425d87eb94SKeith Busch static inline u16 nvme_req_qid(struct request *req) 1435d87eb94SKeith Busch { 1445d87eb94SKeith Busch if (!req->rq_disk) 1455d87eb94SKeith Busch return 0; 1465d87eb94SKeith Busch return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 1475d87eb94SKeith Busch } 1485d87eb94SKeith Busch 14954adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 15054adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 15154adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 15254adc010SGuilherme G. Piccoli * found empirically. 15354adc010SGuilherme G. Piccoli */ 1548c97eeccSJeff Lien #define NVME_QUIRK_DELAY_AMOUNT 2300 15554adc010SGuilherme G. Piccoli 156bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 157bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 158bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 1592b1b7e78SJianchao Wang NVME_CTRL_ADMIN_ONLY, /* Only admin queue live */ 160bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 161ad6a0a52SMax Gurtovoy NVME_CTRL_CONNECTING, 162bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 1630ff9d4e1SKeith Busch NVME_CTRL_DEAD, 164bb8d261eSChristoph Hellwig }; 165bb8d261eSChristoph Hellwig 166a3646451SAkinobu Mita struct nvme_fault_inject { 167a3646451SAkinobu Mita #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 168a3646451SAkinobu Mita struct fault_attr attr; 169a3646451SAkinobu Mita struct dentry *parent; 170a3646451SAkinobu Mita bool dont_retry; /* DNR, do not retry */ 171a3646451SAkinobu Mita u16 status; /* status code */ 172a3646451SAkinobu Mita #endif 173a3646451SAkinobu Mita }; 174a3646451SAkinobu Mita 1751c63dc66SChristoph Hellwig struct nvme_ctrl { 1766e3ca03eSSagi Grimberg bool comp_seen; 177bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 178bd4da3abSAndy Lutomirski bool identified; 179bb8d261eSChristoph Hellwig spinlock_t lock; 180e7ad43c3SKeith Busch struct mutex scan_lock; 1811c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 18257dacad5SJay Sternberg struct request_queue *admin_q; 18307bfcd09SChristoph Hellwig struct request_queue *connect_q; 18457dacad5SJay Sternberg struct device *dev; 18557dacad5SJay Sternberg int instance; 186103e515eSHannes Reinecke int numa_node; 1875bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 18834b6c231SSagi Grimberg struct blk_mq_tag_set *admin_tagset; 1895bae7f73SChristoph Hellwig struct list_head namespaces; 190765cc031SJianchao Wang struct rw_semaphore namespaces_rwsem; 191d22524a4SChristoph Hellwig struct device ctrl_device; 1925bae7f73SChristoph Hellwig struct device *device; /* char device */ 193a6a5149bSChristoph Hellwig struct cdev cdev; 194d86c4d8eSChristoph Hellwig struct work_struct reset_work; 195c5017e85SChristoph Hellwig struct work_struct delete_work; 1961c63dc66SChristoph Hellwig 197ab9e00ccSChristoph Hellwig struct nvme_subsystem *subsys; 198ab9e00ccSChristoph Hellwig struct list_head subsys_entry; 199ab9e00ccSChristoph Hellwig 2004f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 201a98e58e5SScott Bauer 20257dacad5SJay Sternberg char name[12]; 20376e3914aSChristoph Hellwig u16 cntlid; 2045fd4ce1bSChristoph Hellwig 2055fd4ce1bSChristoph Hellwig u32 ctrl_config; 206b6dccf7fSArnav Dawn u16 mtfa; 207d858e5f0SSagi Grimberg u32 queue_count; 2085fd4ce1bSChristoph Hellwig 20920d0dfe6SSagi Grimberg u64 cap; 2105fd4ce1bSChristoph Hellwig u32 page_size; 21157dacad5SJay Sternberg u32 max_hw_sectors; 212943e942eSJens Axboe u32 max_segments; 21349cd84b6SKeith Busch u16 crdt[3]; 21457dacad5SJay Sternberg u16 oncs; 2158a9ae523SScott Bauer u16 oacs; 216f5d11840SJens Axboe u16 nssa; 217f5d11840SJens Axboe u16 nr_streams; 2180d0b660fSChristoph Hellwig u32 max_namespaces; 2196bf25d16SChristoph Hellwig atomic_t abort_limit; 22057dacad5SJay Sternberg u8 vwc; 221f3ca80fcSChristoph Hellwig u32 vs; 22207bfcd09SChristoph Hellwig u32 sgls; 223038bd4cbSSagi Grimberg u16 kas; 224c5552fdeSAndy Lutomirski u8 npss; 225c5552fdeSAndy Lutomirski u8 apsta; 226c0561f82SHannes Reinecke u32 oaes; 227e3d7874dSKeith Busch u32 aen_result; 2283e53ba38SSagi Grimberg u32 ctratt; 22907fbd32aSMartin K. Petersen unsigned int shutdown_timeout; 230038bd4cbSSagi Grimberg unsigned int kato; 231f3ca80fcSChristoph Hellwig bool subsystem; 232106198edSChristoph Hellwig unsigned long quirks; 233c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 23484fef62dSKeith Busch struct nvme_effects_log *effects; 2355955be21SChristoph Hellwig struct work_struct scan_work; 236f866fc42SChristoph Hellwig struct work_struct async_event_work; 237038bd4cbSSagi Grimberg struct delayed_work ka_work; 2380a34e466SRoland Dreier struct nvme_command ka_cmd; 239b6dccf7fSArnav Dawn struct work_struct fw_act_work; 24030d90964SChristoph Hellwig unsigned long events; 24107bfcd09SChristoph Hellwig 2420d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 2430d0b660fSChristoph Hellwig /* asymmetric namespace access: */ 2440d0b660fSChristoph Hellwig u8 anacap; 2450d0b660fSChristoph Hellwig u8 anatt; 2460d0b660fSChristoph Hellwig u32 anagrpmax; 2470d0b660fSChristoph Hellwig u32 nanagrpid; 2480d0b660fSChristoph Hellwig struct mutex ana_lock; 2490d0b660fSChristoph Hellwig struct nvme_ana_rsp_hdr *ana_log_buf; 2500d0b660fSChristoph Hellwig size_t ana_log_size; 2510d0b660fSChristoph Hellwig struct timer_list anatt_timer; 2520d0b660fSChristoph Hellwig struct work_struct ana_work; 2530d0b660fSChristoph Hellwig #endif 2540d0b660fSChristoph Hellwig 255c5552fdeSAndy Lutomirski /* Power saving configuration */ 256c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 25776a5af84SKai-Heng Feng bool apst_enabled; 258c5552fdeSAndy Lutomirski 259044a9df1SChristoph Hellwig /* PCIe only: */ 260fe6d53c9SChristoph Hellwig u32 hmpre; 261fe6d53c9SChristoph Hellwig u32 hmmin; 262044a9df1SChristoph Hellwig u32 hmminds; 263044a9df1SChristoph Hellwig u16 hmmaxd; 264fe6d53c9SChristoph Hellwig 26507bfcd09SChristoph Hellwig /* Fabrics only */ 26607bfcd09SChristoph Hellwig u16 sqsize; 26707bfcd09SChristoph Hellwig u32 ioccsz; 26807bfcd09SChristoph Hellwig u32 iorcsz; 26907bfcd09SChristoph Hellwig u16 icdoff; 27007bfcd09SChristoph Hellwig u16 maxcmd; 271fdf9dfa8SSagi Grimberg int nr_reconnects; 27207bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 273cb5b7262SJens Axboe 274cb5b7262SJens Axboe struct page *discard_page; 275cb5b7262SJens Axboe unsigned long discard_page_busy; 276f79d5fdaSAkinobu Mita 277f79d5fdaSAkinobu Mita struct nvme_fault_inject fault_inject; 27857dacad5SJay Sternberg }; 27957dacad5SJay Sternberg 28075c10e73SHannes Reinecke enum nvme_iopolicy { 28175c10e73SHannes Reinecke NVME_IOPOLICY_NUMA, 28275c10e73SHannes Reinecke NVME_IOPOLICY_RR, 28375c10e73SHannes Reinecke }; 28475c10e73SHannes Reinecke 285ab9e00ccSChristoph Hellwig struct nvme_subsystem { 286ab9e00ccSChristoph Hellwig int instance; 287ab9e00ccSChristoph Hellwig struct device dev; 288ab9e00ccSChristoph Hellwig /* 289ab9e00ccSChristoph Hellwig * Because we unregister the device on the last put we need 290ab9e00ccSChristoph Hellwig * a separate refcount. 291ab9e00ccSChristoph Hellwig */ 292ab9e00ccSChristoph Hellwig struct kref ref; 293ab9e00ccSChristoph Hellwig struct list_head entry; 294ab9e00ccSChristoph Hellwig struct mutex lock; 295ab9e00ccSChristoph Hellwig struct list_head ctrls; 296ed754e5dSChristoph Hellwig struct list_head nsheads; 297ab9e00ccSChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 298ab9e00ccSChristoph Hellwig char serial[20]; 299ab9e00ccSChristoph Hellwig char model[40]; 300ab9e00ccSChristoph Hellwig char firmware_rev[8]; 301ab9e00ccSChristoph Hellwig u8 cmic; 302ab9e00ccSChristoph Hellwig u16 vendor_id; 30381adb863SBart Van Assche u16 awupf; /* 0's based awupf value. */ 304ed754e5dSChristoph Hellwig struct ida ns_ida; 30575c10e73SHannes Reinecke #ifdef CONFIG_NVME_MULTIPATH 30675c10e73SHannes Reinecke enum nvme_iopolicy iopolicy; 30775c10e73SHannes Reinecke #endif 308ab9e00ccSChristoph Hellwig }; 309ab9e00ccSChristoph Hellwig 310002fab04SChristoph Hellwig /* 311002fab04SChristoph Hellwig * Container structure for uniqueue namespace identifiers. 312002fab04SChristoph Hellwig */ 313002fab04SChristoph Hellwig struct nvme_ns_ids { 314002fab04SChristoph Hellwig u8 eui64[8]; 315002fab04SChristoph Hellwig u8 nguid[16]; 316002fab04SChristoph Hellwig uuid_t uuid; 317002fab04SChristoph Hellwig }; 318002fab04SChristoph Hellwig 319ed754e5dSChristoph Hellwig /* 320ed754e5dSChristoph Hellwig * Anchor structure for namespaces. There is one for each namespace in a 321ed754e5dSChristoph Hellwig * NVMe subsystem that any of our controllers can see, and the namespace 322ed754e5dSChristoph Hellwig * structure for each controller is chained of it. For private namespaces 323ed754e5dSChristoph Hellwig * there is a 1:1 relation to our namespace structures, that is ->list 324ed754e5dSChristoph Hellwig * only ever has a single entry for private namespaces. 325ed754e5dSChristoph Hellwig */ 326ed754e5dSChristoph Hellwig struct nvme_ns_head { 327ed754e5dSChristoph Hellwig struct list_head list; 328ed754e5dSChristoph Hellwig struct srcu_struct srcu; 329ed754e5dSChristoph Hellwig struct nvme_subsystem *subsys; 330ed754e5dSChristoph Hellwig unsigned ns_id; 331ed754e5dSChristoph Hellwig struct nvme_ns_ids ids; 332ed754e5dSChristoph Hellwig struct list_head entry; 333ed754e5dSChristoph Hellwig struct kref ref; 334ed754e5dSChristoph Hellwig int instance; 335f3334447SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 336f3334447SChristoph Hellwig struct gendisk *disk; 337f3334447SChristoph Hellwig struct bio_list requeue_list; 338f3334447SChristoph Hellwig spinlock_t requeue_lock; 339f3334447SChristoph Hellwig struct work_struct requeue_work; 340f3334447SChristoph Hellwig struct mutex lock; 341f3334447SChristoph Hellwig struct nvme_ns __rcu *current_path[]; 342f3334447SChristoph Hellwig #endif 343ed754e5dSChristoph Hellwig }; 344ed754e5dSChristoph Hellwig 34557dacad5SJay Sternberg struct nvme_ns { 34657dacad5SJay Sternberg struct list_head list; 34757dacad5SJay Sternberg 3481c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 34957dacad5SJay Sternberg struct request_queue *queue; 35057dacad5SJay Sternberg struct gendisk *disk; 3510d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 3520d0b660fSChristoph Hellwig enum nvme_ana_state ana_state; 3530d0b660fSChristoph Hellwig u32 ana_grpid; 3540d0b660fSChristoph Hellwig #endif 355ed754e5dSChristoph Hellwig struct list_head siblings; 356b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 35757dacad5SJay Sternberg struct kref kref; 358ed754e5dSChristoph Hellwig struct nvme_ns_head *head; 35957dacad5SJay Sternberg 36057dacad5SJay Sternberg int lba_shift; 36157dacad5SJay Sternberg u16 ms; 362f5d11840SJens Axboe u16 sgs; 363f5d11840SJens Axboe u32 sws; 36457dacad5SJay Sternberg bool ext; 36557dacad5SJay Sternberg u8 pi_type; 366646017a6SKeith Busch unsigned long flags; 367646017a6SKeith Busch #define NVME_NS_REMOVING 0 36869d9a99cSKeith Busch #define NVME_NS_DEAD 1 3690d0b660fSChristoph Hellwig #define NVME_NS_ANA_PENDING 2 37057eeaf8eSChristoph Hellwig u16 noiob; 371b9e03857SThomas Tai 372b9e03857SThomas Tai struct nvme_fault_inject fault_inject; 373b9e03857SThomas Tai 37457dacad5SJay Sternberg }; 37557dacad5SJay Sternberg 3761c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 3771a353d85SMing Lin const char *name; 378e439bb12SSagi Grimberg struct module *module; 379d3d5b87dSChristoph Hellwig unsigned int flags; 380d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 381c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 382e0596ab2SLogan Gunthorpe #define NVME_F_PCI_P2PDMA (1 << 2) 3831c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 3845fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 3857fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 3861673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 387ad22c355SKeith Busch void (*submit_async_event)(struct nvme_ctrl *ctrl); 388c5017e85SChristoph Hellwig void (*delete_ctrl)(struct nvme_ctrl *ctrl); 3891a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 39057dacad5SJay Sternberg }; 39157dacad5SJay Sternberg 392b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 393a3646451SAkinobu Mita void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 394a3646451SAkinobu Mita const char *dev_name); 395a3646451SAkinobu Mita void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 396b9e03857SThomas Tai void nvme_should_fail(struct request *req); 397b9e03857SThomas Tai #else 398a3646451SAkinobu Mita static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 399a3646451SAkinobu Mita const char *dev_name) 400a3646451SAkinobu Mita { 401a3646451SAkinobu Mita } 402a3646451SAkinobu Mita static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 403a3646451SAkinobu Mita { 404a3646451SAkinobu Mita } 405b9e03857SThomas Tai static inline void nvme_should_fail(struct request *req) {} 406b9e03857SThomas Tai #endif 407b9e03857SThomas Tai 408f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 409f3ca80fcSChristoph Hellwig { 410f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 411f3ca80fcSChristoph Hellwig return -ENOTTY; 412f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 413f3ca80fcSChristoph Hellwig } 414f3ca80fcSChristoph Hellwig 41557dacad5SJay Sternberg static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 41657dacad5SJay Sternberg { 41757dacad5SJay Sternberg return (sector >> (ns->lba_shift - 9)); 41857dacad5SJay Sternberg } 41957dacad5SJay Sternberg 42027fa9bc5SChristoph Hellwig static inline void nvme_end_request(struct request *req, __le16 status, 42127fa9bc5SChristoph Hellwig union nvme_result result) 42215a190f7SChristoph Hellwig { 42327fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 42427fa9bc5SChristoph Hellwig 42527fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 42627fa9bc5SChristoph Hellwig rq->result = result; 427b9e03857SThomas Tai /* inject error when permitted by fault injection framework */ 428b9e03857SThomas Tai nvme_should_fail(req); 42908e0029aSChristoph Hellwig blk_mq_complete_request(req); 43015a190f7SChristoph Hellwig } 43115a190f7SChristoph Hellwig 432d22524a4SChristoph Hellwig static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 433d22524a4SChristoph Hellwig { 434d22524a4SChristoph Hellwig get_device(ctrl->device); 435d22524a4SChristoph Hellwig } 436d22524a4SChristoph Hellwig 437d22524a4SChristoph Hellwig static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 438d22524a4SChristoph Hellwig { 439d22524a4SChristoph Hellwig put_device(ctrl->device); 440d22524a4SChristoph Hellwig } 441d22524a4SChristoph Hellwig 44277f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 4437baa8572SJens Axboe bool nvme_cancel_request(struct request *req, void *data, bool reserved); 444bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 445bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 446b5b05048SSagi Grimberg int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 447c0f2f45bSSagi Grimberg int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 4485fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 449f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 450f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 45153029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 452d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 453d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 4541673f1f0SChristoph Hellwig void nvme_put_ctrl(struct nvme_ctrl *ctrl); 4557fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 4565bae7f73SChristoph Hellwig 4575bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 4581673f1f0SChristoph Hellwig 4594f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 4604f1244c8SChristoph Hellwig bool send); 461a98e58e5SScott Bauer 4627bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 463287a63ebSChristoph Hellwig volatile union nvme_result *res); 464f866fc42SChristoph Hellwig 46525646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 46625646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 46769d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 468d6135c3aSKeith Busch void nvme_sync_queues(struct nvme_ctrl *ctrl); 469302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 470302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 471302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 472302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 473363c9aacSSagi Grimberg 474eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 4754160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 4769a95e4efSBart Van Assche struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 477f7f1fc36SMax Gurtovoy void nvme_cleanup_cmd(struct request *req); 478fc17b653SChristoph Hellwig blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 4798093f7caSMing Lin struct nvme_command *cmd); 48057dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 48157dacad5SJay Sternberg void *buf, unsigned bufflen); 48257dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 483d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 4849a95e4efSBart Van Assche unsigned timeout, int qid, int at_head, 4856287b51cSSagi Grimberg blk_mq_req_flags_t flags, bool poll); 4861a87ee65SKeith Busch int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 4871a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 4881a87ee65SKeith Busch u32 *result); 4891a87ee65SKeith Busch int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 4901a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 4911a87ee65SKeith Busch u32 *result); 4929a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 493038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 494d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 49579c48ccfSSagi Grimberg int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 496c5017e85SChristoph Hellwig int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 49757dacad5SJay Sternberg 4980e98719bSChristoph Hellwig int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 4990e98719bSChristoph Hellwig void *log, size_t size, u64 offset); 500d558fb51SMatias Bjørling 50133b14f67SHannes Reinecke extern const struct attribute_group *nvme_ns_id_attr_groups[]; 50232acab31SChristoph Hellwig extern const struct block_device_operations nvme_ns_head_ops; 50332acab31SChristoph Hellwig 50432acab31SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 50566b20ac0SMarta Rybczynska static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 50666b20ac0SMarta Rybczynska { 50766b20ac0SMarta Rybczynska return ctrl->ana_log_buf != NULL; 50866b20ac0SMarta Rybczynska } 50966b20ac0SMarta Rybczynska 510a785dbccSKeith Busch void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 511a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags); 51232acab31SChristoph Hellwig void nvme_failover_req(struct request *req); 51332acab31SChristoph Hellwig void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 51432acab31SChristoph Hellwig int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 5150d0b660fSChristoph Hellwig void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 51632acab31SChristoph Hellwig void nvme_mpath_remove_disk(struct nvme_ns_head *head); 5170d0b660fSChristoph Hellwig int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 5180d0b660fSChristoph Hellwig void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 5190d0b660fSChristoph Hellwig void nvme_mpath_stop(struct nvme_ctrl *ctrl); 520f3334447SChristoph Hellwig void nvme_mpath_clear_current_path(struct nvme_ns *ns); 52132acab31SChristoph Hellwig struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 522479a322fSSagi Grimberg 523479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 524479a322fSSagi Grimberg { 525479a322fSSagi Grimberg struct nvme_ns_head *head = ns->head; 526479a322fSSagi Grimberg 527479a322fSSagi Grimberg if (head->disk && list_empty(&head->list)) 528479a322fSSagi Grimberg kblockd_schedule_work(&head->requeue_work); 529479a322fSSagi Grimberg } 530479a322fSSagi Grimberg 53135fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 53235fe0d12SHannes Reinecke blk_status_t status) 53335fe0d12SHannes Reinecke { 53435fe0d12SHannes Reinecke struct nvme_ns *ns = req->q->queuedata; 53535fe0d12SHannes Reinecke 53635fe0d12SHannes Reinecke if (req->cmd_flags & REQ_NVME_MPATH) 53735fe0d12SHannes Reinecke trace_block_bio_complete(ns->head->disk->queue, 53835fe0d12SHannes Reinecke req->bio, status); 53935fe0d12SHannes Reinecke } 54035fe0d12SHannes Reinecke 5410d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_grpid; 5420d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_state; 54375c10e73SHannes Reinecke extern struct device_attribute subsys_attr_iopolicy; 5440d0b660fSChristoph Hellwig 54532acab31SChristoph Hellwig #else 5460d0b660fSChristoph Hellwig static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 5470d0b660fSChristoph Hellwig { 5480d0b660fSChristoph Hellwig return false; 5490d0b660fSChristoph Hellwig } 550a785dbccSKeith Busch /* 551a785dbccSKeith Busch * Without the multipath code enabled, multiple controller per subsystems are 552a785dbccSKeith Busch * visible as devices and thus we cannot use the subsystem instance. 553a785dbccSKeith Busch */ 554a785dbccSKeith Busch static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 555a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags) 556a785dbccSKeith Busch { 557a785dbccSKeith Busch sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 558a785dbccSKeith Busch } 559a785dbccSKeith Busch 56032acab31SChristoph Hellwig static inline void nvme_failover_req(struct request *req) 56132acab31SChristoph Hellwig { 56232acab31SChristoph Hellwig } 56332acab31SChristoph Hellwig static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 56432acab31SChristoph Hellwig { 56532acab31SChristoph Hellwig } 56632acab31SChristoph Hellwig static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 56732acab31SChristoph Hellwig struct nvme_ns_head *head) 56832acab31SChristoph Hellwig { 56932acab31SChristoph Hellwig return 0; 57032acab31SChristoph Hellwig } 5710d0b660fSChristoph Hellwig static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 5720d0b660fSChristoph Hellwig struct nvme_id_ns *id) 57332acab31SChristoph Hellwig { 57432acab31SChristoph Hellwig } 57532acab31SChristoph Hellwig static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 57632acab31SChristoph Hellwig { 57732acab31SChristoph Hellwig } 57832acab31SChristoph Hellwig static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns) 57932acab31SChristoph Hellwig { 58032acab31SChristoph Hellwig } 581479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 582479a322fSSagi Grimberg { 583479a322fSSagi Grimberg } 58435fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 58535fe0d12SHannes Reinecke blk_status_t status) 58635fe0d12SHannes Reinecke { 58735fe0d12SHannes Reinecke } 5880d0b660fSChristoph Hellwig static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 5890d0b660fSChristoph Hellwig struct nvme_id_ctrl *id) 5900d0b660fSChristoph Hellwig { 59114a1336eSChristoph Hellwig if (ctrl->subsys->cmic & (1 << 3)) 59214a1336eSChristoph Hellwig dev_warn(ctrl->device, 59314a1336eSChristoph Hellwig "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 5940d0b660fSChristoph Hellwig return 0; 5950d0b660fSChristoph Hellwig } 5960d0b660fSChristoph Hellwig static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 5970d0b660fSChristoph Hellwig { 5980d0b660fSChristoph Hellwig } 5990d0b660fSChristoph Hellwig static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 6000d0b660fSChristoph Hellwig { 6010d0b660fSChristoph Hellwig } 60232acab31SChristoph Hellwig #endif /* CONFIG_NVME_MULTIPATH */ 60332acab31SChristoph Hellwig 604c4699e70SKeith Busch #ifdef CONFIG_NVM 6053dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 606b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 60733b14f67SHannes Reinecke extern const struct attribute_group nvme_nvm_attr_group; 60884d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 609c4699e70SKeith Busch #else 610b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 6113dc87dd0SMatias Bjørling int node) 612c4699e70SKeith Busch { 613c4699e70SKeith Busch return 0; 614c4699e70SKeith Busch } 615c4699e70SKeith Busch 616b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 61784d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 61884d4add7SMatias Bjørling unsigned long arg) 61984d4add7SMatias Bjørling { 62084d4add7SMatias Bjørling return -ENOTTY; 62184d4add7SMatias Bjørling } 6223dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 6233dc87dd0SMatias Bjørling 62440267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 62540267efdSSimon A. F. Lund { 62640267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 62740267efdSSimon A. F. Lund } 628ca064085SMatias Bjørling 62957dacad5SJay Sternberg #endif /* _NVME_H */ 630