1bc50ad75SChristoph Hellwig /* SPDX-License-Identifier: GPL-2.0 */ 257dacad5SJay Sternberg /* 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg */ 557dacad5SJay Sternberg 657dacad5SJay Sternberg #ifndef _NVME_H 757dacad5SJay Sternberg #define _NVME_H 857dacad5SJay Sternberg 957dacad5SJay Sternberg #include <linux/nvme.h> 10a6a5149bSChristoph Hellwig #include <linux/cdev.h> 1157dacad5SJay Sternberg #include <linux/pci.h> 1257dacad5SJay Sternberg #include <linux/kref.h> 1357dacad5SJay Sternberg #include <linux/blk-mq.h> 14b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 15a98e58e5SScott Bauer #include <linux/sed-opal.h> 16b9e03857SThomas Tai #include <linux/fault-inject.h> 17978628ecSJohannes Thumshirn #include <linux/rcupdate.h> 18c1ac9a4bSKeith Busch #include <linux/wait.h> 194d2ce688SJames Smart #include <linux/t10-pi.h> 2057dacad5SJay Sternberg 2135fe0d12SHannes Reinecke #include <trace/events/block.h> 2235fe0d12SHannes Reinecke 238ae4e447SMarc Olson extern unsigned int nvme_io_timeout; 2457dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2557dacad5SJay Sternberg 268ae4e447SMarc Olson extern unsigned int admin_timeout; 2721d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 2821d34711SChristoph Hellwig 29038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 30038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 31038bd4cbSSagi Grimberg 3238e18002SIsrael Rukshin #ifdef CONFIG_ARCH_NO_SG_CHAIN 3338e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 0 34ba7ca2aeSIsrael Rukshin #define NVME_INLINE_METADATA_SG_CNT 0 3538e18002SIsrael Rukshin #else 3638e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 2 37ba7ca2aeSIsrael Rukshin #define NVME_INLINE_METADATA_SG_CNT 1 3838e18002SIsrael Rukshin #endif 3938e18002SIsrael Rukshin 409a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 41b227c59bSRoy Shterman extern struct workqueue_struct *nvme_reset_wq; 42b227c59bSRoy Shterman extern struct workqueue_struct *nvme_delete_wq; 439a6327d2SSagi Grimberg 44ca064085SMatias Bjørling enum { 45ca064085SMatias Bjørling NVME_NS_LBA = 0, 46ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 47ca064085SMatias Bjørling }; 48ca064085SMatias Bjørling 4957dacad5SJay Sternberg /* 50106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 51106198edSChristoph Hellwig * the standard. 5257dacad5SJay Sternberg */ 53106198edSChristoph Hellwig enum nvme_quirks { 54106198edSChristoph Hellwig /* 55106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 56106198edSChristoph Hellwig * specific Identify field. 57106198edSChristoph Hellwig */ 58106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 59540c801cSKeith Busch 60540c801cSKeith Busch /* 61540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 62540c801cSKeith Busch * correctly. 63540c801cSKeith Busch */ 64540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 6508095e70SKeith Busch 6608095e70SKeith Busch /* 67e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 68e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 6908095e70SKeith Busch */ 70e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 7154adc010SGuilherme G. Piccoli 7254adc010SGuilherme G. Piccoli /* 7354adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 7454adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 7554adc010SGuilherme G. Piccoli */ 7654adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 77c5552fdeSAndy Lutomirski 78c5552fdeSAndy Lutomirski /* 79c5552fdeSAndy Lutomirski * APST should not be used. 80c5552fdeSAndy Lutomirski */ 81c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 82ff5350a8SAndy Lutomirski 83ff5350a8SAndy Lutomirski /* 84ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 85ff5350a8SAndy Lutomirski */ 86ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 87608cc4b1SChristoph Hellwig 88608cc4b1SChristoph Hellwig /* 89608cc4b1SChristoph Hellwig * Supports the LighNVM command set if indicated in vs[1]. 90608cc4b1SChristoph Hellwig */ 91608cc4b1SChristoph Hellwig NVME_QUIRK_LIGHTNVM = (1 << 6), 929abd68efSJens Axboe 939abd68efSJens Axboe /* 949abd68efSJens Axboe * Set MEDIUM priority on SQ creation 959abd68efSJens Axboe */ 969abd68efSJens Axboe NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 976299358dSJames Dingwall 986299358dSJames Dingwall /* 996299358dSJames Dingwall * Ignore device provided subnqn. 1006299358dSJames Dingwall */ 1016299358dSJames Dingwall NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 1027b210e4eSChristoph Hellwig 1037b210e4eSChristoph Hellwig /* 1047b210e4eSChristoph Hellwig * Broken Write Zeroes. 1057b210e4eSChristoph Hellwig */ 1067b210e4eSChristoph Hellwig NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 107cb32de1bSMario Limonciello 108cb32de1bSMario Limonciello /* 109cb32de1bSMario Limonciello * Force simple suspend/resume path. 110cb32de1bSMario Limonciello */ 111cb32de1bSMario Limonciello NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 1127ad67ca5SLinus Torvalds 1137ad67ca5SLinus Torvalds /* 11466341331SBenjamin Herrenschmidt * Use only one interrupt vector for all queues 11566341331SBenjamin Herrenschmidt */ 1167ad67ca5SLinus Torvalds NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 11766341331SBenjamin Herrenschmidt 11866341331SBenjamin Herrenschmidt /* 11966341331SBenjamin Herrenschmidt * Use non-standard 128 bytes SQEs. 12066341331SBenjamin Herrenschmidt */ 1217ad67ca5SLinus Torvalds NVME_QUIRK_128_BYTES_SQES = (1 << 12), 122d38e9f04SBenjamin Herrenschmidt 123d38e9f04SBenjamin Herrenschmidt /* 124d38e9f04SBenjamin Herrenschmidt * Prevent tag overlap between queues 125d38e9f04SBenjamin Herrenschmidt */ 1267ad67ca5SLinus Torvalds NVME_QUIRK_SHARED_TAGS = (1 << 13), 1276c6aa2f2SAkinobu Mita 1286c6aa2f2SAkinobu Mita /* 1296c6aa2f2SAkinobu Mita * Don't change the value of the temperature threshold feature 1306c6aa2f2SAkinobu Mita */ 1316c6aa2f2SAkinobu Mita NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 132106198edSChristoph Hellwig }; 133106198edSChristoph Hellwig 134d49187e9SChristoph Hellwig /* 135d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 136d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 137d49187e9SChristoph Hellwig */ 138d49187e9SChristoph Hellwig struct nvme_request { 139d49187e9SChristoph Hellwig struct nvme_command *cmd; 140d49187e9SChristoph Hellwig union nvme_result result; 14144e44b29SChristoph Hellwig u8 retries; 14227fa9bc5SChristoph Hellwig u8 flags; 14327fa9bc5SChristoph Hellwig u16 status; 14459e29ce6SSagi Grimberg struct nvme_ctrl *ctrl; 14527fa9bc5SChristoph Hellwig }; 14627fa9bc5SChristoph Hellwig 14732acab31SChristoph Hellwig /* 14832acab31SChristoph Hellwig * Mark a bio as coming in through the mpath node. 14932acab31SChristoph Hellwig */ 15032acab31SChristoph Hellwig #define REQ_NVME_MPATH REQ_DRV 15132acab31SChristoph Hellwig 15227fa9bc5SChristoph Hellwig enum { 15327fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 154bb06ec31SJames Smart NVME_REQ_USERCMD = (1 << 1), 155d49187e9SChristoph Hellwig }; 156d49187e9SChristoph Hellwig 157d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 158d49187e9SChristoph Hellwig { 159d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 160d49187e9SChristoph Hellwig } 161d49187e9SChristoph Hellwig 1625d87eb94SKeith Busch static inline u16 nvme_req_qid(struct request *req) 1635d87eb94SKeith Busch { 1645d87eb94SKeith Busch if (!req->rq_disk) 1655d87eb94SKeith Busch return 0; 1665d87eb94SKeith Busch return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 1675d87eb94SKeith Busch } 1685d87eb94SKeith Busch 16954adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 17054adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 17154adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 17254adc010SGuilherme G. Piccoli * found empirically. 17354adc010SGuilherme G. Piccoli */ 1748c97eeccSJeff Lien #define NVME_QUIRK_DELAY_AMOUNT 2300 17554adc010SGuilherme G. Piccoli 176bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 177bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 178bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 179bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 180ad6a0a52SMax Gurtovoy NVME_CTRL_CONNECTING, 181bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 1820ff9d4e1SKeith Busch NVME_CTRL_DEAD, 183bb8d261eSChristoph Hellwig }; 184bb8d261eSChristoph Hellwig 185a3646451SAkinobu Mita struct nvme_fault_inject { 186a3646451SAkinobu Mita #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 187a3646451SAkinobu Mita struct fault_attr attr; 188a3646451SAkinobu Mita struct dentry *parent; 189a3646451SAkinobu Mita bool dont_retry; /* DNR, do not retry */ 190a3646451SAkinobu Mita u16 status; /* status code */ 191a3646451SAkinobu Mita #endif 192a3646451SAkinobu Mita }; 193a3646451SAkinobu Mita 1941c63dc66SChristoph Hellwig struct nvme_ctrl { 1956e3ca03eSSagi Grimberg bool comp_seen; 196bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 197bd4da3abSAndy Lutomirski bool identified; 198bb8d261eSChristoph Hellwig spinlock_t lock; 199e7ad43c3SKeith Busch struct mutex scan_lock; 2001c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 20157dacad5SJay Sternberg struct request_queue *admin_q; 20207bfcd09SChristoph Hellwig struct request_queue *connect_q; 203e7832cb4SSagi Grimberg struct request_queue *fabrics_q; 20457dacad5SJay Sternberg struct device *dev; 20557dacad5SJay Sternberg int instance; 206103e515eSHannes Reinecke int numa_node; 2075bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 20834b6c231SSagi Grimberg struct blk_mq_tag_set *admin_tagset; 2095bae7f73SChristoph Hellwig struct list_head namespaces; 210765cc031SJianchao Wang struct rw_semaphore namespaces_rwsem; 211d22524a4SChristoph Hellwig struct device ctrl_device; 2125bae7f73SChristoph Hellwig struct device *device; /* char device */ 213a6a5149bSChristoph Hellwig struct cdev cdev; 214d86c4d8eSChristoph Hellwig struct work_struct reset_work; 215c5017e85SChristoph Hellwig struct work_struct delete_work; 216c1ac9a4bSKeith Busch wait_queue_head_t state_wq; 2171c63dc66SChristoph Hellwig 218ab9e00ccSChristoph Hellwig struct nvme_subsystem *subsys; 219ab9e00ccSChristoph Hellwig struct list_head subsys_entry; 220ab9e00ccSChristoph Hellwig 2214f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 222a98e58e5SScott Bauer 22357dacad5SJay Sternberg char name[12]; 22476e3914aSChristoph Hellwig u16 cntlid; 2255fd4ce1bSChristoph Hellwig 2265fd4ce1bSChristoph Hellwig u32 ctrl_config; 227b6dccf7fSArnav Dawn u16 mtfa; 228d858e5f0SSagi Grimberg u32 queue_count; 2295fd4ce1bSChristoph Hellwig 23020d0dfe6SSagi Grimberg u64 cap; 2315fd4ce1bSChristoph Hellwig u32 page_size; 23257dacad5SJay Sternberg u32 max_hw_sectors; 233943e942eSJens Axboe u32 max_segments; 23495093350SMax Gurtovoy u32 max_integrity_segments; 23549cd84b6SKeith Busch u16 crdt[3]; 23657dacad5SJay Sternberg u16 oncs; 2378a9ae523SScott Bauer u16 oacs; 238f5d11840SJens Axboe u16 nssa; 239f5d11840SJens Axboe u16 nr_streams; 240f968688fSKeith Busch u16 sqsize; 2410d0b660fSChristoph Hellwig u32 max_namespaces; 2426bf25d16SChristoph Hellwig atomic_t abort_limit; 24357dacad5SJay Sternberg u8 vwc; 244f3ca80fcSChristoph Hellwig u32 vs; 24507bfcd09SChristoph Hellwig u32 sgls; 246038bd4cbSSagi Grimberg u16 kas; 247c5552fdeSAndy Lutomirski u8 npss; 248c5552fdeSAndy Lutomirski u8 apsta; 249400b6a7bSGuenter Roeck u16 wctemp; 250400b6a7bSGuenter Roeck u16 cctemp; 251c0561f82SHannes Reinecke u32 oaes; 252e3d7874dSKeith Busch u32 aen_result; 2533e53ba38SSagi Grimberg u32 ctratt; 25407fbd32aSMartin K. Petersen unsigned int shutdown_timeout; 255038bd4cbSSagi Grimberg unsigned int kato; 256f3ca80fcSChristoph Hellwig bool subsystem; 257106198edSChristoph Hellwig unsigned long quirks; 258c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 25984fef62dSKeith Busch struct nvme_effects_log *effects; 2605955be21SChristoph Hellwig struct work_struct scan_work; 261f866fc42SChristoph Hellwig struct work_struct async_event_work; 262038bd4cbSSagi Grimberg struct delayed_work ka_work; 2630a34e466SRoland Dreier struct nvme_command ka_cmd; 264b6dccf7fSArnav Dawn struct work_struct fw_act_work; 26530d90964SChristoph Hellwig unsigned long events; 266ce151813SIsrael Rukshin bool created; 26707bfcd09SChristoph Hellwig 2680d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 2690d0b660fSChristoph Hellwig /* asymmetric namespace access: */ 2700d0b660fSChristoph Hellwig u8 anacap; 2710d0b660fSChristoph Hellwig u8 anatt; 2720d0b660fSChristoph Hellwig u32 anagrpmax; 2730d0b660fSChristoph Hellwig u32 nanagrpid; 2740d0b660fSChristoph Hellwig struct mutex ana_lock; 2750d0b660fSChristoph Hellwig struct nvme_ana_rsp_hdr *ana_log_buf; 2760d0b660fSChristoph Hellwig size_t ana_log_size; 2770d0b660fSChristoph Hellwig struct timer_list anatt_timer; 2780d0b660fSChristoph Hellwig struct work_struct ana_work; 2790d0b660fSChristoph Hellwig #endif 2800d0b660fSChristoph Hellwig 281c5552fdeSAndy Lutomirski /* Power saving configuration */ 282c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 28376a5af84SKai-Heng Feng bool apst_enabled; 284c5552fdeSAndy Lutomirski 285044a9df1SChristoph Hellwig /* PCIe only: */ 286fe6d53c9SChristoph Hellwig u32 hmpre; 287fe6d53c9SChristoph Hellwig u32 hmmin; 288044a9df1SChristoph Hellwig u32 hmminds; 289044a9df1SChristoph Hellwig u16 hmmaxd; 290fe6d53c9SChristoph Hellwig 29107bfcd09SChristoph Hellwig /* Fabrics only */ 29207bfcd09SChristoph Hellwig u32 ioccsz; 29307bfcd09SChristoph Hellwig u32 iorcsz; 29407bfcd09SChristoph Hellwig u16 icdoff; 29507bfcd09SChristoph Hellwig u16 maxcmd; 296fdf9dfa8SSagi Grimberg int nr_reconnects; 29707bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 298cb5b7262SJens Axboe 299cb5b7262SJens Axboe struct page *discard_page; 300cb5b7262SJens Axboe unsigned long discard_page_busy; 301f79d5fdaSAkinobu Mita 302f79d5fdaSAkinobu Mita struct nvme_fault_inject fault_inject; 30357dacad5SJay Sternberg }; 30457dacad5SJay Sternberg 30575c10e73SHannes Reinecke enum nvme_iopolicy { 30675c10e73SHannes Reinecke NVME_IOPOLICY_NUMA, 30775c10e73SHannes Reinecke NVME_IOPOLICY_RR, 30875c10e73SHannes Reinecke }; 30975c10e73SHannes Reinecke 310ab9e00ccSChristoph Hellwig struct nvme_subsystem { 311ab9e00ccSChristoph Hellwig int instance; 312ab9e00ccSChristoph Hellwig struct device dev; 313ab9e00ccSChristoph Hellwig /* 314ab9e00ccSChristoph Hellwig * Because we unregister the device on the last put we need 315ab9e00ccSChristoph Hellwig * a separate refcount. 316ab9e00ccSChristoph Hellwig */ 317ab9e00ccSChristoph Hellwig struct kref ref; 318ab9e00ccSChristoph Hellwig struct list_head entry; 319ab9e00ccSChristoph Hellwig struct mutex lock; 320ab9e00ccSChristoph Hellwig struct list_head ctrls; 321ed754e5dSChristoph Hellwig struct list_head nsheads; 322ab9e00ccSChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 323ab9e00ccSChristoph Hellwig char serial[20]; 324ab9e00ccSChristoph Hellwig char model[40]; 325ab9e00ccSChristoph Hellwig char firmware_rev[8]; 326ab9e00ccSChristoph Hellwig u8 cmic; 327ab9e00ccSChristoph Hellwig u16 vendor_id; 32881adb863SBart Van Assche u16 awupf; /* 0's based awupf value. */ 329ed754e5dSChristoph Hellwig struct ida ns_ida; 33075c10e73SHannes Reinecke #ifdef CONFIG_NVME_MULTIPATH 33175c10e73SHannes Reinecke enum nvme_iopolicy iopolicy; 33275c10e73SHannes Reinecke #endif 333ab9e00ccSChristoph Hellwig }; 334ab9e00ccSChristoph Hellwig 335002fab04SChristoph Hellwig /* 336002fab04SChristoph Hellwig * Container structure for uniqueue namespace identifiers. 337002fab04SChristoph Hellwig */ 338002fab04SChristoph Hellwig struct nvme_ns_ids { 339002fab04SChristoph Hellwig u8 eui64[8]; 340002fab04SChristoph Hellwig u8 nguid[16]; 341002fab04SChristoph Hellwig uuid_t uuid; 342002fab04SChristoph Hellwig }; 343002fab04SChristoph Hellwig 344ed754e5dSChristoph Hellwig /* 345ed754e5dSChristoph Hellwig * Anchor structure for namespaces. There is one for each namespace in a 346ed754e5dSChristoph Hellwig * NVMe subsystem that any of our controllers can see, and the namespace 347ed754e5dSChristoph Hellwig * structure for each controller is chained of it. For private namespaces 348ed754e5dSChristoph Hellwig * there is a 1:1 relation to our namespace structures, that is ->list 349ed754e5dSChristoph Hellwig * only ever has a single entry for private namespaces. 350ed754e5dSChristoph Hellwig */ 351ed754e5dSChristoph Hellwig struct nvme_ns_head { 352ed754e5dSChristoph Hellwig struct list_head list; 353ed754e5dSChristoph Hellwig struct srcu_struct srcu; 354ed754e5dSChristoph Hellwig struct nvme_subsystem *subsys; 355ed754e5dSChristoph Hellwig unsigned ns_id; 356ed754e5dSChristoph Hellwig struct nvme_ns_ids ids; 357ed754e5dSChristoph Hellwig struct list_head entry; 358ed754e5dSChristoph Hellwig struct kref ref; 3590c284db7SKeith Busch bool shared; 360ed754e5dSChristoph Hellwig int instance; 361f3334447SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 362f3334447SChristoph Hellwig struct gendisk *disk; 363f3334447SChristoph Hellwig struct bio_list requeue_list; 364f3334447SChristoph Hellwig spinlock_t requeue_lock; 365f3334447SChristoph Hellwig struct work_struct requeue_work; 366f3334447SChristoph Hellwig struct mutex lock; 367f3334447SChristoph Hellwig struct nvme_ns __rcu *current_path[]; 368f3334447SChristoph Hellwig #endif 369ed754e5dSChristoph Hellwig }; 370ed754e5dSChristoph Hellwig 371ffc89b1dSMax Gurtovoy enum nvme_ns_features { 372ffc89b1dSMax Gurtovoy NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 373b29f8485SMax Gurtovoy NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 374ffc89b1dSMax Gurtovoy }; 375ffc89b1dSMax Gurtovoy 37657dacad5SJay Sternberg struct nvme_ns { 37757dacad5SJay Sternberg struct list_head list; 37857dacad5SJay Sternberg 3791c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 38057dacad5SJay Sternberg struct request_queue *queue; 38157dacad5SJay Sternberg struct gendisk *disk; 3820d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 3830d0b660fSChristoph Hellwig enum nvme_ana_state ana_state; 3840d0b660fSChristoph Hellwig u32 ana_grpid; 3850d0b660fSChristoph Hellwig #endif 386ed754e5dSChristoph Hellwig struct list_head siblings; 387b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 38857dacad5SJay Sternberg struct kref kref; 389ed754e5dSChristoph Hellwig struct nvme_ns_head *head; 39057dacad5SJay Sternberg 39157dacad5SJay Sternberg int lba_shift; 39257dacad5SJay Sternberg u16 ms; 393f5d11840SJens Axboe u16 sgs; 394f5d11840SJens Axboe u32 sws; 39557dacad5SJay Sternberg u8 pi_type; 396ffc89b1dSMax Gurtovoy unsigned long features; 397646017a6SKeith Busch unsigned long flags; 398646017a6SKeith Busch #define NVME_NS_REMOVING 0 39969d9a99cSKeith Busch #define NVME_NS_DEAD 1 4000d0b660fSChristoph Hellwig #define NVME_NS_ANA_PENDING 2 401b9e03857SThomas Tai 402b9e03857SThomas Tai struct nvme_fault_inject fault_inject; 403b9e03857SThomas Tai 40457dacad5SJay Sternberg }; 40557dacad5SJay Sternberg 4064d2ce688SJames Smart /* NVMe ns supports metadata actions by the controller (generate/strip) */ 4074d2ce688SJames Smart static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 4084d2ce688SJames Smart { 4094d2ce688SJames Smart return ns->pi_type && ns->ms == sizeof(struct t10_pi_tuple); 4104d2ce688SJames Smart } 4114d2ce688SJames Smart 4121c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 4131a353d85SMing Lin const char *name; 414e439bb12SSagi Grimberg struct module *module; 415d3d5b87dSChristoph Hellwig unsigned int flags; 416d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 417c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 418e0596ab2SLogan Gunthorpe #define NVME_F_PCI_P2PDMA (1 << 2) 4191c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 4205fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 4217fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 4221673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 423ad22c355SKeith Busch void (*submit_async_event)(struct nvme_ctrl *ctrl); 424c5017e85SChristoph Hellwig void (*delete_ctrl)(struct nvme_ctrl *ctrl); 4251a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 42657dacad5SJay Sternberg }; 42757dacad5SJay Sternberg 428b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 429a3646451SAkinobu Mita void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 430a3646451SAkinobu Mita const char *dev_name); 431a3646451SAkinobu Mita void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 432b9e03857SThomas Tai void nvme_should_fail(struct request *req); 433b9e03857SThomas Tai #else 434a3646451SAkinobu Mita static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 435a3646451SAkinobu Mita const char *dev_name) 436a3646451SAkinobu Mita { 437a3646451SAkinobu Mita } 438a3646451SAkinobu Mita static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 439a3646451SAkinobu Mita { 440a3646451SAkinobu Mita } 441b9e03857SThomas Tai static inline void nvme_should_fail(struct request *req) {} 442b9e03857SThomas Tai #endif 443b9e03857SThomas Tai 444f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 445f3ca80fcSChristoph Hellwig { 446f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 447f3ca80fcSChristoph Hellwig return -ENOTTY; 448f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 449f3ca80fcSChristoph Hellwig } 450f3ca80fcSChristoph Hellwig 451314d48ddSDamien Le Moal /* 452314d48ddSDamien Le Moal * Convert a 512B sector number to a device logical block number. 453314d48ddSDamien Le Moal */ 454314d48ddSDamien Le Moal static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 45557dacad5SJay Sternberg { 456314d48ddSDamien Le Moal return sector >> (ns->lba_shift - SECTOR_SHIFT); 45757dacad5SJay Sternberg } 45857dacad5SJay Sternberg 459e08f2ae8SDamien Le Moal /* 460e08f2ae8SDamien Le Moal * Convert a device logical block number to a 512B sector number. 461e08f2ae8SDamien Le Moal */ 462e08f2ae8SDamien Le Moal static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 463e08f2ae8SDamien Le Moal { 464e08f2ae8SDamien Le Moal return lba << (ns->lba_shift - SECTOR_SHIFT); 46557dacad5SJay Sternberg } 46657dacad5SJay Sternberg 46771fb90ebSKeith Busch /* 46871fb90ebSKeith Busch * Convert byte length to nvme's 0-based num dwords 46971fb90ebSKeith Busch */ 47071fb90ebSKeith Busch static inline u32 nvme_bytes_to_numd(size_t len) 47171fb90ebSKeith Busch { 47271fb90ebSKeith Busch return (len >> 2) - 1; 47371fb90ebSKeith Busch } 47471fb90ebSKeith Busch 47527fa9bc5SChristoph Hellwig static inline void nvme_end_request(struct request *req, __le16 status, 47627fa9bc5SChristoph Hellwig union nvme_result result) 47715a190f7SChristoph Hellwig { 47827fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 47927fa9bc5SChristoph Hellwig 48027fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 48127fa9bc5SChristoph Hellwig rq->result = result; 482b9e03857SThomas Tai /* inject error when permitted by fault injection framework */ 483b9e03857SThomas Tai nvme_should_fail(req); 48408e0029aSChristoph Hellwig blk_mq_complete_request(req); 48515a190f7SChristoph Hellwig } 48615a190f7SChristoph Hellwig 487d22524a4SChristoph Hellwig static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 488d22524a4SChristoph Hellwig { 489d22524a4SChristoph Hellwig get_device(ctrl->device); 490d22524a4SChristoph Hellwig } 491d22524a4SChristoph Hellwig 492d22524a4SChristoph Hellwig static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 493d22524a4SChristoph Hellwig { 494d22524a4SChristoph Hellwig put_device(ctrl->device); 495d22524a4SChristoph Hellwig } 496d22524a4SChristoph Hellwig 49758a8df67SIsrael Rukshin static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 49858a8df67SIsrael Rukshin { 49958a8df67SIsrael Rukshin return !qid && command_id >= NVME_AQ_BLK_MQ_DEPTH; 50058a8df67SIsrael Rukshin } 50158a8df67SIsrael Rukshin 50277f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 5037baa8572SJens Axboe bool nvme_cancel_request(struct request *req, void *data, bool reserved); 504bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 505bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 506c1ac9a4bSKeith Busch bool nvme_wait_reset(struct nvme_ctrl *ctrl); 507b5b05048SSagi Grimberg int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 508c0f2f45bSSagi Grimberg int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 5095fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 510f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 511f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 51253029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 513d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 514d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 5157fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 5165bae7f73SChristoph Hellwig 5175bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 5181673f1f0SChristoph Hellwig 5194f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 5204f1244c8SChristoph Hellwig bool send); 521a98e58e5SScott Bauer 5227bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 523287a63ebSChristoph Hellwig volatile union nvme_result *res); 524f866fc42SChristoph Hellwig 52525646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 52625646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 52769d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 528d6135c3aSKeith Busch void nvme_sync_queues(struct nvme_ctrl *ctrl); 529302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 530302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 531302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 532302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 533363c9aacSSagi Grimberg 534eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 5354160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 5369a95e4efSBart Van Assche struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 537f7f1fc36SMax Gurtovoy void nvme_cleanup_cmd(struct request *req); 538fc17b653SChristoph Hellwig blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 5398093f7caSMing Lin struct nvme_command *cmd); 54057dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 54157dacad5SJay Sternberg void *buf, unsigned bufflen); 54257dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 543d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 5449a95e4efSBart Van Assche unsigned timeout, int qid, int at_head, 5456287b51cSSagi Grimberg blk_mq_req_flags_t flags, bool poll); 5461a87ee65SKeith Busch int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 5471a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 5481a87ee65SKeith Busch u32 *result); 5491a87ee65SKeith Busch int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 5501a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 5511a87ee65SKeith Busch u32 *result); 5529a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 553038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 554d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 55579c48ccfSSagi Grimberg int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 556c1ac9a4bSKeith Busch int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 557c5017e85SChristoph Hellwig int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 55857dacad5SJay Sternberg 5590e98719bSChristoph Hellwig int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 5600e98719bSChristoph Hellwig void *log, size_t size, u64 offset); 561d558fb51SMatias Bjørling 56233b14f67SHannes Reinecke extern const struct attribute_group *nvme_ns_id_attr_groups[]; 56332acab31SChristoph Hellwig extern const struct block_device_operations nvme_ns_head_ops; 56432acab31SChristoph Hellwig 56532acab31SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 56666b20ac0SMarta Rybczynska static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 56766b20ac0SMarta Rybczynska { 56866b20ac0SMarta Rybczynska return ctrl->ana_log_buf != NULL; 56966b20ac0SMarta Rybczynska } 57066b20ac0SMarta Rybczynska 571b9156daeSSagi Grimberg void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 572b9156daeSSagi Grimberg void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 573b9156daeSSagi Grimberg void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 574a785dbccSKeith Busch void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 575a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags); 576764e9332SJohn Meneghini bool nvme_failover_req(struct request *req); 57732acab31SChristoph Hellwig void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 57832acab31SChristoph Hellwig int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 5790d0b660fSChristoph Hellwig void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 58032acab31SChristoph Hellwig void nvme_mpath_remove_disk(struct nvme_ns_head *head); 5810d0b660fSChristoph Hellwig int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 5820d0b660fSChristoph Hellwig void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 5830d0b660fSChristoph Hellwig void nvme_mpath_stop(struct nvme_ctrl *ctrl); 5840157ec8dSSagi Grimberg bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 5850157ec8dSSagi Grimberg void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 58632acab31SChristoph Hellwig struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 587479a322fSSagi Grimberg 588479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 589479a322fSSagi Grimberg { 590479a322fSSagi Grimberg struct nvme_ns_head *head = ns->head; 591479a322fSSagi Grimberg 592479a322fSSagi Grimberg if (head->disk && list_empty(&head->list)) 593479a322fSSagi Grimberg kblockd_schedule_work(&head->requeue_work); 594479a322fSSagi Grimberg } 595479a322fSSagi Grimberg 59635fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 59735fe0d12SHannes Reinecke blk_status_t status) 59835fe0d12SHannes Reinecke { 59935fe0d12SHannes Reinecke struct nvme_ns *ns = req->q->queuedata; 60035fe0d12SHannes Reinecke 60135fe0d12SHannes Reinecke if (req->cmd_flags & REQ_NVME_MPATH) 602d24de76aSChristoph Hellwig trace_block_bio_complete(ns->head->disk->queue, req->bio); 60335fe0d12SHannes Reinecke } 60435fe0d12SHannes Reinecke 6050d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_grpid; 6060d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_state; 60775c10e73SHannes Reinecke extern struct device_attribute subsys_attr_iopolicy; 6080d0b660fSChristoph Hellwig 60932acab31SChristoph Hellwig #else 6100d0b660fSChristoph Hellwig static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 6110d0b660fSChristoph Hellwig { 6120d0b660fSChristoph Hellwig return false; 6130d0b660fSChristoph Hellwig } 614a785dbccSKeith Busch /* 615a785dbccSKeith Busch * Without the multipath code enabled, multiple controller per subsystems are 616a785dbccSKeith Busch * visible as devices and thus we cannot use the subsystem instance. 617a785dbccSKeith Busch */ 618a785dbccSKeith Busch static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 619a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags) 620a785dbccSKeith Busch { 621a785dbccSKeith Busch sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 622a785dbccSKeith Busch } 623a785dbccSKeith Busch 624764e9332SJohn Meneghini static inline bool nvme_failover_req(struct request *req) 62532acab31SChristoph Hellwig { 626764e9332SJohn Meneghini return false; 62732acab31SChristoph Hellwig } 62832acab31SChristoph Hellwig static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 62932acab31SChristoph Hellwig { 63032acab31SChristoph Hellwig } 63132acab31SChristoph Hellwig static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 63232acab31SChristoph Hellwig struct nvme_ns_head *head) 63332acab31SChristoph Hellwig { 63432acab31SChristoph Hellwig return 0; 63532acab31SChristoph Hellwig } 6360d0b660fSChristoph Hellwig static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 6370d0b660fSChristoph Hellwig struct nvme_id_ns *id) 63832acab31SChristoph Hellwig { 63932acab31SChristoph Hellwig } 64032acab31SChristoph Hellwig static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 64132acab31SChristoph Hellwig { 64232acab31SChristoph Hellwig } 6430157ec8dSSagi Grimberg static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 6440157ec8dSSagi Grimberg { 6450157ec8dSSagi Grimberg return false; 6460157ec8dSSagi Grimberg } 6470157ec8dSSagi Grimberg static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 64832acab31SChristoph Hellwig { 64932acab31SChristoph Hellwig } 650479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 651479a322fSSagi Grimberg { 652479a322fSSagi Grimberg } 65335fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 65435fe0d12SHannes Reinecke blk_status_t status) 65535fe0d12SHannes Reinecke { 65635fe0d12SHannes Reinecke } 6570d0b660fSChristoph Hellwig static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 6580d0b660fSChristoph Hellwig struct nvme_id_ctrl *id) 6590d0b660fSChristoph Hellwig { 66014a1336eSChristoph Hellwig if (ctrl->subsys->cmic & (1 << 3)) 66114a1336eSChristoph Hellwig dev_warn(ctrl->device, 66214a1336eSChristoph Hellwig "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 6630d0b660fSChristoph Hellwig return 0; 6640d0b660fSChristoph Hellwig } 6650d0b660fSChristoph Hellwig static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 6660d0b660fSChristoph Hellwig { 6670d0b660fSChristoph Hellwig } 6680d0b660fSChristoph Hellwig static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 6690d0b660fSChristoph Hellwig { 6700d0b660fSChristoph Hellwig } 671b9156daeSSagi Grimberg static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 672b9156daeSSagi Grimberg { 673b9156daeSSagi Grimberg } 674b9156daeSSagi Grimberg static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 675b9156daeSSagi Grimberg { 676b9156daeSSagi Grimberg } 677b9156daeSSagi Grimberg static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 678b9156daeSSagi Grimberg { 679b9156daeSSagi Grimberg } 68032acab31SChristoph Hellwig #endif /* CONFIG_NVME_MULTIPATH */ 68132acab31SChristoph Hellwig 682c4699e70SKeith Busch #ifdef CONFIG_NVM 6833dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 684b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 68533b14f67SHannes Reinecke extern const struct attribute_group nvme_nvm_attr_group; 68684d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 687c4699e70SKeith Busch #else 688b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 6893dc87dd0SMatias Bjørling int node) 690c4699e70SKeith Busch { 691c4699e70SKeith Busch return 0; 692c4699e70SKeith Busch } 693c4699e70SKeith Busch 694b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 69584d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 69684d4add7SMatias Bjørling unsigned long arg) 69784d4add7SMatias Bjørling { 69884d4add7SMatias Bjørling return -ENOTTY; 69984d4add7SMatias Bjørling } 7003dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 7013dc87dd0SMatias Bjørling 70240267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 70340267efdSSimon A. F. Lund { 70440267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 70540267efdSSimon A. F. Lund } 706ca064085SMatias Bjørling 707400b6a7bSGuenter Roeck #ifdef CONFIG_NVME_HWMON 708400b6a7bSGuenter Roeck void nvme_hwmon_init(struct nvme_ctrl *ctrl); 709400b6a7bSGuenter Roeck #else 710400b6a7bSGuenter Roeck static inline void nvme_hwmon_init(struct nvme_ctrl *ctrl) { } 711400b6a7bSGuenter Roeck #endif 712400b6a7bSGuenter Roeck 71357dacad5SJay Sternberg #endif /* _NVME_H */ 714