157dacad5SJay Sternberg /* 257dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 357dacad5SJay Sternberg * 457dacad5SJay Sternberg * This program is free software; you can redistribute it and/or modify it 557dacad5SJay Sternberg * under the terms and conditions of the GNU General Public License, 657dacad5SJay Sternberg * version 2, as published by the Free Software Foundation. 757dacad5SJay Sternberg * 857dacad5SJay Sternberg * This program is distributed in the hope it will be useful, but WITHOUT 957dacad5SJay Sternberg * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1057dacad5SJay Sternberg * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1157dacad5SJay Sternberg * more details. 1257dacad5SJay Sternberg */ 1357dacad5SJay Sternberg 1457dacad5SJay Sternberg #ifndef _NVME_H 1557dacad5SJay Sternberg #define _NVME_H 1657dacad5SJay Sternberg 1757dacad5SJay Sternberg #include <linux/nvme.h> 1857dacad5SJay Sternberg #include <linux/pci.h> 1957dacad5SJay Sternberg #include <linux/kref.h> 2057dacad5SJay Sternberg #include <linux/blk-mq.h> 21b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 22a98e58e5SScott Bauer #include <linux/sed-opal.h> 2357dacad5SJay Sternberg 2457dacad5SJay Sternberg extern unsigned char nvme_io_timeout; 2557dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2657dacad5SJay Sternberg 2721d34711SChristoph Hellwig extern unsigned char admin_timeout; 2821d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 2921d34711SChristoph Hellwig 30038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 31038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 32038bd4cbSSagi Grimberg 339a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 349a6327d2SSagi Grimberg 35ca064085SMatias Bjørling enum { 36ca064085SMatias Bjørling NVME_NS_LBA = 0, 37ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 38ca064085SMatias Bjørling }; 39ca064085SMatias Bjørling 4057dacad5SJay Sternberg /* 41106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 42106198edSChristoph Hellwig * the standard. 4357dacad5SJay Sternberg */ 44106198edSChristoph Hellwig enum nvme_quirks { 45106198edSChristoph Hellwig /* 46106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 47106198edSChristoph Hellwig * specific Identify field. 48106198edSChristoph Hellwig */ 49106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 50540c801cSKeith Busch 51540c801cSKeith Busch /* 52540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 53540c801cSKeith Busch * correctly. 54540c801cSKeith Busch */ 55540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 5608095e70SKeith Busch 5708095e70SKeith Busch /* 58e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 59e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 6008095e70SKeith Busch */ 61e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 6254adc010SGuilherme G. Piccoli 6354adc010SGuilherme G. Piccoli /* 6454adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 6554adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 6654adc010SGuilherme G. Piccoli */ 6754adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 68c5552fdeSAndy Lutomirski 69c5552fdeSAndy Lutomirski /* 70c5552fdeSAndy Lutomirski * APST should not be used. 71c5552fdeSAndy Lutomirski */ 72c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 73ff5350a8SAndy Lutomirski 74ff5350a8SAndy Lutomirski /* 75ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 76ff5350a8SAndy Lutomirski */ 77ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 78106198edSChristoph Hellwig }; 79106198edSChristoph Hellwig 80d49187e9SChristoph Hellwig /* 81d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 82d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 83d49187e9SChristoph Hellwig */ 84d49187e9SChristoph Hellwig struct nvme_request { 85d49187e9SChristoph Hellwig struct nvme_command *cmd; 86d49187e9SChristoph Hellwig union nvme_result result; 8744e44b29SChristoph Hellwig u8 retries; 8827fa9bc5SChristoph Hellwig u8 flags; 8927fa9bc5SChristoph Hellwig u16 status; 9027fa9bc5SChristoph Hellwig }; 9127fa9bc5SChristoph Hellwig 9227fa9bc5SChristoph Hellwig enum { 9327fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 94d49187e9SChristoph Hellwig }; 95d49187e9SChristoph Hellwig 96d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 97d49187e9SChristoph Hellwig { 98d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 99d49187e9SChristoph Hellwig } 100d49187e9SChristoph Hellwig 10154adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 10254adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 10354adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 10454adc010SGuilherme G. Piccoli * found empirically. 10554adc010SGuilherme G. Piccoli */ 10654adc010SGuilherme G. Piccoli #define NVME_QUIRK_DELAY_AMOUNT 2000 10754adc010SGuilherme G. Piccoli 108bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 109bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 110bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 111bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 112def61ecaSChristoph Hellwig NVME_CTRL_RECONNECTING, 113bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 1140ff9d4e1SKeith Busch NVME_CTRL_DEAD, 115bb8d261eSChristoph Hellwig }; 116bb8d261eSChristoph Hellwig 1171c63dc66SChristoph Hellwig struct nvme_ctrl { 118bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 119bd4da3abSAndy Lutomirski bool identified; 120bb8d261eSChristoph Hellwig spinlock_t lock; 1211c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 12257dacad5SJay Sternberg struct request_queue *admin_q; 12307bfcd09SChristoph Hellwig struct request_queue *connect_q; 12457dacad5SJay Sternberg struct device *dev; 12557dacad5SJay Sternberg struct kref kref; 12657dacad5SJay Sternberg int instance; 1275bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 1285bae7f73SChristoph Hellwig struct list_head namespaces; 12969d3b8acSChristoph Hellwig struct mutex namespaces_mutex; 1305bae7f73SChristoph Hellwig struct device *device; /* char device */ 131f3ca80fcSChristoph Hellwig struct list_head node; 132075790ebSKeith Busch struct ida ns_ida; 133d86c4d8eSChristoph Hellwig struct work_struct reset_work; 1341c63dc66SChristoph Hellwig 1354f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 136a98e58e5SScott Bauer 13757dacad5SJay Sternberg char name[12]; 13857dacad5SJay Sternberg char serial[20]; 13957dacad5SJay Sternberg char model[40]; 14057dacad5SJay Sternberg char firmware_rev[8]; 141180de007SChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 14276e3914aSChristoph Hellwig u16 cntlid; 1435fd4ce1bSChristoph Hellwig 1445fd4ce1bSChristoph Hellwig u32 ctrl_config; 145d858e5f0SSagi Grimberg u32 queue_count; 1465fd4ce1bSChristoph Hellwig 14720d0dfe6SSagi Grimberg u64 cap; 1485fd4ce1bSChristoph Hellwig u32 page_size; 14957dacad5SJay Sternberg u32 max_hw_sectors; 15057dacad5SJay Sternberg u16 oncs; 151118472abSKeith Busch u16 vid; 1528a9ae523SScott Bauer u16 oacs; 153f5d11840SJens Axboe u16 nssa; 154f5d11840SJens Axboe u16 nr_streams; 1556bf25d16SChristoph Hellwig atomic_t abort_limit; 15657dacad5SJay Sternberg u8 event_limit; 15757dacad5SJay Sternberg u8 vwc; 158f3ca80fcSChristoph Hellwig u32 vs; 15907bfcd09SChristoph Hellwig u32 sgls; 160038bd4cbSSagi Grimberg u16 kas; 161c5552fdeSAndy Lutomirski u8 npss; 162c5552fdeSAndy Lutomirski u8 apsta; 163038bd4cbSSagi Grimberg unsigned int kato; 164f3ca80fcSChristoph Hellwig bool subsystem; 165106198edSChristoph Hellwig unsigned long quirks; 166c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 1675955be21SChristoph Hellwig struct work_struct scan_work; 168f866fc42SChristoph Hellwig struct work_struct async_event_work; 169038bd4cbSSagi Grimberg struct delayed_work ka_work; 17007bfcd09SChristoph Hellwig 171c5552fdeSAndy Lutomirski /* Power saving configuration */ 172c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 17376a5af84SKai-Heng Feng bool apst_enabled; 174c5552fdeSAndy Lutomirski 175fe6d53c9SChristoph Hellwig u32 hmpre; 176fe6d53c9SChristoph Hellwig u32 hmmin; 177fe6d53c9SChristoph Hellwig 17807bfcd09SChristoph Hellwig /* Fabrics only */ 17907bfcd09SChristoph Hellwig u16 sqsize; 18007bfcd09SChristoph Hellwig u32 ioccsz; 18107bfcd09SChristoph Hellwig u32 iorcsz; 18207bfcd09SChristoph Hellwig u16 icdoff; 18307bfcd09SChristoph Hellwig u16 maxcmd; 184fdf9dfa8SSagi Grimberg int nr_reconnects; 18507bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 18657dacad5SJay Sternberg }; 18757dacad5SJay Sternberg 18857dacad5SJay Sternberg struct nvme_ns { 18957dacad5SJay Sternberg struct list_head list; 19057dacad5SJay Sternberg 1911c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 19257dacad5SJay Sternberg struct request_queue *queue; 19357dacad5SJay Sternberg struct gendisk *disk; 194b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 19557dacad5SJay Sternberg struct kref kref; 196075790ebSKeith Busch int instance; 19757dacad5SJay Sternberg 1982b9b6e86SKeith Busch u8 eui[8]; 19990985b84SJohannes Thumshirn u8 nguid[16]; 2003b22ba26SJohannes Thumshirn uuid_t uuid; 2012b9b6e86SKeith Busch 20257dacad5SJay Sternberg unsigned ns_id; 20357dacad5SJay Sternberg int lba_shift; 20457dacad5SJay Sternberg u16 ms; 205f5d11840SJens Axboe u16 sgs; 206f5d11840SJens Axboe u32 sws; 20757dacad5SJay Sternberg bool ext; 20857dacad5SJay Sternberg u8 pi_type; 209646017a6SKeith Busch unsigned long flags; 2106b8190d6SScott Bauer u16 noiob; 211646017a6SKeith Busch 212646017a6SKeith Busch #define NVME_NS_REMOVING 0 21369d9a99cSKeith Busch #define NVME_NS_DEAD 1 214646017a6SKeith Busch 21557dacad5SJay Sternberg u64 mode_select_num_blocks; 21657dacad5SJay Sternberg u32 mode_select_block_len; 21757dacad5SJay Sternberg }; 21857dacad5SJay Sternberg 2191c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 2201a353d85SMing Lin const char *name; 221e439bb12SSagi Grimberg struct module *module; 222d3d5b87dSChristoph Hellwig unsigned int flags; 223d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 224c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 2251c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 2265fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 2277fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 2281673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 229f866fc42SChristoph Hellwig void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx); 2301a353d85SMing Lin int (*delete_ctrl)(struct nvme_ctrl *ctrl); 2311a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 23257dacad5SJay Sternberg }; 23357dacad5SJay Sternberg 2341c63dc66SChristoph Hellwig static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) 2351c63dc66SChristoph Hellwig { 2361c63dc66SChristoph Hellwig u32 val = 0; 2371c63dc66SChristoph Hellwig 2381c63dc66SChristoph Hellwig if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) 2391c63dc66SChristoph Hellwig return false; 2401c63dc66SChristoph Hellwig return val & NVME_CSTS_RDY; 2411c63dc66SChristoph Hellwig } 2421c63dc66SChristoph Hellwig 243f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 244f3ca80fcSChristoph Hellwig { 245f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 246f3ca80fcSChristoph Hellwig return -ENOTTY; 247f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 248f3ca80fcSChristoph Hellwig } 249f3ca80fcSChristoph Hellwig 25057dacad5SJay Sternberg static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 25157dacad5SJay Sternberg { 25257dacad5SJay Sternberg return (sector >> (ns->lba_shift - 9)); 25357dacad5SJay Sternberg } 25457dacad5SJay Sternberg 2556904242dSMing Lin static inline void nvme_cleanup_cmd(struct request *req) 2566904242dSMing Lin { 257f9d03f96SChristoph Hellwig if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 258f9d03f96SChristoph Hellwig kfree(page_address(req->special_vec.bv_page) + 259f9d03f96SChristoph Hellwig req->special_vec.bv_offset); 260f9d03f96SChristoph Hellwig } 2616904242dSMing Lin } 2626904242dSMing Lin 26327fa9bc5SChristoph Hellwig static inline void nvme_end_request(struct request *req, __le16 status, 26427fa9bc5SChristoph Hellwig union nvme_result result) 26515a190f7SChristoph Hellwig { 26627fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 26727fa9bc5SChristoph Hellwig 26827fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 26927fa9bc5SChristoph Hellwig rq->result = result; 27008e0029aSChristoph Hellwig blk_mq_complete_request(req); 27115a190f7SChristoph Hellwig } 27215a190f7SChristoph Hellwig 27377f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 274c55a2fd4SMing Lin void nvme_cancel_request(struct request *req, void *data, bool reserved); 275bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 276bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 2775fd4ce1bSChristoph Hellwig int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 2785fd4ce1bSChristoph Hellwig int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 2795fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 280f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 281f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 28253029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 283*d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 284*d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 2851673f1f0SChristoph Hellwig void nvme_put_ctrl(struct nvme_ctrl *ctrl); 2867fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 2875bae7f73SChristoph Hellwig 2885955be21SChristoph Hellwig void nvme_queue_scan(struct nvme_ctrl *ctrl); 2895bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 2901673f1f0SChristoph Hellwig 2914f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2924f1244c8SChristoph Hellwig bool send); 293a98e58e5SScott Bauer 294f866fc42SChristoph Hellwig #define NVME_NR_AERS 1 2957bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 2967bf58533SChristoph Hellwig union nvme_result *res); 297f866fc42SChristoph Hellwig void nvme_queue_async_events(struct nvme_ctrl *ctrl); 298f866fc42SChristoph Hellwig 29925646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 30025646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 30169d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 302302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 303302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 304302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 305302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 306363c9aacSSagi Grimberg 307eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 3084160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 309eb71f435SChristoph Hellwig struct nvme_command *cmd, unsigned int flags, int qid); 310fc17b653SChristoph Hellwig blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 3118093f7caSMing Lin struct nvme_command *cmd); 31257dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 31357dacad5SJay Sternberg void *buf, unsigned bufflen); 31457dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 315d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 316eb71f435SChristoph Hellwig unsigned timeout, int qid, int at_head, int flags); 3174160982eSChristoph Hellwig int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, 3184160982eSChristoph Hellwig void __user *ubuffer, unsigned bufflen, u32 *result, 3194160982eSChristoph Hellwig unsigned timeout); 3200b7f1f26SKeith Busch int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, 3210b7f1f26SKeith Busch void __user *ubuffer, unsigned bufflen, 3220b7f1f26SKeith Busch void __user *meta_buffer, unsigned meta_len, u32 meta_seed, 32357dacad5SJay Sternberg u32 *result, unsigned timeout); 3249a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 325038bd4cbSSagi Grimberg void nvme_start_keep_alive(struct nvme_ctrl *ctrl); 326038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 327d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 32857dacad5SJay Sternberg 329c4699e70SKeith Busch #ifdef CONFIG_NVM 330ca064085SMatias Bjørling int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id); 3313dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 332b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 3333dc87dd0SMatias Bjørling int nvme_nvm_register_sysfs(struct nvme_ns *ns); 3343dc87dd0SMatias Bjørling void nvme_nvm_unregister_sysfs(struct nvme_ns *ns); 33584d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 336c4699e70SKeith Busch #else 337b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 3383dc87dd0SMatias Bjørling int node) 339c4699e70SKeith Busch { 340c4699e70SKeith Busch return 0; 341c4699e70SKeith Busch } 342c4699e70SKeith Busch 343b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 3443dc87dd0SMatias Bjørling static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns) 3453dc87dd0SMatias Bjørling { 3463dc87dd0SMatias Bjørling return 0; 3473dc87dd0SMatias Bjørling } 3483dc87dd0SMatias Bjørling static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {}; 349c4699e70SKeith Busch static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id) 350c4699e70SKeith Busch { 351c4699e70SKeith Busch return 0; 352c4699e70SKeith Busch } 35384d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 35484d4add7SMatias Bjørling unsigned long arg) 35584d4add7SMatias Bjørling { 35684d4add7SMatias Bjørling return -ENOTTY; 35784d4add7SMatias Bjørling } 3583dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 3593dc87dd0SMatias Bjørling 36040267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 36140267efdSSimon A. F. Lund { 36240267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 36340267efdSSimon A. F. Lund } 364ca064085SMatias Bjørling 3655bae7f73SChristoph Hellwig int __init nvme_core_init(void); 3665bae7f73SChristoph Hellwig void nvme_core_exit(void); 3675bae7f73SChristoph Hellwig 36857dacad5SJay Sternberg #endif /* _NVME_H */ 369