xref: /openbmc/linux/drivers/nvme/host/nvme.h (revision c81bfba9)
157dacad5SJay Sternberg /*
257dacad5SJay Sternberg  * Copyright (c) 2011-2014, Intel Corporation.
357dacad5SJay Sternberg  *
457dacad5SJay Sternberg  * This program is free software; you can redistribute it and/or modify it
557dacad5SJay Sternberg  * under the terms and conditions of the GNU General Public License,
657dacad5SJay Sternberg  * version 2, as published by the Free Software Foundation.
757dacad5SJay Sternberg  *
857dacad5SJay Sternberg  * This program is distributed in the hope it will be useful, but WITHOUT
957dacad5SJay Sternberg  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1057dacad5SJay Sternberg  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
1157dacad5SJay Sternberg  * more details.
1257dacad5SJay Sternberg  */
1357dacad5SJay Sternberg 
1457dacad5SJay Sternberg #ifndef _NVME_H
1557dacad5SJay Sternberg #define _NVME_H
1657dacad5SJay Sternberg 
1757dacad5SJay Sternberg #include <linux/nvme.h>
1857dacad5SJay Sternberg #include <linux/pci.h>
1957dacad5SJay Sternberg #include <linux/kref.h>
2057dacad5SJay Sternberg #include <linux/blk-mq.h>
21b0b4e09cSMatias Bjørling #include <linux/lightnvm.h>
22a98e58e5SScott Bauer #include <linux/sed-opal.h>
2357dacad5SJay Sternberg 
2457dacad5SJay Sternberg extern unsigned char nvme_io_timeout;
2557dacad5SJay Sternberg #define NVME_IO_TIMEOUT	(nvme_io_timeout * HZ)
2657dacad5SJay Sternberg 
2721d34711SChristoph Hellwig extern unsigned char admin_timeout;
2821d34711SChristoph Hellwig #define ADMIN_TIMEOUT	(admin_timeout * HZ)
2921d34711SChristoph Hellwig 
305fd4ce1bSChristoph Hellwig extern unsigned char shutdown_timeout;
315fd4ce1bSChristoph Hellwig #define SHUTDOWN_TIMEOUT	(shutdown_timeout * HZ)
325fd4ce1bSChristoph Hellwig 
33038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO	5
34038bd4cbSSagi Grimberg #define NVME_KATO_GRACE		10
35038bd4cbSSagi Grimberg 
36ca064085SMatias Bjørling enum {
37ca064085SMatias Bjørling 	NVME_NS_LBA		= 0,
38ca064085SMatias Bjørling 	NVME_NS_LIGHTNVM	= 1,
39ca064085SMatias Bjørling };
40ca064085SMatias Bjørling 
4157dacad5SJay Sternberg /*
42106198edSChristoph Hellwig  * List of workarounds for devices that required behavior not specified in
43106198edSChristoph Hellwig  * the standard.
4457dacad5SJay Sternberg  */
45106198edSChristoph Hellwig enum nvme_quirks {
46106198edSChristoph Hellwig 	/*
47106198edSChristoph Hellwig 	 * Prefers I/O aligned to a stripe size specified in a vendor
48106198edSChristoph Hellwig 	 * specific Identify field.
49106198edSChristoph Hellwig 	 */
50106198edSChristoph Hellwig 	NVME_QUIRK_STRIPE_SIZE			= (1 << 0),
51540c801cSKeith Busch 
52540c801cSKeith Busch 	/*
53540c801cSKeith Busch 	 * The controller doesn't handle Identify value others than 0 or 1
54540c801cSKeith Busch 	 * correctly.
55540c801cSKeith Busch 	 */
56540c801cSKeith Busch 	NVME_QUIRK_IDENTIFY_CNS			= (1 << 1),
5708095e70SKeith Busch 
5808095e70SKeith Busch 	/*
59e850fd16SChristoph Hellwig 	 * The controller deterministically returns O's on reads to
60e850fd16SChristoph Hellwig 	 * logical blocks that deallocate was called on.
6108095e70SKeith Busch 	 */
62e850fd16SChristoph Hellwig 	NVME_QUIRK_DEALLOCATE_ZEROES		= (1 << 2),
6354adc010SGuilherme G. Piccoli 
6454adc010SGuilherme G. Piccoli 	/*
6554adc010SGuilherme G. Piccoli 	 * The controller needs a delay before starts checking the device
6654adc010SGuilherme G. Piccoli 	 * readiness, which is done by reading the NVME_CSTS_RDY bit.
6754adc010SGuilherme G. Piccoli 	 */
6854adc010SGuilherme G. Piccoli 	NVME_QUIRK_DELAY_BEFORE_CHK_RDY		= (1 << 3),
69c5552fdeSAndy Lutomirski 
70c5552fdeSAndy Lutomirski 	/*
71c5552fdeSAndy Lutomirski 	 * APST should not be used.
72c5552fdeSAndy Lutomirski 	 */
73c5552fdeSAndy Lutomirski 	NVME_QUIRK_NO_APST			= (1 << 4),
74ff5350a8SAndy Lutomirski 
75ff5350a8SAndy Lutomirski 	/*
76ff5350a8SAndy Lutomirski 	 * The deepest sleep state should not be used.
77ff5350a8SAndy Lutomirski 	 */
78ff5350a8SAndy Lutomirski 	NVME_QUIRK_NO_DEEPEST_PS		= (1 << 5),
79106198edSChristoph Hellwig };
80106198edSChristoph Hellwig 
81d49187e9SChristoph Hellwig /*
82d49187e9SChristoph Hellwig  * Common request structure for NVMe passthrough.  All drivers must have
83d49187e9SChristoph Hellwig  * this structure as the first member of their request-private data.
84d49187e9SChristoph Hellwig  */
85d49187e9SChristoph Hellwig struct nvme_request {
86d49187e9SChristoph Hellwig 	struct nvme_command	*cmd;
87d49187e9SChristoph Hellwig 	union nvme_result	result;
8844e44b29SChristoph Hellwig 	u8			retries;
8927fa9bc5SChristoph Hellwig 	u8			flags;
9027fa9bc5SChristoph Hellwig 	u16			status;
9127fa9bc5SChristoph Hellwig };
9227fa9bc5SChristoph Hellwig 
9327fa9bc5SChristoph Hellwig enum {
9427fa9bc5SChristoph Hellwig 	NVME_REQ_CANCELLED		= (1 << 0),
95d49187e9SChristoph Hellwig };
96d49187e9SChristoph Hellwig 
97d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req)
98d49187e9SChristoph Hellwig {
99d49187e9SChristoph Hellwig 	return blk_mq_rq_to_pdu(req);
100d49187e9SChristoph Hellwig }
101d49187e9SChristoph Hellwig 
10254adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking
10354adc010SGuilherme G. Piccoli  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
10454adc010SGuilherme G. Piccoli  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
10554adc010SGuilherme G. Piccoli  * found empirically.
10654adc010SGuilherme G. Piccoli  */
10754adc010SGuilherme G. Piccoli #define NVME_QUIRK_DELAY_AMOUNT		2000
10854adc010SGuilherme G. Piccoli 
109bb8d261eSChristoph Hellwig enum nvme_ctrl_state {
110bb8d261eSChristoph Hellwig 	NVME_CTRL_NEW,
111bb8d261eSChristoph Hellwig 	NVME_CTRL_LIVE,
112bb8d261eSChristoph Hellwig 	NVME_CTRL_RESETTING,
113def61ecaSChristoph Hellwig 	NVME_CTRL_RECONNECTING,
114bb8d261eSChristoph Hellwig 	NVME_CTRL_DELETING,
1150ff9d4e1SKeith Busch 	NVME_CTRL_DEAD,
116bb8d261eSChristoph Hellwig };
117bb8d261eSChristoph Hellwig 
1181c63dc66SChristoph Hellwig struct nvme_ctrl {
119bb8d261eSChristoph Hellwig 	enum nvme_ctrl_state state;
120bd4da3abSAndy Lutomirski 	bool identified;
121bb8d261eSChristoph Hellwig 	spinlock_t lock;
1221c63dc66SChristoph Hellwig 	const struct nvme_ctrl_ops *ops;
12357dacad5SJay Sternberg 	struct request_queue *admin_q;
12407bfcd09SChristoph Hellwig 	struct request_queue *connect_q;
12557dacad5SJay Sternberg 	struct device *dev;
12657dacad5SJay Sternberg 	struct kref kref;
12757dacad5SJay Sternberg 	int instance;
1285bae7f73SChristoph Hellwig 	struct blk_mq_tag_set *tagset;
1295bae7f73SChristoph Hellwig 	struct list_head namespaces;
13069d3b8acSChristoph Hellwig 	struct mutex namespaces_mutex;
1315bae7f73SChristoph Hellwig 	struct device *device;	/* char device */
132f3ca80fcSChristoph Hellwig 	struct list_head node;
133075790ebSKeith Busch 	struct ida ns_ida;
1341c63dc66SChristoph Hellwig 
1354f1244c8SChristoph Hellwig 	struct opal_dev *opal_dev;
136a98e58e5SScott Bauer 
13757dacad5SJay Sternberg 	char name[12];
13857dacad5SJay Sternberg 	char serial[20];
13957dacad5SJay Sternberg 	char model[40];
14057dacad5SJay Sternberg 	char firmware_rev[8];
14176e3914aSChristoph Hellwig 	u16 cntlid;
1425fd4ce1bSChristoph Hellwig 
1435fd4ce1bSChristoph Hellwig 	u32 ctrl_config;
1445fd4ce1bSChristoph Hellwig 
1455fd4ce1bSChristoph Hellwig 	u32 page_size;
14657dacad5SJay Sternberg 	u32 max_hw_sectors;
14757dacad5SJay Sternberg 	u16 oncs;
148118472abSKeith Busch 	u16 vid;
1498a9ae523SScott Bauer 	u16 oacs;
1506bf25d16SChristoph Hellwig 	atomic_t abort_limit;
15157dacad5SJay Sternberg 	u8 event_limit;
15257dacad5SJay Sternberg 	u8 vwc;
153f3ca80fcSChristoph Hellwig 	u32 vs;
15407bfcd09SChristoph Hellwig 	u32 sgls;
155038bd4cbSSagi Grimberg 	u16 kas;
156c5552fdeSAndy Lutomirski 	u8 npss;
157c5552fdeSAndy Lutomirski 	u8 apsta;
158038bd4cbSSagi Grimberg 	unsigned int kato;
159f3ca80fcSChristoph Hellwig 	bool subsystem;
160106198edSChristoph Hellwig 	unsigned long quirks;
161c5552fdeSAndy Lutomirski 	struct nvme_id_power_state psd[32];
1625955be21SChristoph Hellwig 	struct work_struct scan_work;
163f866fc42SChristoph Hellwig 	struct work_struct async_event_work;
164038bd4cbSSagi Grimberg 	struct delayed_work ka_work;
16507bfcd09SChristoph Hellwig 
166c5552fdeSAndy Lutomirski 	/* Power saving configuration */
167c5552fdeSAndy Lutomirski 	u64 ps_max_latency_us;
168c5552fdeSAndy Lutomirski 
16907bfcd09SChristoph Hellwig 	/* Fabrics only */
17007bfcd09SChristoph Hellwig 	u16 sqsize;
17107bfcd09SChristoph Hellwig 	u32 ioccsz;
17207bfcd09SChristoph Hellwig 	u32 iorcsz;
17307bfcd09SChristoph Hellwig 	u16 icdoff;
17407bfcd09SChristoph Hellwig 	u16 maxcmd;
17507bfcd09SChristoph Hellwig 	struct nvmf_ctrl_options *opts;
17657dacad5SJay Sternberg };
17757dacad5SJay Sternberg 
17857dacad5SJay Sternberg /*
17957dacad5SJay Sternberg  * An NVM Express namespace is equivalent to a SCSI LUN
18057dacad5SJay Sternberg  */
18157dacad5SJay Sternberg struct nvme_ns {
18257dacad5SJay Sternberg 	struct list_head list;
18357dacad5SJay Sternberg 
1841c63dc66SChristoph Hellwig 	struct nvme_ctrl *ctrl;
18557dacad5SJay Sternberg 	struct request_queue *queue;
18657dacad5SJay Sternberg 	struct gendisk *disk;
187b0b4e09cSMatias Bjørling 	struct nvm_dev *ndev;
18857dacad5SJay Sternberg 	struct kref kref;
189075790ebSKeith Busch 	int instance;
19057dacad5SJay Sternberg 
1912b9b6e86SKeith Busch 	u8 eui[8];
1922b9b6e86SKeith Busch 	u8 uuid[16];
1932b9b6e86SKeith Busch 
19457dacad5SJay Sternberg 	unsigned ns_id;
19557dacad5SJay Sternberg 	int lba_shift;
19657dacad5SJay Sternberg 	u16 ms;
19757dacad5SJay Sternberg 	bool ext;
19857dacad5SJay Sternberg 	u8 pi_type;
199646017a6SKeith Busch 	unsigned long flags;
200646017a6SKeith Busch 
201646017a6SKeith Busch #define NVME_NS_REMOVING 0
20269d9a99cSKeith Busch #define NVME_NS_DEAD     1
203646017a6SKeith Busch 
20457dacad5SJay Sternberg 	u64 mode_select_num_blocks;
20557dacad5SJay Sternberg 	u32 mode_select_block_len;
20657dacad5SJay Sternberg };
20757dacad5SJay Sternberg 
2081c63dc66SChristoph Hellwig struct nvme_ctrl_ops {
2091a353d85SMing Lin 	const char *name;
210e439bb12SSagi Grimberg 	struct module *module;
211d3d5b87dSChristoph Hellwig 	unsigned int flags;
212d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS			(1 << 0)
213c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED	(1 << 1)
2141c63dc66SChristoph Hellwig 	int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
2155fd4ce1bSChristoph Hellwig 	int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
2167fd8930fSChristoph Hellwig 	int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
217f3ca80fcSChristoph Hellwig 	int (*reset_ctrl)(struct nvme_ctrl *ctrl);
2181673f1f0SChristoph Hellwig 	void (*free_ctrl)(struct nvme_ctrl *ctrl);
219f866fc42SChristoph Hellwig 	void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx);
2201a353d85SMing Lin 	int (*delete_ctrl)(struct nvme_ctrl *ctrl);
2211a353d85SMing Lin 	const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl);
2221a353d85SMing Lin 	int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
22357dacad5SJay Sternberg };
22457dacad5SJay Sternberg 
2251c63dc66SChristoph Hellwig static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
2261c63dc66SChristoph Hellwig {
2271c63dc66SChristoph Hellwig 	u32 val = 0;
2281c63dc66SChristoph Hellwig 
2291c63dc66SChristoph Hellwig 	if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
2301c63dc66SChristoph Hellwig 		return false;
2311c63dc66SChristoph Hellwig 	return val & NVME_CSTS_RDY;
2321c63dc66SChristoph Hellwig }
2331c63dc66SChristoph Hellwig 
234f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
235f3ca80fcSChristoph Hellwig {
236f3ca80fcSChristoph Hellwig 	if (!ctrl->subsystem)
237f3ca80fcSChristoph Hellwig 		return -ENOTTY;
238f3ca80fcSChristoph Hellwig 	return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
239f3ca80fcSChristoph Hellwig }
240f3ca80fcSChristoph Hellwig 
24157dacad5SJay Sternberg static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
24257dacad5SJay Sternberg {
24357dacad5SJay Sternberg 	return (sector >> (ns->lba_shift - 9));
24457dacad5SJay Sternberg }
24557dacad5SJay Sternberg 
2466904242dSMing Lin static inline void nvme_cleanup_cmd(struct request *req)
2476904242dSMing Lin {
248f9d03f96SChristoph Hellwig 	if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
249f9d03f96SChristoph Hellwig 		kfree(page_address(req->special_vec.bv_page) +
250f9d03f96SChristoph Hellwig 		      req->special_vec.bv_offset);
251f9d03f96SChristoph Hellwig 	}
2526904242dSMing Lin }
2536904242dSMing Lin 
25427fa9bc5SChristoph Hellwig static inline void nvme_end_request(struct request *req, __le16 status,
25527fa9bc5SChristoph Hellwig 		union nvme_result result)
25615a190f7SChristoph Hellwig {
25727fa9bc5SChristoph Hellwig 	struct nvme_request *rq = nvme_req(req);
25827fa9bc5SChristoph Hellwig 
25927fa9bc5SChristoph Hellwig 	rq->status = le16_to_cpu(status) >> 1;
26027fa9bc5SChristoph Hellwig 	rq->result = result;
26108e0029aSChristoph Hellwig 	blk_mq_complete_request(req);
26215a190f7SChristoph Hellwig }
26315a190f7SChristoph Hellwig 
26477f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req);
265c55a2fd4SMing Lin void nvme_cancel_request(struct request *req, void *data, bool reserved);
266bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
267bb8d261eSChristoph Hellwig 		enum nvme_ctrl_state new_state);
2685fd4ce1bSChristoph Hellwig int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
2695fd4ce1bSChristoph Hellwig int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
2705fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
271f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
272f3ca80fcSChristoph Hellwig 		const struct nvme_ctrl_ops *ops, unsigned long quirks);
27353029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
2741673f1f0SChristoph Hellwig void nvme_put_ctrl(struct nvme_ctrl *ctrl);
2757fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl);
2765bae7f73SChristoph Hellwig 
2775955be21SChristoph Hellwig void nvme_queue_scan(struct nvme_ctrl *ctrl);
2785bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
2791673f1f0SChristoph Hellwig 
2804f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2814f1244c8SChristoph Hellwig 		bool send);
282a98e58e5SScott Bauer 
283f866fc42SChristoph Hellwig #define NVME_NR_AERS	1
2847bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
2857bf58533SChristoph Hellwig 		union nvme_result *res);
286f866fc42SChristoph Hellwig void nvme_queue_async_events(struct nvme_ctrl *ctrl);
287f866fc42SChristoph Hellwig 
28825646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl);
28925646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl);
29069d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl);
291302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl);
292302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl);
293302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
294302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl);
295363c9aacSSagi Grimberg 
296eb71f435SChristoph Hellwig #define NVME_QID_ANY -1
2974160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q,
298eb71f435SChristoph Hellwig 		struct nvme_command *cmd, unsigned int flags, int qid);
2998093f7caSMing Lin int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
3008093f7caSMing Lin 		struct nvme_command *cmd);
30157dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
30257dacad5SJay Sternberg 		void *buf, unsigned bufflen);
30357dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
304d49187e9SChristoph Hellwig 		union nvme_result *result, void *buffer, unsigned bufflen,
305eb71f435SChristoph Hellwig 		unsigned timeout, int qid, int at_head, int flags);
3064160982eSChristoph Hellwig int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
3074160982eSChristoph Hellwig 		void __user *ubuffer, unsigned bufflen, u32 *result,
3084160982eSChristoph Hellwig 		unsigned timeout);
3090b7f1f26SKeith Busch int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
3100b7f1f26SKeith Busch 		void __user *ubuffer, unsigned bufflen,
3110b7f1f26SKeith Busch 		void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
31257dacad5SJay Sternberg 		u32 *result, unsigned timeout);
3131c63dc66SChristoph Hellwig int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id);
3141c63dc66SChristoph Hellwig int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
31557dacad5SJay Sternberg 		struct nvme_id_ns **id);
3161c63dc66SChristoph Hellwig int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log);
3171c63dc66SChristoph Hellwig int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
3181a6fe74dSAndy Lutomirski 		      void *buffer, size_t buflen, u32 *result);
3191c63dc66SChristoph Hellwig int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
3201a6fe74dSAndy Lutomirski 		      void *buffer, size_t buflen, u32 *result);
3219a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
322038bd4cbSSagi Grimberg void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
323038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
32457dacad5SJay Sternberg 
32557dacad5SJay Sternberg struct sg_io_hdr;
32657dacad5SJay Sternberg 
32757dacad5SJay Sternberg int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
32857dacad5SJay Sternberg int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
32957dacad5SJay Sternberg int nvme_sg_get_version_num(int __user *ip);
33057dacad5SJay Sternberg 
331c4699e70SKeith Busch #ifdef CONFIG_NVM
332ca064085SMatias Bjørling int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
3333dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
334b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns);
3353dc87dd0SMatias Bjørling int nvme_nvm_register_sysfs(struct nvme_ns *ns);
3363dc87dd0SMatias Bjørling void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
33784d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
338c4699e70SKeith Busch #else
339b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
3403dc87dd0SMatias Bjørling 				    int node)
341c4699e70SKeith Busch {
342c4699e70SKeith Busch 	return 0;
343c4699e70SKeith Busch }
344c4699e70SKeith Busch 
345b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
3463dc87dd0SMatias Bjørling static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
3473dc87dd0SMatias Bjørling {
3483dc87dd0SMatias Bjørling 	return 0;
3493dc87dd0SMatias Bjørling }
3503dc87dd0SMatias Bjørling static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
351c4699e70SKeith Busch static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id)
352c4699e70SKeith Busch {
353c4699e70SKeith Busch 	return 0;
354c4699e70SKeith Busch }
35584d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
35684d4add7SMatias Bjørling 							unsigned long arg)
35784d4add7SMatias Bjørling {
35884d4add7SMatias Bjørling 	return -ENOTTY;
35984d4add7SMatias Bjørling }
3603dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */
3613dc87dd0SMatias Bjørling 
36240267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
36340267efdSSimon A. F. Lund {
36440267efdSSimon A. F. Lund 	return dev_to_disk(dev)->private_data;
36540267efdSSimon A. F. Lund }
366ca064085SMatias Bjørling 
3675bae7f73SChristoph Hellwig int __init nvme_core_init(void);
3685bae7f73SChristoph Hellwig void nvme_core_exit(void);
3695bae7f73SChristoph Hellwig 
37057dacad5SJay Sternberg #endif /* _NVME_H */
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