1bc50ad75SChristoph Hellwig /* SPDX-License-Identifier: GPL-2.0 */ 257dacad5SJay Sternberg /* 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg */ 557dacad5SJay Sternberg 657dacad5SJay Sternberg #ifndef _NVME_H 757dacad5SJay Sternberg #define _NVME_H 857dacad5SJay Sternberg 957dacad5SJay Sternberg #include <linux/nvme.h> 10a6a5149bSChristoph Hellwig #include <linux/cdev.h> 1157dacad5SJay Sternberg #include <linux/pci.h> 1257dacad5SJay Sternberg #include <linux/kref.h> 1357dacad5SJay Sternberg #include <linux/blk-mq.h> 14a98e58e5SScott Bauer #include <linux/sed-opal.h> 15b9e03857SThomas Tai #include <linux/fault-inject.h> 16978628ecSJohannes Thumshirn #include <linux/rcupdate.h> 17c1ac9a4bSKeith Busch #include <linux/wait.h> 184d2ce688SJames Smart #include <linux/t10-pi.h> 1957dacad5SJay Sternberg 2035fe0d12SHannes Reinecke #include <trace/events/block.h> 2135fe0d12SHannes Reinecke 22b668f2f5SMike Christie extern const struct pr_ops nvme_pr_ops; 23b668f2f5SMike Christie 248ae4e447SMarc Olson extern unsigned int nvme_io_timeout; 2557dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2657dacad5SJay Sternberg 278ae4e447SMarc Olson extern unsigned int admin_timeout; 28dc96f938SChaitanya Kulkarni #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 2921d34711SChristoph Hellwig 30038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 31038bd4cbSSagi Grimberg 3238e18002SIsrael Rukshin #ifdef CONFIG_ARCH_NO_SG_CHAIN 3338e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 0 34ba7ca2aeSIsrael Rukshin #define NVME_INLINE_METADATA_SG_CNT 0 3538e18002SIsrael Rukshin #else 3638e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 2 37ba7ca2aeSIsrael Rukshin #define NVME_INLINE_METADATA_SG_CNT 1 3838e18002SIsrael Rukshin #endif 3938e18002SIsrael Rukshin 406c3c05b0SChaitanya Kulkarni /* 416c3c05b0SChaitanya Kulkarni * Default to a 4K page size, with the intention to update this 426c3c05b0SChaitanya Kulkarni * path in the future to accommodate architectures with differing 436c3c05b0SChaitanya Kulkarni * kernel and IO page sizes. 446c3c05b0SChaitanya Kulkarni */ 456c3c05b0SChaitanya Kulkarni #define NVME_CTRL_PAGE_SHIFT 12 466c3c05b0SChaitanya Kulkarni #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 476c3c05b0SChaitanya Kulkarni 489a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 49b227c59bSRoy Shterman extern struct workqueue_struct *nvme_reset_wq; 50b227c59bSRoy Shterman extern struct workqueue_struct *nvme_delete_wq; 519a6327d2SSagi Grimberg 5257dacad5SJay Sternberg /* 53106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 54106198edSChristoph Hellwig * the standard. 5557dacad5SJay Sternberg */ 56106198edSChristoph Hellwig enum nvme_quirks { 57106198edSChristoph Hellwig /* 58106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 59106198edSChristoph Hellwig * specific Identify field. 60106198edSChristoph Hellwig */ 61106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 62540c801cSKeith Busch 63540c801cSKeith Busch /* 64540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 65540c801cSKeith Busch * correctly. 66540c801cSKeith Busch */ 67540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 6808095e70SKeith Busch 6908095e70SKeith Busch /* 70e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 71e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 7208095e70SKeith Busch */ 73e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 7454adc010SGuilherme G. Piccoli 7554adc010SGuilherme G. Piccoli /* 7654adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 7754adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 7854adc010SGuilherme G. Piccoli */ 7954adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 80c5552fdeSAndy Lutomirski 81c5552fdeSAndy Lutomirski /* 82c5552fdeSAndy Lutomirski * APST should not be used. 83c5552fdeSAndy Lutomirski */ 84c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 85ff5350a8SAndy Lutomirski 86ff5350a8SAndy Lutomirski /* 87ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 88ff5350a8SAndy Lutomirski */ 89ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 90608cc4b1SChristoph Hellwig 91608cc4b1SChristoph Hellwig /* 929abd68efSJens Axboe * Set MEDIUM priority on SQ creation 939abd68efSJens Axboe */ 949abd68efSJens Axboe NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 956299358dSJames Dingwall 966299358dSJames Dingwall /* 976299358dSJames Dingwall * Ignore device provided subnqn. 986299358dSJames Dingwall */ 996299358dSJames Dingwall NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 1007b210e4eSChristoph Hellwig 1017b210e4eSChristoph Hellwig /* 1027b210e4eSChristoph Hellwig * Broken Write Zeroes. 1037b210e4eSChristoph Hellwig */ 1047b210e4eSChristoph Hellwig NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 105cb32de1bSMario Limonciello 106cb32de1bSMario Limonciello /* 107cb32de1bSMario Limonciello * Force simple suspend/resume path. 108cb32de1bSMario Limonciello */ 109cb32de1bSMario Limonciello NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 1107ad67ca5SLinus Torvalds 1117ad67ca5SLinus Torvalds /* 11266341331SBenjamin Herrenschmidt * Use only one interrupt vector for all queues 11366341331SBenjamin Herrenschmidt */ 1147ad67ca5SLinus Torvalds NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 11566341331SBenjamin Herrenschmidt 11666341331SBenjamin Herrenschmidt /* 11766341331SBenjamin Herrenschmidt * Use non-standard 128 bytes SQEs. 11866341331SBenjamin Herrenschmidt */ 1197ad67ca5SLinus Torvalds NVME_QUIRK_128_BYTES_SQES = (1 << 12), 120d38e9f04SBenjamin Herrenschmidt 121d38e9f04SBenjamin Herrenschmidt /* 122d38e9f04SBenjamin Herrenschmidt * Prevent tag overlap between queues 123d38e9f04SBenjamin Herrenschmidt */ 1247ad67ca5SLinus Torvalds NVME_QUIRK_SHARED_TAGS = (1 << 13), 1256c6aa2f2SAkinobu Mita 1266c6aa2f2SAkinobu Mita /* 1276c6aa2f2SAkinobu Mita * Don't change the value of the temperature threshold feature 1286c6aa2f2SAkinobu Mita */ 1296c6aa2f2SAkinobu Mita NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 1305bedd3afSChristoph Hellwig 1315bedd3afSChristoph Hellwig /* 1325bedd3afSChristoph Hellwig * The controller doesn't handle the Identify Namespace 1335bedd3afSChristoph Hellwig * Identification Descriptor list subcommand despite claiming 1345bedd3afSChristoph Hellwig * NVMe 1.3 compliance. 1355bedd3afSChristoph Hellwig */ 1365bedd3afSChristoph Hellwig NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 1374bdf2603SFilippo Sironi 1384bdf2603SFilippo Sironi /* 1394bdf2603SFilippo Sironi * The controller does not properly handle DMA addresses over 1404bdf2603SFilippo Sironi * 48 bits. 1414bdf2603SFilippo Sironi */ 1424bdf2603SFilippo Sironi NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 143a2941f6aSKeith Busch 144a2941f6aSKeith Busch /* 145b7df575fSXiang wangx * The controller requires the command_id value be limited, so skip 146a2941f6aSKeith Busch * encoding the generation sequence number. 147a2941f6aSKeith Busch */ 148a2941f6aSKeith Busch NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 14900ff400eSChristoph Hellwig 15000ff400eSChristoph Hellwig /* 15100ff400eSChristoph Hellwig * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 15200ff400eSChristoph Hellwig */ 15300ff400eSChristoph Hellwig NVME_QUIRK_BOGUS_NID = (1 << 18), 154bd375feeSHristo Venev 155bd375feeSHristo Venev /* 156bd375feeSHristo Venev * No temperature thresholds for channels other than 0 (Composite). 157bd375feeSHristo Venev */ 158bd375feeSHristo Venev NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 159dd864f6eSGeorg Gottleuber 160dd864f6eSGeorg Gottleuber /* 161dd864f6eSGeorg Gottleuber * Disables simple suspend/resume path. 162dd864f6eSGeorg Gottleuber */ 163dd864f6eSGeorg Gottleuber NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 164106198edSChristoph Hellwig }; 165106198edSChristoph Hellwig 166d49187e9SChristoph Hellwig /* 167d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 168d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 169d49187e9SChristoph Hellwig */ 170d49187e9SChristoph Hellwig struct nvme_request { 171d49187e9SChristoph Hellwig struct nvme_command *cmd; 172d49187e9SChristoph Hellwig union nvme_result result; 173e7006de6SSagi Grimberg u8 genctr; 17444e44b29SChristoph Hellwig u8 retries; 17527fa9bc5SChristoph Hellwig u8 flags; 17627fa9bc5SChristoph Hellwig u16 status; 177d4d957b5SSagi Grimberg #ifdef CONFIG_NVME_MULTIPATH 178d4d957b5SSagi Grimberg unsigned long start_time; 179d4d957b5SSagi Grimberg #endif 18059e29ce6SSagi Grimberg struct nvme_ctrl *ctrl; 18127fa9bc5SChristoph Hellwig }; 18227fa9bc5SChristoph Hellwig 18332acab31SChristoph Hellwig /* 18432acab31SChristoph Hellwig * Mark a bio as coming in through the mpath node. 18532acab31SChristoph Hellwig */ 18632acab31SChristoph Hellwig #define REQ_NVME_MPATH REQ_DRV 18732acab31SChristoph Hellwig 18827fa9bc5SChristoph Hellwig enum { 18927fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 190bb06ec31SJames Smart NVME_REQ_USERCMD = (1 << 1), 191d4d957b5SSagi Grimberg NVME_MPATH_IO_STATS = (1 << 2), 192d49187e9SChristoph Hellwig }; 193d49187e9SChristoph Hellwig 194d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 195d49187e9SChristoph Hellwig { 196d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 197d49187e9SChristoph Hellwig } 198d49187e9SChristoph Hellwig 1995d87eb94SKeith Busch static inline u16 nvme_req_qid(struct request *req) 2005d87eb94SKeith Busch { 201643c476dSKeith Busch if (!req->q->queuedata) 2025d87eb94SKeith Busch return 0; 20384115d6dSBaolin Wang 20484115d6dSBaolin Wang return req->mq_hctx->queue_num + 1; 2055d87eb94SKeith Busch } 2065d87eb94SKeith Busch 20754adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 20854adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 20954adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 21054adc010SGuilherme G. Piccoli * found empirically. 21154adc010SGuilherme G. Piccoli */ 2128c97eeccSJeff Lien #define NVME_QUIRK_DELAY_AMOUNT 2300 21354adc010SGuilherme G. Piccoli 2144212f4e9SSagi Grimberg /* 2154212f4e9SSagi Grimberg * enum nvme_ctrl_state: Controller state 2164212f4e9SSagi Grimberg * 2174212f4e9SSagi Grimberg * @NVME_CTRL_NEW: New controller just allocated, initial state 2184212f4e9SSagi Grimberg * @NVME_CTRL_LIVE: Controller is connected and I/O capable 2194212f4e9SSagi Grimberg * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 2204212f4e9SSagi Grimberg * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 2214212f4e9SSagi Grimberg * transport 2224212f4e9SSagi Grimberg * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 223ecca390eSSagi Grimberg * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 224ecca390eSSagi Grimberg * disabled/failed immediately. This state comes 225ecca390eSSagi Grimberg * after all async event processing took place and 226ecca390eSSagi Grimberg * before ns removal and the controller deletion 227ecca390eSSagi Grimberg * progress 2284212f4e9SSagi Grimberg * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 2294212f4e9SSagi Grimberg * shutdown or removal. In this case we forcibly 2304212f4e9SSagi Grimberg * kill all inflight I/O as they have no chance to 2314212f4e9SSagi Grimberg * complete 2324212f4e9SSagi Grimberg */ 233bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 234bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 235bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 236bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 237ad6a0a52SMax Gurtovoy NVME_CTRL_CONNECTING, 238bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 239ecca390eSSagi Grimberg NVME_CTRL_DELETING_NOIO, 2400ff9d4e1SKeith Busch NVME_CTRL_DEAD, 241bb8d261eSChristoph Hellwig }; 242bb8d261eSChristoph Hellwig 243a3646451SAkinobu Mita struct nvme_fault_inject { 244a3646451SAkinobu Mita #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 245a3646451SAkinobu Mita struct fault_attr attr; 246a3646451SAkinobu Mita struct dentry *parent; 247a3646451SAkinobu Mita bool dont_retry; /* DNR, do not retry */ 248a3646451SAkinobu Mita u16 status; /* status code */ 249a3646451SAkinobu Mita #endif 250a3646451SAkinobu Mita }; 251a3646451SAkinobu Mita 252bf093d97SSagi Grimberg enum nvme_ctrl_flags { 253bf093d97SSagi Grimberg NVME_CTRL_FAILFAST_EXPIRED = 0, 254bf093d97SSagi Grimberg NVME_CTRL_ADMIN_Q_STOPPED = 1, 255f46ef9e8SSagi Grimberg NVME_CTRL_STARTED_ONCE = 2, 25698d81f0dSChao Leng NVME_CTRL_STOPPED = 3, 257c917dd96SKeith Busch NVME_CTRL_SKIP_ID_CNS_CS = 4, 258d0dd594bSBreno Leitao NVME_CTRL_DIRTY_CAPABILITY = 5, 259*c52d545cSBitao Hu NVME_CTRL_FROZEN = 6, 260bf093d97SSagi Grimberg }; 261bf093d97SSagi Grimberg 2621c63dc66SChristoph Hellwig struct nvme_ctrl { 2636e3ca03eSSagi Grimberg bool comp_seen; 264bd4da3abSAndy Lutomirski bool identified; 2659d217fb0SChristophe JAILLET enum nvme_ctrl_state state; 266bb8d261eSChristoph Hellwig spinlock_t lock; 267e7ad43c3SKeith Busch struct mutex scan_lock; 2681c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 26957dacad5SJay Sternberg struct request_queue *admin_q; 27007bfcd09SChristoph Hellwig struct request_queue *connect_q; 271e7832cb4SSagi Grimberg struct request_queue *fabrics_q; 27257dacad5SJay Sternberg struct device *dev; 27357dacad5SJay Sternberg int instance; 274103e515eSHannes Reinecke int numa_node; 2755bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 27634b6c231SSagi Grimberg struct blk_mq_tag_set *admin_tagset; 2775bae7f73SChristoph Hellwig struct list_head namespaces; 278765cc031SJianchao Wang struct rw_semaphore namespaces_rwsem; 279d22524a4SChristoph Hellwig struct device ctrl_device; 2805bae7f73SChristoph Hellwig struct device *device; /* char device */ 281ed7770f6SHannes Reinecke #ifdef CONFIG_NVME_HWMON 282ed7770f6SHannes Reinecke struct device *hwmon_device; 283ed7770f6SHannes Reinecke #endif 284a6a5149bSChristoph Hellwig struct cdev cdev; 285d86c4d8eSChristoph Hellwig struct work_struct reset_work; 286c5017e85SChristoph Hellwig struct work_struct delete_work; 287c1ac9a4bSKeith Busch wait_queue_head_t state_wq; 2881c63dc66SChristoph Hellwig 289ab9e00ccSChristoph Hellwig struct nvme_subsystem *subsys; 290ab9e00ccSChristoph Hellwig struct list_head subsys_entry; 291ab9e00ccSChristoph Hellwig 2924f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 293a98e58e5SScott Bauer 29457dacad5SJay Sternberg char name[12]; 29576e3914aSChristoph Hellwig u16 cntlid; 2965fd4ce1bSChristoph Hellwig 297b6dccf7fSArnav Dawn u16 mtfa; 2989d217fb0SChristophe JAILLET u32 ctrl_config; 299d858e5f0SSagi Grimberg u32 queue_count; 3005fd4ce1bSChristoph Hellwig 30120d0dfe6SSagi Grimberg u64 cap; 30257dacad5SJay Sternberg u32 max_hw_sectors; 303943e942eSJens Axboe u32 max_segments; 30495093350SMax Gurtovoy u32 max_integrity_segments; 3055befc7c2SKeith Busch u32 max_discard_sectors; 3065befc7c2SKeith Busch u32 max_discard_segments; 3075befc7c2SKeith Busch u32 max_zeroes_sectors; 308240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 309240e6ee2SKeith Busch u32 max_zone_append; 310240e6ee2SKeith Busch #endif 31149cd84b6SKeith Busch u16 crdt[3]; 31257dacad5SJay Sternberg u16 oncs; 3131a86924eSTom Yan u32 dmrsl; 3148a9ae523SScott Bauer u16 oacs; 315f968688fSKeith Busch u16 sqsize; 3160d0b660fSChristoph Hellwig u32 max_namespaces; 3176bf25d16SChristoph Hellwig atomic_t abort_limit; 31857dacad5SJay Sternberg u8 vwc; 319f3ca80fcSChristoph Hellwig u32 vs; 32007bfcd09SChristoph Hellwig u32 sgls; 321038bd4cbSSagi Grimberg u16 kas; 322c5552fdeSAndy Lutomirski u8 npss; 323c5552fdeSAndy Lutomirski u8 apsta; 324400b6a7bSGuenter Roeck u16 wctemp; 325400b6a7bSGuenter Roeck u16 cctemp; 326c0561f82SHannes Reinecke u32 oaes; 327e3d7874dSKeith Busch u32 aen_result; 3283e53ba38SSagi Grimberg u32 ctratt; 32907fbd32aSMartin K. Petersen unsigned int shutdown_timeout; 330038bd4cbSSagi Grimberg unsigned int kato; 331f3ca80fcSChristoph Hellwig bool subsystem; 332106198edSChristoph Hellwig unsigned long quirks; 333c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 33484fef62dSKeith Busch struct nvme_effects_log *effects; 3351cf7a12eSChaitanya Kulkarni struct xarray cels; 3365955be21SChristoph Hellwig struct work_struct scan_work; 337f866fc42SChristoph Hellwig struct work_struct async_event_work; 338038bd4cbSSagi Grimberg struct delayed_work ka_work; 3398c4dfea9SVictor Gladkov struct delayed_work failfast_work; 3400a34e466SRoland Dreier struct nvme_command ka_cmd; 341774a9636SUday Shankar unsigned long ka_last_check_time; 342b6dccf7fSArnav Dawn struct work_struct fw_act_work; 34330d90964SChristoph Hellwig unsigned long events; 34407bfcd09SChristoph Hellwig 3450d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 3460d0b660fSChristoph Hellwig /* asymmetric namespace access: */ 3470d0b660fSChristoph Hellwig u8 anacap; 3480d0b660fSChristoph Hellwig u8 anatt; 3490d0b660fSChristoph Hellwig u32 anagrpmax; 3500d0b660fSChristoph Hellwig u32 nanagrpid; 3510d0b660fSChristoph Hellwig struct mutex ana_lock; 3520d0b660fSChristoph Hellwig struct nvme_ana_rsp_hdr *ana_log_buf; 3530d0b660fSChristoph Hellwig size_t ana_log_size; 3540d0b660fSChristoph Hellwig struct timer_list anatt_timer; 3550d0b660fSChristoph Hellwig struct work_struct ana_work; 3560d0b660fSChristoph Hellwig #endif 3570d0b660fSChristoph Hellwig 358f50fff73SHannes Reinecke #ifdef CONFIG_NVME_AUTH 359f50fff73SHannes Reinecke struct work_struct dhchap_auth_work; 360f50fff73SHannes Reinecke struct mutex dhchap_auth_mutex; 361aa36d711SSagi Grimberg struct nvme_dhchap_queue_context *dhchap_ctxs; 362f50fff73SHannes Reinecke struct nvme_dhchap_key *host_key; 363f50fff73SHannes Reinecke struct nvme_dhchap_key *ctrl_key; 364f50fff73SHannes Reinecke u16 transaction; 365f50fff73SHannes Reinecke #endif 366f50fff73SHannes Reinecke 367c5552fdeSAndy Lutomirski /* Power saving configuration */ 368c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 36976a5af84SKai-Heng Feng bool apst_enabled; 370c5552fdeSAndy Lutomirski 371044a9df1SChristoph Hellwig /* PCIe only: */ 3729d217fb0SChristophe JAILLET u16 hmmaxd; 373fe6d53c9SChristoph Hellwig u32 hmpre; 374fe6d53c9SChristoph Hellwig u32 hmmin; 375044a9df1SChristoph Hellwig u32 hmminds; 376fe6d53c9SChristoph Hellwig 37707bfcd09SChristoph Hellwig /* Fabrics only */ 37807bfcd09SChristoph Hellwig u32 ioccsz; 37907bfcd09SChristoph Hellwig u32 iorcsz; 38007bfcd09SChristoph Hellwig u16 icdoff; 38107bfcd09SChristoph Hellwig u16 maxcmd; 382fdf9dfa8SSagi Grimberg int nr_reconnects; 3838c4dfea9SVictor Gladkov unsigned long flags; 38407bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 385cb5b7262SJens Axboe 386cb5b7262SJens Axboe struct page *discard_page; 387cb5b7262SJens Axboe unsigned long discard_page_busy; 388f79d5fdaSAkinobu Mita 389f79d5fdaSAkinobu Mita struct nvme_fault_inject fault_inject; 39086c2457aSMartin Belanger 39186c2457aSMartin Belanger enum nvme_ctrl_type cntrltype; 39286c2457aSMartin Belanger enum nvme_dctype dctype; 39357dacad5SJay Sternberg }; 39457dacad5SJay Sternberg 395cc5b051eSKeith Busch static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl) 396cc5b051eSKeith Busch { 397cc5b051eSKeith Busch return READ_ONCE(ctrl->state); 398cc5b051eSKeith Busch } 399cc5b051eSKeith Busch 40075c10e73SHannes Reinecke enum nvme_iopolicy { 40175c10e73SHannes Reinecke NVME_IOPOLICY_NUMA, 40275c10e73SHannes Reinecke NVME_IOPOLICY_RR, 40375c10e73SHannes Reinecke }; 40475c10e73SHannes Reinecke 405ab9e00ccSChristoph Hellwig struct nvme_subsystem { 406ab9e00ccSChristoph Hellwig int instance; 407ab9e00ccSChristoph Hellwig struct device dev; 408ab9e00ccSChristoph Hellwig /* 409ab9e00ccSChristoph Hellwig * Because we unregister the device on the last put we need 410ab9e00ccSChristoph Hellwig * a separate refcount. 411ab9e00ccSChristoph Hellwig */ 412ab9e00ccSChristoph Hellwig struct kref ref; 413ab9e00ccSChristoph Hellwig struct list_head entry; 414ab9e00ccSChristoph Hellwig struct mutex lock; 415ab9e00ccSChristoph Hellwig struct list_head ctrls; 416ed754e5dSChristoph Hellwig struct list_head nsheads; 417ab9e00ccSChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 418ab9e00ccSChristoph Hellwig char serial[20]; 419ab9e00ccSChristoph Hellwig char model[40]; 420ab9e00ccSChristoph Hellwig char firmware_rev[8]; 421ab9e00ccSChristoph Hellwig u8 cmic; 422954ae166SHannes Reinecke enum nvme_subsys_type subtype; 423ab9e00ccSChristoph Hellwig u16 vendor_id; 42481adb863SBart Van Assche u16 awupf; /* 0's based awupf value. */ 425ed754e5dSChristoph Hellwig struct ida ns_ida; 42675c10e73SHannes Reinecke #ifdef CONFIG_NVME_MULTIPATH 42775c10e73SHannes Reinecke enum nvme_iopolicy iopolicy; 42875c10e73SHannes Reinecke #endif 429ab9e00ccSChristoph Hellwig }; 430ab9e00ccSChristoph Hellwig 431002fab04SChristoph Hellwig /* 432002fab04SChristoph Hellwig * Container structure for uniqueue namespace identifiers. 433002fab04SChristoph Hellwig */ 434002fab04SChristoph Hellwig struct nvme_ns_ids { 435002fab04SChristoph Hellwig u8 eui64[8]; 436002fab04SChristoph Hellwig u8 nguid[16]; 437002fab04SChristoph Hellwig uuid_t uuid; 43871010c30SNiklas Cassel u8 csi; 439002fab04SChristoph Hellwig }; 440002fab04SChristoph Hellwig 441ed754e5dSChristoph Hellwig /* 442ed754e5dSChristoph Hellwig * Anchor structure for namespaces. There is one for each namespace in a 443ed754e5dSChristoph Hellwig * NVMe subsystem that any of our controllers can see, and the namespace 444ed754e5dSChristoph Hellwig * structure for each controller is chained of it. For private namespaces 445ed754e5dSChristoph Hellwig * there is a 1:1 relation to our namespace structures, that is ->list 446ed754e5dSChristoph Hellwig * only ever has a single entry for private namespaces. 447ed754e5dSChristoph Hellwig */ 448ed754e5dSChristoph Hellwig struct nvme_ns_head { 449ed754e5dSChristoph Hellwig struct list_head list; 450ed754e5dSChristoph Hellwig struct srcu_struct srcu; 451ed754e5dSChristoph Hellwig struct nvme_subsystem *subsys; 452ed754e5dSChristoph Hellwig unsigned ns_id; 453ed754e5dSChristoph Hellwig struct nvme_ns_ids ids; 454ed754e5dSChristoph Hellwig struct list_head entry; 455ed754e5dSChristoph Hellwig struct kref ref; 4560c284db7SKeith Busch bool shared; 457ed754e5dSChristoph Hellwig int instance; 458be93e87eSKeith Busch struct nvme_effects_log *effects; 4592637baedSMinwoo Im 4602637baedSMinwoo Im struct cdev cdev; 4612637baedSMinwoo Im struct device cdev_device; 4622637baedSMinwoo Im 463f3334447SChristoph Hellwig struct gendisk *disk; 46430897388SMinwoo Im #ifdef CONFIG_NVME_MULTIPATH 465f3334447SChristoph Hellwig struct bio_list requeue_list; 466f3334447SChristoph Hellwig spinlock_t requeue_lock; 467f3334447SChristoph Hellwig struct work_struct requeue_work; 468f3334447SChristoph Hellwig struct mutex lock; 469d8a22f85SAnton Eidelman unsigned long flags; 470d8a22f85SAnton Eidelman #define NVME_NSHEAD_DISK_LIVE 0 471f3334447SChristoph Hellwig struct nvme_ns __rcu *current_path[]; 472f3334447SChristoph Hellwig #endif 473ed754e5dSChristoph Hellwig }; 474ed754e5dSChristoph Hellwig 47530897388SMinwoo Im static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 47630897388SMinwoo Im { 47730897388SMinwoo Im return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 47830897388SMinwoo Im } 47930897388SMinwoo Im 480ffc89b1dSMax Gurtovoy enum nvme_ns_features { 481ffc89b1dSMax Gurtovoy NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 482b29f8485SMax Gurtovoy NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 4831b96f862SChristoph Hellwig NVME_NS_DEAC, /* DEAC bit in Write Zeores supported */ 484ffc89b1dSMax Gurtovoy }; 485ffc89b1dSMax Gurtovoy 48657dacad5SJay Sternberg struct nvme_ns { 48757dacad5SJay Sternberg struct list_head list; 48857dacad5SJay Sternberg 4891c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 49057dacad5SJay Sternberg struct request_queue *queue; 49157dacad5SJay Sternberg struct gendisk *disk; 4920d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 4930d0b660fSChristoph Hellwig enum nvme_ana_state ana_state; 4940d0b660fSChristoph Hellwig u32 ana_grpid; 4950d0b660fSChristoph Hellwig #endif 496ed754e5dSChristoph Hellwig struct list_head siblings; 49757dacad5SJay Sternberg struct kref kref; 498ed754e5dSChristoph Hellwig struct nvme_ns_head *head; 49957dacad5SJay Sternberg 50057dacad5SJay Sternberg int lba_shift; 50157dacad5SJay Sternberg u16 ms; 5024020aad8SKeith Busch u16 pi_size; 503f5d11840SJens Axboe u16 sgs; 504f5d11840SJens Axboe u32 sws; 50557dacad5SJay Sternberg u8 pi_type; 5064020aad8SKeith Busch u8 guard_type; 507240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 508240e6ee2SKeith Busch u64 zsze; 509240e6ee2SKeith Busch #endif 510ffc89b1dSMax Gurtovoy unsigned long features; 511646017a6SKeith Busch unsigned long flags; 512646017a6SKeith Busch #define NVME_NS_REMOVING 0 5130d0b660fSChristoph Hellwig #define NVME_NS_ANA_PENDING 2 5142f4c9ba2SJavier González #define NVME_NS_FORCE_RO 3 515e7d65803SHannes Reinecke #define NVME_NS_READY 4 516b9e03857SThomas Tai 5172637baedSMinwoo Im struct cdev cdev; 5182637baedSMinwoo Im struct device cdev_device; 5192637baedSMinwoo Im 520b9e03857SThomas Tai struct nvme_fault_inject fault_inject; 521b9e03857SThomas Tai 52257dacad5SJay Sternberg }; 52357dacad5SJay Sternberg 5244d2ce688SJames Smart /* NVMe ns supports metadata actions by the controller (generate/strip) */ 5254d2ce688SJames Smart static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 5264d2ce688SJames Smart { 5274020aad8SKeith Busch return ns->pi_type && ns->ms == ns->pi_size; 5284d2ce688SJames Smart } 5294d2ce688SJames Smart 5301c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 5311a353d85SMing Lin const char *name; 532e439bb12SSagi Grimberg struct module *module; 533d3d5b87dSChristoph Hellwig unsigned int flags; 534d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 535c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 536db45e1a5SChristoph Hellwig #define NVME_F_BLOCKING (1 << 2) 537db45e1a5SChristoph Hellwig 53886adbf0cSChristoph Hellwig const struct attribute_group **dev_attr_groups; 5391c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 5405fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 5417fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 5421673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 543ad22c355SKeith Busch void (*submit_async_event)(struct nvme_ctrl *ctrl); 544c5017e85SChristoph Hellwig void (*delete_ctrl)(struct nvme_ctrl *ctrl); 545f7f70f4aSRuozhu Li void (*stop_ctrl)(struct nvme_ctrl *ctrl); 5461a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 5472f0dad17SKeith Busch void (*print_device_info)(struct nvme_ctrl *ctrl); 5482f859441SLogan Gunthorpe bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 54957dacad5SJay Sternberg }; 55057dacad5SJay Sternberg 551e7006de6SSagi Grimberg /* 552e7006de6SSagi Grimberg * nvme command_id is constructed as such: 553e7006de6SSagi Grimberg * | xxxx | xxxxxxxxxxxx | 554e7006de6SSagi Grimberg * gen request tag 555e7006de6SSagi Grimberg */ 556e7006de6SSagi Grimberg #define nvme_genctr_mask(gen) (gen & 0xf) 557e7006de6SSagi Grimberg #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 558e7006de6SSagi Grimberg #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 559e7006de6SSagi Grimberg #define nvme_tag_from_cid(cid) (cid & 0xfff) 560e7006de6SSagi Grimberg 561e7006de6SSagi Grimberg static inline u16 nvme_cid(struct request *rq) 562e7006de6SSagi Grimberg { 563e7006de6SSagi Grimberg return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 564e7006de6SSagi Grimberg } 565e7006de6SSagi Grimberg 566e7006de6SSagi Grimberg static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 567e7006de6SSagi Grimberg u16 command_id) 568e7006de6SSagi Grimberg { 569e7006de6SSagi Grimberg u8 genctr = nvme_genctr_from_cid(command_id); 570e7006de6SSagi Grimberg u16 tag = nvme_tag_from_cid(command_id); 571e7006de6SSagi Grimberg struct request *rq; 572e7006de6SSagi Grimberg 573e7006de6SSagi Grimberg rq = blk_mq_tag_to_rq(tags, tag); 574e7006de6SSagi Grimberg if (unlikely(!rq)) { 575e7006de6SSagi Grimberg pr_err("could not locate request for tag %#x\n", 576e7006de6SSagi Grimberg tag); 577e7006de6SSagi Grimberg return NULL; 578e7006de6SSagi Grimberg } 579e7006de6SSagi Grimberg if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 580e7006de6SSagi Grimberg dev_err(nvme_req(rq)->ctrl->device, 581e7006de6SSagi Grimberg "request %#x genctr mismatch (got %#x expected %#x)\n", 582e7006de6SSagi Grimberg tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 583e7006de6SSagi Grimberg return NULL; 584e7006de6SSagi Grimberg } 585e7006de6SSagi Grimberg return rq; 586e7006de6SSagi Grimberg } 587e7006de6SSagi Grimberg 588e7006de6SSagi Grimberg static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 589e7006de6SSagi Grimberg u16 command_id) 590e7006de6SSagi Grimberg { 591e7006de6SSagi Grimberg return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 592e7006de6SSagi Grimberg } 593e7006de6SSagi Grimberg 5942f0dad17SKeith Busch /* 5952f0dad17SKeith Busch * Return the length of the string without the space padding 5962f0dad17SKeith Busch */ 5972f0dad17SKeith Busch static inline int nvme_strlen(char *s, int len) 5982f0dad17SKeith Busch { 5992f0dad17SKeith Busch while (s[len - 1] == ' ') 6002f0dad17SKeith Busch len--; 6012f0dad17SKeith Busch return len; 6022f0dad17SKeith Busch } 6032f0dad17SKeith Busch 6042f0dad17SKeith Busch static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 6052f0dad17SKeith Busch { 6062f0dad17SKeith Busch struct nvme_subsystem *subsys = ctrl->subsys; 6072f0dad17SKeith Busch 6082f0dad17SKeith Busch if (ctrl->ops->print_device_info) { 6092f0dad17SKeith Busch ctrl->ops->print_device_info(ctrl); 6102f0dad17SKeith Busch return; 6112f0dad17SKeith Busch } 6122f0dad17SKeith Busch 6132f0dad17SKeith Busch dev_err(ctrl->device, 6142f0dad17SKeith Busch "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 6152f0dad17SKeith Busch nvme_strlen(subsys->model, sizeof(subsys->model)), 6162f0dad17SKeith Busch subsys->model, nvme_strlen(subsys->firmware_rev, 6172f0dad17SKeith Busch sizeof(subsys->firmware_rev)), 6182f0dad17SKeith Busch subsys->firmware_rev); 6192f0dad17SKeith Busch } 6202f0dad17SKeith Busch 621b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 622a3646451SAkinobu Mita void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 623a3646451SAkinobu Mita const char *dev_name); 624a3646451SAkinobu Mita void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 625b9e03857SThomas Tai void nvme_should_fail(struct request *req); 626b9e03857SThomas Tai #else 627a3646451SAkinobu Mita static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 628a3646451SAkinobu Mita const char *dev_name) 629a3646451SAkinobu Mita { 630a3646451SAkinobu Mita } 631a3646451SAkinobu Mita static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 632a3646451SAkinobu Mita { 633a3646451SAkinobu Mita } 634b9e03857SThomas Tai static inline void nvme_should_fail(struct request *req) {} 635b9e03857SThomas Tai #endif 636b9e03857SThomas Tai 6371e866afdSKeith Busch bool nvme_wait_reset(struct nvme_ctrl *ctrl); 6381e866afdSKeith Busch int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 6391e866afdSKeith Busch 640f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 641f3ca80fcSChristoph Hellwig { 6421e866afdSKeith Busch int ret; 6431e866afdSKeith Busch 644f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 645f3ca80fcSChristoph Hellwig return -ENOTTY; 6461e866afdSKeith Busch if (!nvme_wait_reset(ctrl)) 6471e866afdSKeith Busch return -EBUSY; 6481e866afdSKeith Busch 6491e866afdSKeith Busch ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 6501e866afdSKeith Busch if (ret) 6511e866afdSKeith Busch return ret; 6521e866afdSKeith Busch 6531e866afdSKeith Busch return nvme_try_sched_reset(ctrl); 654f3ca80fcSChristoph Hellwig } 655f3ca80fcSChristoph Hellwig 656314d48ddSDamien Le Moal /* 657314d48ddSDamien Le Moal * Convert a 512B sector number to a device logical block number. 658314d48ddSDamien Le Moal */ 659314d48ddSDamien Le Moal static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 66057dacad5SJay Sternberg { 661314d48ddSDamien Le Moal return sector >> (ns->lba_shift - SECTOR_SHIFT); 66257dacad5SJay Sternberg } 66357dacad5SJay Sternberg 664e08f2ae8SDamien Le Moal /* 665e08f2ae8SDamien Le Moal * Convert a device logical block number to a 512B sector number. 666e08f2ae8SDamien Le Moal */ 667e08f2ae8SDamien Le Moal static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 668e08f2ae8SDamien Le Moal { 669e08f2ae8SDamien Le Moal return lba << (ns->lba_shift - SECTOR_SHIFT); 67057dacad5SJay Sternberg } 67157dacad5SJay Sternberg 67271fb90ebSKeith Busch /* 67371fb90ebSKeith Busch * Convert byte length to nvme's 0-based num dwords 67471fb90ebSKeith Busch */ 67571fb90ebSKeith Busch static inline u32 nvme_bytes_to_numd(size_t len) 67671fb90ebSKeith Busch { 67771fb90ebSKeith Busch return (len >> 2) - 1; 67871fb90ebSKeith Busch } 67971fb90ebSKeith Busch 6805ddaabe8SChristoph Hellwig static inline bool nvme_is_ana_error(u16 status) 6815ddaabe8SChristoph Hellwig { 6825ddaabe8SChristoph Hellwig switch (status & 0x7ff) { 6835ddaabe8SChristoph Hellwig case NVME_SC_ANA_TRANSITION: 6845ddaabe8SChristoph Hellwig case NVME_SC_ANA_INACCESSIBLE: 6855ddaabe8SChristoph Hellwig case NVME_SC_ANA_PERSISTENT_LOSS: 6865ddaabe8SChristoph Hellwig return true; 6875ddaabe8SChristoph Hellwig default: 6885ddaabe8SChristoph Hellwig return false; 6895ddaabe8SChristoph Hellwig } 6905ddaabe8SChristoph Hellwig } 6915ddaabe8SChristoph Hellwig 6925ddaabe8SChristoph Hellwig static inline bool nvme_is_path_error(u16 status) 6935ddaabe8SChristoph Hellwig { 6941e41f3bdSChristoph Hellwig /* check for a status code type of 'path related status' */ 6951e41f3bdSChristoph Hellwig return (status & 0x700) == 0x300; 6965ddaabe8SChristoph Hellwig } 6975ddaabe8SChristoph Hellwig 6982eb81a33SChristoph Hellwig /* 6992eb81a33SChristoph Hellwig * Fill in the status and result information from the CQE, and then figure out 7002eb81a33SChristoph Hellwig * if blk-mq will need to use IPI magic to complete the request, and if yes do 7012eb81a33SChristoph Hellwig * so. If not let the caller complete the request without an indirect function 7022eb81a33SChristoph Hellwig * call. 7032eb81a33SChristoph Hellwig */ 7042eb81a33SChristoph Hellwig static inline bool nvme_try_complete_req(struct request *req, __le16 status, 70527fa9bc5SChristoph Hellwig union nvme_result result) 70615a190f7SChristoph Hellwig { 70727fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 708e4fdb2b1SKeith Busch struct nvme_ctrl *ctrl = rq->ctrl; 709e4fdb2b1SKeith Busch 710e4fdb2b1SKeith Busch if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 711e4fdb2b1SKeith Busch rq->genctr++; 71227fa9bc5SChristoph Hellwig 71327fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 71427fa9bc5SChristoph Hellwig rq->result = result; 715b9e03857SThomas Tai /* inject error when permitted by fault injection framework */ 716b9e03857SThomas Tai nvme_should_fail(req); 717ff029451SChristoph Hellwig if (unlikely(blk_should_fake_timeout(req->q))) 718ff029451SChristoph Hellwig return true; 719ff029451SChristoph Hellwig return blk_mq_complete_request_remote(req); 72015a190f7SChristoph Hellwig } 72115a190f7SChristoph Hellwig 722d22524a4SChristoph Hellwig static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 723d22524a4SChristoph Hellwig { 724d22524a4SChristoph Hellwig get_device(ctrl->device); 725d22524a4SChristoph Hellwig } 726d22524a4SChristoph Hellwig 727d22524a4SChristoph Hellwig static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 728d22524a4SChristoph Hellwig { 729d22524a4SChristoph Hellwig put_device(ctrl->device); 730d22524a4SChristoph Hellwig } 731d22524a4SChristoph Hellwig 73258a8df67SIsrael Rukshin static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 73358a8df67SIsrael Rukshin { 734e7006de6SSagi Grimberg return !qid && 735e7006de6SSagi Grimberg nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 73658a8df67SIsrael Rukshin } 73758a8df67SIsrael Rukshin 73877f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 739c234a653SJens Axboe void nvme_complete_batch_req(struct request *req); 740c234a653SJens Axboe 741c234a653SJens Axboe static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 742c234a653SJens Axboe void (*fn)(struct request *rq)) 743c234a653SJens Axboe { 744c234a653SJens Axboe struct request *req; 745c234a653SJens Axboe 746c234a653SJens Axboe rq_list_for_each(&iob->req_list, req) { 747c234a653SJens Axboe fn(req); 748c234a653SJens Axboe nvme_complete_batch_req(req); 749c234a653SJens Axboe } 750c234a653SJens Axboe blk_mq_end_request_batch(iob); 751c234a653SJens Axboe } 752c234a653SJens Axboe 753dda3248eSChao Leng blk_status_t nvme_host_path_error(struct request *req); 7542dd6532eSJohn Garry bool nvme_cancel_request(struct request *req, void *data); 75525479069SChao Leng void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 75625479069SChao Leng void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 757bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 758bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 759285b6e9bSChristoph Hellwig int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 760c0f2f45bSSagi Grimberg int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 761f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 762f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 76353029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 764d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 765d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 76694cc781fSChristoph Hellwig int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 767fe60e8c5SChristoph Hellwig int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 768db45e1a5SChristoph Hellwig const struct blk_mq_ops *ops, unsigned int cmd_size); 769fe60e8c5SChristoph Hellwig void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 770fe60e8c5SChristoph Hellwig int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 771db45e1a5SChristoph Hellwig const struct blk_mq_ops *ops, unsigned int nr_maps, 772db45e1a5SChristoph Hellwig unsigned int cmd_size); 773fe60e8c5SChristoph Hellwig void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 7745bae7f73SChristoph Hellwig 7755bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 7761673f1f0SChristoph Hellwig 7777bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 778287a63ebSChristoph Hellwig volatile union nvme_result *res); 779f866fc42SChristoph Hellwig 7809f27bd70SChristoph Hellwig void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 7819f27bd70SChristoph Hellwig void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 7829f27bd70SChristoph Hellwig void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 7839f27bd70SChristoph Hellwig void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 784cd50f9b2SChristoph Hellwig void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 785d6135c3aSKeith Busch void nvme_sync_queues(struct nvme_ctrl *ctrl); 78604800fbfSChao Leng void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 787302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 788302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 7897cf0d7c0SSagi Grimberg int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 790302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 791363c9aacSSagi Grimberg 792f9ed86dcSBart Van Assche static inline enum req_op nvme_req_op(struct nvme_command *cmd) 793e559398fSChristoph Hellwig { 794e559398fSChristoph Hellwig return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 795e559398fSChristoph Hellwig } 796e559398fSChristoph Hellwig 797eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 798e559398fSChristoph Hellwig void nvme_init_request(struct request *req, struct nvme_command *cmd); 799f7f1fc36SMax Gurtovoy void nvme_cleanup_cmd(struct request *req); 800f4b9e6c9SKeith Busch blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 801a9715744STao Chiu blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 802a9715744STao Chiu struct request *req); 803a9715744STao Chiu bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 804a9715744STao Chiu bool queue_live); 805a9715744STao Chiu 806a9715744STao Chiu static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 807a9715744STao Chiu bool queue_live) 808a9715744STao Chiu { 809a9715744STao Chiu if (likely(ctrl->state == NVME_CTRL_LIVE)) 810a9715744STao Chiu return true; 811a9715744STao Chiu if (ctrl->ops->flags & NVME_F_FABRICS && 812a9715744STao Chiu ctrl->state == NVME_CTRL_DELETING) 8138b77fa6fSRuozhu Li return queue_live; 814a9715744STao Chiu return __nvme_check_ready(ctrl, rq, queue_live); 815a9715744STao Chiu } 8165974ea7cSSungup Moon 8175974ea7cSSungup Moon /* 8185974ea7cSSungup Moon * NSID shall be unique for all shared namespaces, or if at least one of the 8195974ea7cSSungup Moon * following conditions is met: 8205974ea7cSSungup Moon * 1. Namespace Management is supported by the controller 8215974ea7cSSungup Moon * 2. ANA is supported by the controller 8225974ea7cSSungup Moon * 3. NVM Set are supported by the controller 8235974ea7cSSungup Moon * 8245974ea7cSSungup Moon * In other case, private namespace are not required to report a unique NSID. 8255974ea7cSSungup Moon */ 8265974ea7cSSungup Moon static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 8275974ea7cSSungup Moon struct nvme_ns_head *head) 8285974ea7cSSungup Moon { 8295974ea7cSSungup Moon return head->shared || 8305974ea7cSSungup Moon (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 8315974ea7cSSungup Moon (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 8325974ea7cSSungup Moon (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 8335974ea7cSSungup Moon } 8345974ea7cSSungup Moon 83557dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 83657dacad5SJay Sternberg void *buf, unsigned bufflen); 83757dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 838d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 8396b46fa02SChaitanya Kulkarni int qid, int at_head, 840be42a33bSKeith Busch blk_mq_req_flags_t flags); 8411a87ee65SKeith Busch int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 8421a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 8431a87ee65SKeith Busch u32 *result); 8441a87ee65SKeith Busch int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 8451a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 8461a87ee65SKeith Busch u32 *result); 8479a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 848038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 849d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 8502405252aSChristoph Hellwig int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 851c5017e85SChristoph Hellwig int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 8522405252aSChristoph Hellwig void nvme_queue_scan(struct nvme_ctrl *ctrl); 853be93e87eSKeith Busch int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 8540e98719bSChristoph Hellwig void *log, size_t size, u64 offset); 8551496bd49SChristoph Hellwig bool nvme_tryget_ns_head(struct nvme_ns_head *head); 8561496bd49SChristoph Hellwig void nvme_put_ns_head(struct nvme_ns_head *head); 8572637baedSMinwoo Im int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 8582637baedSMinwoo Im const struct file_operations *fops, struct module *owner); 8592637baedSMinwoo Im void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 86005bdb996SChristoph Hellwig int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 8612405252aSChristoph Hellwig unsigned int cmd, unsigned long arg); 8622637baedSMinwoo Im long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 86305bdb996SChristoph Hellwig int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 8642405252aSChristoph Hellwig unsigned int cmd, unsigned long arg); 8652637baedSMinwoo Im long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 8662637baedSMinwoo Im unsigned long arg); 8672405252aSChristoph Hellwig long nvme_dev_ioctl(struct file *file, unsigned int cmd, 8682405252aSChristoph Hellwig unsigned long arg); 869de97fcb3SJens Axboe int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 870de97fcb3SJens Axboe struct io_comp_batch *iob, unsigned int poll_flags); 871456cba38SKanchan Joshi int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 872456cba38SKanchan Joshi unsigned int issue_flags); 873456cba38SKanchan Joshi int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 874456cba38SKanchan Joshi unsigned int issue_flags); 8751496bd49SChristoph Hellwig int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 87658e5bdebSKanchan Joshi int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 877d558fb51SMatias Bjørling 87833b14f67SHannes Reinecke extern const struct attribute_group *nvme_ns_id_attr_groups[]; 8791496bd49SChristoph Hellwig extern const struct pr_ops nvme_pr_ops; 88032acab31SChristoph Hellwig extern const struct block_device_operations nvme_ns_head_ops; 88186adbf0cSChristoph Hellwig extern const struct attribute_group nvme_dev_attrs_group; 882942e21c0SMax Gurtovoy extern const struct attribute_group *nvme_subsys_attrs_groups[]; 883942e21c0SMax Gurtovoy extern const struct attribute_group *nvme_dev_attr_groups[]; 884942e21c0SMax Gurtovoy extern const struct block_device_operations nvme_bdev_ops; 88532acab31SChristoph Hellwig 886942e21c0SMax Gurtovoy void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 887f1cf35e1SChristoph Hellwig struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 88832acab31SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 88966b20ac0SMarta Rybczynska static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 89066b20ac0SMarta Rybczynska { 89166b20ac0SMarta Rybczynska return ctrl->ana_log_buf != NULL; 89266b20ac0SMarta Rybczynska } 89366b20ac0SMarta Rybczynska 894b9156daeSSagi Grimberg void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 895b9156daeSSagi Grimberg void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 896b9156daeSSagi Grimberg void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 897e3d34794SHannes Reinecke void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 8985ddaabe8SChristoph Hellwig void nvme_failover_req(struct request *req); 89932acab31SChristoph Hellwig void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 90032acab31SChristoph Hellwig int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 901c13cf14fSJoel Granados void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 90232acab31SChristoph Hellwig void nvme_mpath_remove_disk(struct nvme_ns_head *head); 9035e1f6899SChristoph Hellwig int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 9045e1f6899SChristoph Hellwig void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 905a4a6f3c8SAnton Eidelman void nvme_mpath_update(struct nvme_ctrl *ctrl); 9060d0b660fSChristoph Hellwig void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 9070d0b660fSChristoph Hellwig void nvme_mpath_stop(struct nvme_ctrl *ctrl); 9080157ec8dSSagi Grimberg bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 909e7d65803SHannes Reinecke void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 9100157ec8dSSagi Grimberg void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 9115396fdacSHannes Reinecke void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 912d4d957b5SSagi Grimberg void nvme_mpath_start_request(struct request *rq); 913d4d957b5SSagi Grimberg void nvme_mpath_end_request(struct request *rq); 914479a322fSSagi Grimberg 9152b59787aSMax Gurtovoy static inline void nvme_trace_bio_complete(struct request *req) 91635fe0d12SHannes Reinecke { 91735fe0d12SHannes Reinecke struct nvme_ns *ns = req->q->queuedata; 91835fe0d12SHannes Reinecke 9193659fb5aSYanjun Zhang if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 920d24de76aSChristoph Hellwig trace_block_bio_complete(ns->head->disk->queue, req->bio); 92135fe0d12SHannes Reinecke } 92235fe0d12SHannes Reinecke 923b739e137SChristoph Hellwig extern bool multipath; 9240d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_grpid; 9250d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_state; 92675c10e73SHannes Reinecke extern struct device_attribute subsys_attr_iopolicy; 9270d0b660fSChristoph Hellwig 92832acab31SChristoph Hellwig #else 929b739e137SChristoph Hellwig #define multipath false 9300d0b660fSChristoph Hellwig static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 9310d0b660fSChristoph Hellwig { 9320d0b660fSChristoph Hellwig return false; 9330d0b660fSChristoph Hellwig } 9345ddaabe8SChristoph Hellwig static inline void nvme_failover_req(struct request *req) 93532acab31SChristoph Hellwig { 93632acab31SChristoph Hellwig } 93732acab31SChristoph Hellwig static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 93832acab31SChristoph Hellwig { 93932acab31SChristoph Hellwig } 94032acab31SChristoph Hellwig static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 94132acab31SChristoph Hellwig struct nvme_ns_head *head) 94232acab31SChristoph Hellwig { 94332acab31SChristoph Hellwig return 0; 94432acab31SChristoph Hellwig } 945c13cf14fSJoel Granados static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 94632acab31SChristoph Hellwig { 94732acab31SChristoph Hellwig } 94832acab31SChristoph Hellwig static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 94932acab31SChristoph Hellwig { 95032acab31SChristoph Hellwig } 9510157ec8dSSagi Grimberg static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 9520157ec8dSSagi Grimberg { 9530157ec8dSSagi Grimberg return false; 9540157ec8dSSagi Grimberg } 955e7d65803SHannes Reinecke static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 956e7d65803SHannes Reinecke { 957e7d65803SHannes Reinecke } 9580157ec8dSSagi Grimberg static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 95932acab31SChristoph Hellwig { 96032acab31SChristoph Hellwig } 9615396fdacSHannes Reinecke static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 962479a322fSSagi Grimberg { 963479a322fSSagi Grimberg } 9642b59787aSMax Gurtovoy static inline void nvme_trace_bio_complete(struct request *req) 96535fe0d12SHannes Reinecke { 96635fe0d12SHannes Reinecke } 9675e1f6899SChristoph Hellwig static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 9685e1f6899SChristoph Hellwig { 9695e1f6899SChristoph Hellwig } 9705e1f6899SChristoph Hellwig static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 9710d0b660fSChristoph Hellwig struct nvme_id_ctrl *id) 9720d0b660fSChristoph Hellwig { 9732bd64307SKanchan Joshi if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 97414a1336eSChristoph Hellwig dev_warn(ctrl->device, 97514a1336eSChristoph Hellwig "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 9760d0b660fSChristoph Hellwig return 0; 9770d0b660fSChristoph Hellwig } 978a4a6f3c8SAnton Eidelman static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 979a4a6f3c8SAnton Eidelman { 980a4a6f3c8SAnton Eidelman } 9810d0b660fSChristoph Hellwig static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 9820d0b660fSChristoph Hellwig { 9830d0b660fSChristoph Hellwig } 9840d0b660fSChristoph Hellwig static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 9850d0b660fSChristoph Hellwig { 9860d0b660fSChristoph Hellwig } 987b9156daeSSagi Grimberg static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 988b9156daeSSagi Grimberg { 989b9156daeSSagi Grimberg } 990b9156daeSSagi Grimberg static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 991b9156daeSSagi Grimberg { 992b9156daeSSagi Grimberg } 993b9156daeSSagi Grimberg static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 994b9156daeSSagi Grimberg { 995b9156daeSSagi Grimberg } 996e3d34794SHannes Reinecke static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 997e3d34794SHannes Reinecke { 998e3d34794SHannes Reinecke } 999d4d957b5SSagi Grimberg static inline void nvme_mpath_start_request(struct request *rq) 1000d4d957b5SSagi Grimberg { 1001d4d957b5SSagi Grimberg } 1002d4d957b5SSagi Grimberg static inline void nvme_mpath_end_request(struct request *rq) 1003d4d957b5SSagi Grimberg { 1004d4d957b5SSagi Grimberg } 100532acab31SChristoph Hellwig #endif /* CONFIG_NVME_MULTIPATH */ 100632acab31SChristoph Hellwig 10077fad20ddSChristoph Hellwig int nvme_revalidate_zones(struct nvme_ns *ns); 10088b4fb0f9SChristoph Hellwig int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 10098b4fb0f9SChristoph Hellwig unsigned int nr_zones, report_zones_cb cb, void *data); 1010240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 1011d525c3c0SChristoph Hellwig int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 1012240e6ee2SKeith Busch blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1013240e6ee2SKeith Busch struct nvme_command *cmnd, 1014240e6ee2SKeith Busch enum nvme_zone_mgmt_action action); 1015240e6ee2SKeith Busch #else 1016240e6ee2SKeith Busch static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1017240e6ee2SKeith Busch struct request *req, struct nvme_command *cmnd, 1018240e6ee2SKeith Busch enum nvme_zone_mgmt_action action) 1019240e6ee2SKeith Busch { 1020240e6ee2SKeith Busch return BLK_STS_NOTSUPP; 1021240e6ee2SKeith Busch } 1022240e6ee2SKeith Busch 1023d525c3c0SChristoph Hellwig static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 1024240e6ee2SKeith Busch { 1025240e6ee2SKeith Busch dev_warn(ns->ctrl->device, 1026240e6ee2SKeith Busch "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 1027240e6ee2SKeith Busch return -EPROTONOSUPPORT; 1028240e6ee2SKeith Busch } 1029240e6ee2SKeith Busch #endif 1030240e6ee2SKeith Busch 103140267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 103240267efdSSimon A. F. Lund { 103340267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 103440267efdSSimon A. F. Lund } 1035ca064085SMatias Bjørling 1036400b6a7bSGuenter Roeck #ifdef CONFIG_NVME_HWMON 103759e330f8SKeith Busch int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1038ed7770f6SHannes Reinecke void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1039400b6a7bSGuenter Roeck #else 104059e330f8SKeith Busch static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 104159e330f8SKeith Busch { 104259e330f8SKeith Busch return 0; 104359e330f8SKeith Busch } 1044ed7770f6SHannes Reinecke 1045ed7770f6SHannes Reinecke static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1046ed7770f6SHannes Reinecke { 1047ed7770f6SHannes Reinecke } 1048400b6a7bSGuenter Roeck #endif 1049400b6a7bSGuenter Roeck 10506887fc64SSagi Grimberg static inline void nvme_start_request(struct request *rq) 10516887fc64SSagi Grimberg { 1052d4d957b5SSagi Grimberg if (rq->cmd_flags & REQ_NVME_MPATH) 1053d4d957b5SSagi Grimberg nvme_mpath_start_request(rq); 10546887fc64SSagi Grimberg blk_mq_start_request(rq); 10556887fc64SSagi Grimberg } 10566887fc64SSagi Grimberg 105773eefc27SChaitanya Kulkarni static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 105873eefc27SChaitanya Kulkarni { 105973eefc27SChaitanya Kulkarni return ctrl->sgls & ((1 << 0) | (1 << 1)); 106073eefc27SChaitanya Kulkarni } 106173eefc27SChaitanya Kulkarni 1062f50fff73SHannes Reinecke #ifdef CONFIG_NVME_AUTH 1063e481fc0aSSagi Grimberg int __init nvme_init_auth(void); 1064e481fc0aSSagi Grimberg void __exit nvme_exit_auth(void); 1065193a8c7eSSagi Grimberg int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1066f50fff73SHannes Reinecke void nvme_auth_stop(struct nvme_ctrl *ctrl); 1067f50fff73SHannes Reinecke int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1068f50fff73SHannes Reinecke int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1069f50fff73SHannes Reinecke void nvme_auth_free(struct nvme_ctrl *ctrl); 1070f50fff73SHannes Reinecke #else 1071193a8c7eSSagi Grimberg static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1072193a8c7eSSagi Grimberg { 1073193a8c7eSSagi Grimberg return 0; 1074193a8c7eSSagi Grimberg } 1075e481fc0aSSagi Grimberg static inline int __init nvme_init_auth(void) 1076e481fc0aSSagi Grimberg { 1077e481fc0aSSagi Grimberg return 0; 1078e481fc0aSSagi Grimberg } 1079e481fc0aSSagi Grimberg static inline void __exit nvme_exit_auth(void) 1080e481fc0aSSagi Grimberg { 1081e481fc0aSSagi Grimberg } 1082f50fff73SHannes Reinecke static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1083f50fff73SHannes Reinecke static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1084f50fff73SHannes Reinecke { 1085f50fff73SHannes Reinecke return -EPROTONOSUPPORT; 1086f50fff73SHannes Reinecke } 1087f50fff73SHannes Reinecke static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1088f50fff73SHannes Reinecke { 1089f50fff73SHannes Reinecke return NVME_SC_AUTH_REQUIRED; 1090f50fff73SHannes Reinecke } 1091f50fff73SHannes Reinecke static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1092f50fff73SHannes Reinecke #endif 1093f50fff73SHannes Reinecke 1094df21b6b1SLogan Gunthorpe u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1095df21b6b1SLogan Gunthorpe u8 opcode); 109662281b9eSChristoph Hellwig u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 109762281b9eSChristoph Hellwig int nvme_execute_rq(struct request *rq, bool at_head); 109831a59782Smin15.li void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1099bc8fb906SKeith Busch struct nvme_command *cmd, int status); 1100b2702aaaSChaitanya Kulkarni struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 110124493b8bSLogan Gunthorpe struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 110224493b8bSLogan Gunthorpe void nvme_put_ns(struct nvme_ns *ns); 1103df21b6b1SLogan Gunthorpe 110443dc9878SAdam Manzanares static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 110543dc9878SAdam Manzanares { 110643dc9878SAdam Manzanares return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 110743dc9878SAdam Manzanares } 110843dc9878SAdam Manzanares 1109bd83fe6fSAlan Adamson #ifdef CONFIG_NVME_VERBOSE_ERRORS 1110bd83fe6fSAlan Adamson const unsigned char *nvme_get_error_status_str(u16 status); 1111bd83fe6fSAlan Adamson const unsigned char *nvme_get_opcode_str(u8 opcode); 1112bd83fe6fSAlan Adamson const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1113567da14dSAmit Engel const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode); 1114bd83fe6fSAlan Adamson #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1115bd83fe6fSAlan Adamson static inline const unsigned char *nvme_get_error_status_str(u16 status) 1116bd83fe6fSAlan Adamson { 1117bd83fe6fSAlan Adamson return "I/O Error"; 1118bd83fe6fSAlan Adamson } 1119bd83fe6fSAlan Adamson static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1120bd83fe6fSAlan Adamson { 1121bd83fe6fSAlan Adamson return "I/O Cmd"; 1122bd83fe6fSAlan Adamson } 1123bd83fe6fSAlan Adamson static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1124bd83fe6fSAlan Adamson { 1125bd83fe6fSAlan Adamson return "Admin Cmd"; 1126bd83fe6fSAlan Adamson } 1127567da14dSAmit Engel 1128567da14dSAmit Engel static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode) 1129567da14dSAmit Engel { 1130567da14dSAmit Engel return "Fabrics Cmd"; 1131567da14dSAmit Engel } 1132bd83fe6fSAlan Adamson #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1133bd83fe6fSAlan Adamson 1134567da14dSAmit Engel static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype) 1135567da14dSAmit Engel { 1136567da14dSAmit Engel if (opcode == nvme_fabrics_command) 1137567da14dSAmit Engel return nvme_get_fabrics_opcode_str(fctype); 1138567da14dSAmit Engel return qid ? nvme_get_opcode_str(opcode) : 1139567da14dSAmit Engel nvme_get_admin_opcode_str(opcode); 1140567da14dSAmit Engel } 114157dacad5SJay Sternberg #endif /* _NVME_H */ 1142