1*bc50ad75SChristoph Hellwig /* SPDX-License-Identifier: GPL-2.0 */ 257dacad5SJay Sternberg /* 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg */ 557dacad5SJay Sternberg 657dacad5SJay Sternberg #ifndef _NVME_H 757dacad5SJay Sternberg #define _NVME_H 857dacad5SJay Sternberg 957dacad5SJay Sternberg #include <linux/nvme.h> 10a6a5149bSChristoph Hellwig #include <linux/cdev.h> 1157dacad5SJay Sternberg #include <linux/pci.h> 1257dacad5SJay Sternberg #include <linux/kref.h> 1357dacad5SJay Sternberg #include <linux/blk-mq.h> 14b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 15a98e58e5SScott Bauer #include <linux/sed-opal.h> 16b9e03857SThomas Tai #include <linux/fault-inject.h> 17978628ecSJohannes Thumshirn #include <linux/rcupdate.h> 1857dacad5SJay Sternberg 198ae4e447SMarc Olson extern unsigned int nvme_io_timeout; 2057dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2157dacad5SJay Sternberg 228ae4e447SMarc Olson extern unsigned int admin_timeout; 2321d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 2421d34711SChristoph Hellwig 25038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 26038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 27038bd4cbSSagi Grimberg 289a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 29b227c59bSRoy Shterman extern struct workqueue_struct *nvme_reset_wq; 30b227c59bSRoy Shterman extern struct workqueue_struct *nvme_delete_wq; 319a6327d2SSagi Grimberg 32ca064085SMatias Bjørling enum { 33ca064085SMatias Bjørling NVME_NS_LBA = 0, 34ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 35ca064085SMatias Bjørling }; 36ca064085SMatias Bjørling 3757dacad5SJay Sternberg /* 38106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 39106198edSChristoph Hellwig * the standard. 4057dacad5SJay Sternberg */ 41106198edSChristoph Hellwig enum nvme_quirks { 42106198edSChristoph Hellwig /* 43106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 44106198edSChristoph Hellwig * specific Identify field. 45106198edSChristoph Hellwig */ 46106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 47540c801cSKeith Busch 48540c801cSKeith Busch /* 49540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 50540c801cSKeith Busch * correctly. 51540c801cSKeith Busch */ 52540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 5308095e70SKeith Busch 5408095e70SKeith Busch /* 55e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 56e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 5708095e70SKeith Busch */ 58e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 5954adc010SGuilherme G. Piccoli 6054adc010SGuilherme G. Piccoli /* 6154adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 6254adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 6354adc010SGuilherme G. Piccoli */ 6454adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 65c5552fdeSAndy Lutomirski 66c5552fdeSAndy Lutomirski /* 67c5552fdeSAndy Lutomirski * APST should not be used. 68c5552fdeSAndy Lutomirski */ 69c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 70ff5350a8SAndy Lutomirski 71ff5350a8SAndy Lutomirski /* 72ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 73ff5350a8SAndy Lutomirski */ 74ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 75608cc4b1SChristoph Hellwig 76608cc4b1SChristoph Hellwig /* 77608cc4b1SChristoph Hellwig * Supports the LighNVM command set if indicated in vs[1]. 78608cc4b1SChristoph Hellwig */ 79608cc4b1SChristoph Hellwig NVME_QUIRK_LIGHTNVM = (1 << 6), 809abd68efSJens Axboe 819abd68efSJens Axboe /* 829abd68efSJens Axboe * Set MEDIUM priority on SQ creation 839abd68efSJens Axboe */ 849abd68efSJens Axboe NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 856299358dSJames Dingwall 866299358dSJames Dingwall /* 876299358dSJames Dingwall * Ignore device provided subnqn. 886299358dSJames Dingwall */ 896299358dSJames Dingwall NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 90106198edSChristoph Hellwig }; 91106198edSChristoph Hellwig 92d49187e9SChristoph Hellwig /* 93d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 94d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 95d49187e9SChristoph Hellwig */ 96d49187e9SChristoph Hellwig struct nvme_request { 97d49187e9SChristoph Hellwig struct nvme_command *cmd; 98d49187e9SChristoph Hellwig union nvme_result result; 9944e44b29SChristoph Hellwig u8 retries; 10027fa9bc5SChristoph Hellwig u8 flags; 10127fa9bc5SChristoph Hellwig u16 status; 10259e29ce6SSagi Grimberg struct nvme_ctrl *ctrl; 10327fa9bc5SChristoph Hellwig }; 10427fa9bc5SChristoph Hellwig 10532acab31SChristoph Hellwig /* 10632acab31SChristoph Hellwig * Mark a bio as coming in through the mpath node. 10732acab31SChristoph Hellwig */ 10832acab31SChristoph Hellwig #define REQ_NVME_MPATH REQ_DRV 10932acab31SChristoph Hellwig 11027fa9bc5SChristoph Hellwig enum { 11127fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 112bb06ec31SJames Smart NVME_REQ_USERCMD = (1 << 1), 113d49187e9SChristoph Hellwig }; 114d49187e9SChristoph Hellwig 115d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 116d49187e9SChristoph Hellwig { 117d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 118d49187e9SChristoph Hellwig } 119d49187e9SChristoph Hellwig 1205d87eb94SKeith Busch static inline u16 nvme_req_qid(struct request *req) 1215d87eb94SKeith Busch { 1225d87eb94SKeith Busch if (!req->rq_disk) 1235d87eb94SKeith Busch return 0; 1245d87eb94SKeith Busch return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 1255d87eb94SKeith Busch } 1265d87eb94SKeith Busch 12754adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 12854adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 12954adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 13054adc010SGuilherme G. Piccoli * found empirically. 13154adc010SGuilherme G. Piccoli */ 1328c97eeccSJeff Lien #define NVME_QUIRK_DELAY_AMOUNT 2300 13354adc010SGuilherme G. Piccoli 134bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 135bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 136bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 1372b1b7e78SJianchao Wang NVME_CTRL_ADMIN_ONLY, /* Only admin queue live */ 138bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 139ad6a0a52SMax Gurtovoy NVME_CTRL_CONNECTING, 140bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 1410ff9d4e1SKeith Busch NVME_CTRL_DEAD, 142bb8d261eSChristoph Hellwig }; 143bb8d261eSChristoph Hellwig 1441c63dc66SChristoph Hellwig struct nvme_ctrl { 1456e3ca03eSSagi Grimberg bool comp_seen; 146bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 147bd4da3abSAndy Lutomirski bool identified; 148bb8d261eSChristoph Hellwig spinlock_t lock; 149e7ad43c3SKeith Busch struct mutex scan_lock; 1501c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 15157dacad5SJay Sternberg struct request_queue *admin_q; 15207bfcd09SChristoph Hellwig struct request_queue *connect_q; 15357dacad5SJay Sternberg struct device *dev; 15457dacad5SJay Sternberg int instance; 155103e515eSHannes Reinecke int numa_node; 1565bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 15734b6c231SSagi Grimberg struct blk_mq_tag_set *admin_tagset; 1585bae7f73SChristoph Hellwig struct list_head namespaces; 159765cc031SJianchao Wang struct rw_semaphore namespaces_rwsem; 160d22524a4SChristoph Hellwig struct device ctrl_device; 1615bae7f73SChristoph Hellwig struct device *device; /* char device */ 162a6a5149bSChristoph Hellwig struct cdev cdev; 163d86c4d8eSChristoph Hellwig struct work_struct reset_work; 164c5017e85SChristoph Hellwig struct work_struct delete_work; 1651c63dc66SChristoph Hellwig 166ab9e00ccSChristoph Hellwig struct nvme_subsystem *subsys; 167ab9e00ccSChristoph Hellwig struct list_head subsys_entry; 168ab9e00ccSChristoph Hellwig 1694f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 170a98e58e5SScott Bauer 17157dacad5SJay Sternberg char name[12]; 17276e3914aSChristoph Hellwig u16 cntlid; 1735fd4ce1bSChristoph Hellwig 1745fd4ce1bSChristoph Hellwig u32 ctrl_config; 175b6dccf7fSArnav Dawn u16 mtfa; 176d858e5f0SSagi Grimberg u32 queue_count; 1775fd4ce1bSChristoph Hellwig 17820d0dfe6SSagi Grimberg u64 cap; 1795fd4ce1bSChristoph Hellwig u32 page_size; 18057dacad5SJay Sternberg u32 max_hw_sectors; 181943e942eSJens Axboe u32 max_segments; 18249cd84b6SKeith Busch u16 crdt[3]; 18357dacad5SJay Sternberg u16 oncs; 1848a9ae523SScott Bauer u16 oacs; 185f5d11840SJens Axboe u16 nssa; 186f5d11840SJens Axboe u16 nr_streams; 1870d0b660fSChristoph Hellwig u32 max_namespaces; 1886bf25d16SChristoph Hellwig atomic_t abort_limit; 18957dacad5SJay Sternberg u8 vwc; 190f3ca80fcSChristoph Hellwig u32 vs; 19107bfcd09SChristoph Hellwig u32 sgls; 192038bd4cbSSagi Grimberg u16 kas; 193c5552fdeSAndy Lutomirski u8 npss; 194c5552fdeSAndy Lutomirski u8 apsta; 195c0561f82SHannes Reinecke u32 oaes; 196e3d7874dSKeith Busch u32 aen_result; 1973e53ba38SSagi Grimberg u32 ctratt; 19807fbd32aSMartin K. Petersen unsigned int shutdown_timeout; 199038bd4cbSSagi Grimberg unsigned int kato; 200f3ca80fcSChristoph Hellwig bool subsystem; 201106198edSChristoph Hellwig unsigned long quirks; 202c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 20384fef62dSKeith Busch struct nvme_effects_log *effects; 2045955be21SChristoph Hellwig struct work_struct scan_work; 205f866fc42SChristoph Hellwig struct work_struct async_event_work; 206038bd4cbSSagi Grimberg struct delayed_work ka_work; 2070a34e466SRoland Dreier struct nvme_command ka_cmd; 208b6dccf7fSArnav Dawn struct work_struct fw_act_work; 20930d90964SChristoph Hellwig unsigned long events; 21007bfcd09SChristoph Hellwig 2110d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 2120d0b660fSChristoph Hellwig /* asymmetric namespace access: */ 2130d0b660fSChristoph Hellwig u8 anacap; 2140d0b660fSChristoph Hellwig u8 anatt; 2150d0b660fSChristoph Hellwig u32 anagrpmax; 2160d0b660fSChristoph Hellwig u32 nanagrpid; 2170d0b660fSChristoph Hellwig struct mutex ana_lock; 2180d0b660fSChristoph Hellwig struct nvme_ana_rsp_hdr *ana_log_buf; 2190d0b660fSChristoph Hellwig size_t ana_log_size; 2200d0b660fSChristoph Hellwig struct timer_list anatt_timer; 2210d0b660fSChristoph Hellwig struct work_struct ana_work; 2220d0b660fSChristoph Hellwig #endif 2230d0b660fSChristoph Hellwig 224c5552fdeSAndy Lutomirski /* Power saving configuration */ 225c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 22676a5af84SKai-Heng Feng bool apst_enabled; 227c5552fdeSAndy Lutomirski 228044a9df1SChristoph Hellwig /* PCIe only: */ 229fe6d53c9SChristoph Hellwig u32 hmpre; 230fe6d53c9SChristoph Hellwig u32 hmmin; 231044a9df1SChristoph Hellwig u32 hmminds; 232044a9df1SChristoph Hellwig u16 hmmaxd; 233fe6d53c9SChristoph Hellwig 23407bfcd09SChristoph Hellwig /* Fabrics only */ 23507bfcd09SChristoph Hellwig u16 sqsize; 23607bfcd09SChristoph Hellwig u32 ioccsz; 23707bfcd09SChristoph Hellwig u32 iorcsz; 23807bfcd09SChristoph Hellwig u16 icdoff; 23907bfcd09SChristoph Hellwig u16 maxcmd; 240fdf9dfa8SSagi Grimberg int nr_reconnects; 24107bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 242cb5b7262SJens Axboe 243cb5b7262SJens Axboe struct page *discard_page; 244cb5b7262SJens Axboe unsigned long discard_page_busy; 24557dacad5SJay Sternberg }; 24657dacad5SJay Sternberg 24775c10e73SHannes Reinecke enum nvme_iopolicy { 24875c10e73SHannes Reinecke NVME_IOPOLICY_NUMA, 24975c10e73SHannes Reinecke NVME_IOPOLICY_RR, 25075c10e73SHannes Reinecke }; 25175c10e73SHannes Reinecke 252ab9e00ccSChristoph Hellwig struct nvme_subsystem { 253ab9e00ccSChristoph Hellwig int instance; 254ab9e00ccSChristoph Hellwig struct device dev; 255ab9e00ccSChristoph Hellwig /* 256ab9e00ccSChristoph Hellwig * Because we unregister the device on the last put we need 257ab9e00ccSChristoph Hellwig * a separate refcount. 258ab9e00ccSChristoph Hellwig */ 259ab9e00ccSChristoph Hellwig struct kref ref; 260ab9e00ccSChristoph Hellwig struct list_head entry; 261ab9e00ccSChristoph Hellwig struct mutex lock; 262ab9e00ccSChristoph Hellwig struct list_head ctrls; 263ed754e5dSChristoph Hellwig struct list_head nsheads; 264ab9e00ccSChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 265ab9e00ccSChristoph Hellwig char serial[20]; 266ab9e00ccSChristoph Hellwig char model[40]; 267ab9e00ccSChristoph Hellwig char firmware_rev[8]; 268ab9e00ccSChristoph Hellwig u8 cmic; 269ab9e00ccSChristoph Hellwig u16 vendor_id; 270ed754e5dSChristoph Hellwig struct ida ns_ida; 27175c10e73SHannes Reinecke #ifdef CONFIG_NVME_MULTIPATH 27275c10e73SHannes Reinecke enum nvme_iopolicy iopolicy; 27375c10e73SHannes Reinecke #endif 274ab9e00ccSChristoph Hellwig }; 275ab9e00ccSChristoph Hellwig 276002fab04SChristoph Hellwig /* 277002fab04SChristoph Hellwig * Container structure for uniqueue namespace identifiers. 278002fab04SChristoph Hellwig */ 279002fab04SChristoph Hellwig struct nvme_ns_ids { 280002fab04SChristoph Hellwig u8 eui64[8]; 281002fab04SChristoph Hellwig u8 nguid[16]; 282002fab04SChristoph Hellwig uuid_t uuid; 283002fab04SChristoph Hellwig }; 284002fab04SChristoph Hellwig 285ed754e5dSChristoph Hellwig /* 286ed754e5dSChristoph Hellwig * Anchor structure for namespaces. There is one for each namespace in a 287ed754e5dSChristoph Hellwig * NVMe subsystem that any of our controllers can see, and the namespace 288ed754e5dSChristoph Hellwig * structure for each controller is chained of it. For private namespaces 289ed754e5dSChristoph Hellwig * there is a 1:1 relation to our namespace structures, that is ->list 290ed754e5dSChristoph Hellwig * only ever has a single entry for private namespaces. 291ed754e5dSChristoph Hellwig */ 292ed754e5dSChristoph Hellwig struct nvme_ns_head { 293ed754e5dSChristoph Hellwig struct list_head list; 294ed754e5dSChristoph Hellwig struct srcu_struct srcu; 295ed754e5dSChristoph Hellwig struct nvme_subsystem *subsys; 296ed754e5dSChristoph Hellwig unsigned ns_id; 297ed754e5dSChristoph Hellwig struct nvme_ns_ids ids; 298ed754e5dSChristoph Hellwig struct list_head entry; 299ed754e5dSChristoph Hellwig struct kref ref; 300ed754e5dSChristoph Hellwig int instance; 301f3334447SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 302f3334447SChristoph Hellwig struct gendisk *disk; 303f3334447SChristoph Hellwig struct bio_list requeue_list; 304f3334447SChristoph Hellwig spinlock_t requeue_lock; 305f3334447SChristoph Hellwig struct work_struct requeue_work; 306f3334447SChristoph Hellwig struct mutex lock; 307f3334447SChristoph Hellwig struct nvme_ns __rcu *current_path[]; 308f3334447SChristoph Hellwig #endif 309ed754e5dSChristoph Hellwig }; 310ed754e5dSChristoph Hellwig 311b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 312b9e03857SThomas Tai struct nvme_fault_inject { 313b9e03857SThomas Tai struct fault_attr attr; 314b9e03857SThomas Tai struct dentry *parent; 315b9e03857SThomas Tai bool dont_retry; /* DNR, do not retry */ 316b9e03857SThomas Tai u16 status; /* status code */ 317b9e03857SThomas Tai }; 318b9e03857SThomas Tai #endif 319b9e03857SThomas Tai 32057dacad5SJay Sternberg struct nvme_ns { 32157dacad5SJay Sternberg struct list_head list; 32257dacad5SJay Sternberg 3231c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 32457dacad5SJay Sternberg struct request_queue *queue; 32557dacad5SJay Sternberg struct gendisk *disk; 3260d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 3270d0b660fSChristoph Hellwig enum nvme_ana_state ana_state; 3280d0b660fSChristoph Hellwig u32 ana_grpid; 3290d0b660fSChristoph Hellwig #endif 330ed754e5dSChristoph Hellwig struct list_head siblings; 331b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 33257dacad5SJay Sternberg struct kref kref; 333ed754e5dSChristoph Hellwig struct nvme_ns_head *head; 33457dacad5SJay Sternberg 33557dacad5SJay Sternberg int lba_shift; 33657dacad5SJay Sternberg u16 ms; 337f5d11840SJens Axboe u16 sgs; 338f5d11840SJens Axboe u32 sws; 33957dacad5SJay Sternberg bool ext; 34057dacad5SJay Sternberg u8 pi_type; 341646017a6SKeith Busch unsigned long flags; 342646017a6SKeith Busch #define NVME_NS_REMOVING 0 34369d9a99cSKeith Busch #define NVME_NS_DEAD 1 3440d0b660fSChristoph Hellwig #define NVME_NS_ANA_PENDING 2 34557eeaf8eSChristoph Hellwig u16 noiob; 346b9e03857SThomas Tai 347b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 348b9e03857SThomas Tai struct nvme_fault_inject fault_inject; 349b9e03857SThomas Tai #endif 350b9e03857SThomas Tai 35157dacad5SJay Sternberg }; 35257dacad5SJay Sternberg 3531c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 3541a353d85SMing Lin const char *name; 355e439bb12SSagi Grimberg struct module *module; 356d3d5b87dSChristoph Hellwig unsigned int flags; 357d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 358c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 359e0596ab2SLogan Gunthorpe #define NVME_F_PCI_P2PDMA (1 << 2) 3601c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 3615fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 3627fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 3631673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 364ad22c355SKeith Busch void (*submit_async_event)(struct nvme_ctrl *ctrl); 365c5017e85SChristoph Hellwig void (*delete_ctrl)(struct nvme_ctrl *ctrl); 3661a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 36757dacad5SJay Sternberg }; 36857dacad5SJay Sternberg 369b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 370b9e03857SThomas Tai void nvme_fault_inject_init(struct nvme_ns *ns); 371b9e03857SThomas Tai void nvme_fault_inject_fini(struct nvme_ns *ns); 372b9e03857SThomas Tai void nvme_should_fail(struct request *req); 373b9e03857SThomas Tai #else 374b9e03857SThomas Tai static inline void nvme_fault_inject_init(struct nvme_ns *ns) {} 375b9e03857SThomas Tai static inline void nvme_fault_inject_fini(struct nvme_ns *ns) {} 376b9e03857SThomas Tai static inline void nvme_should_fail(struct request *req) {} 377b9e03857SThomas Tai #endif 378b9e03857SThomas Tai 379f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 380f3ca80fcSChristoph Hellwig { 381f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 382f3ca80fcSChristoph Hellwig return -ENOTTY; 383f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 384f3ca80fcSChristoph Hellwig } 385f3ca80fcSChristoph Hellwig 38657dacad5SJay Sternberg static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 38757dacad5SJay Sternberg { 38857dacad5SJay Sternberg return (sector >> (ns->lba_shift - 9)); 38957dacad5SJay Sternberg } 39057dacad5SJay Sternberg 39127fa9bc5SChristoph Hellwig static inline void nvme_end_request(struct request *req, __le16 status, 39227fa9bc5SChristoph Hellwig union nvme_result result) 39315a190f7SChristoph Hellwig { 39427fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 39527fa9bc5SChristoph Hellwig 39627fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 39727fa9bc5SChristoph Hellwig rq->result = result; 398b9e03857SThomas Tai /* inject error when permitted by fault injection framework */ 399b9e03857SThomas Tai nvme_should_fail(req); 40008e0029aSChristoph Hellwig blk_mq_complete_request(req); 40115a190f7SChristoph Hellwig } 40215a190f7SChristoph Hellwig 403d22524a4SChristoph Hellwig static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 404d22524a4SChristoph Hellwig { 405d22524a4SChristoph Hellwig get_device(ctrl->device); 406d22524a4SChristoph Hellwig } 407d22524a4SChristoph Hellwig 408d22524a4SChristoph Hellwig static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 409d22524a4SChristoph Hellwig { 410d22524a4SChristoph Hellwig put_device(ctrl->device); 411d22524a4SChristoph Hellwig } 412d22524a4SChristoph Hellwig 41377f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 4147baa8572SJens Axboe bool nvme_cancel_request(struct request *req, void *data, bool reserved); 415bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 416bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 4175fd4ce1bSChristoph Hellwig int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 4185fd4ce1bSChristoph Hellwig int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 4195fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 420f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 421f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 42253029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 423d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 424d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 4251673f1f0SChristoph Hellwig void nvme_put_ctrl(struct nvme_ctrl *ctrl); 4267fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 4275bae7f73SChristoph Hellwig 4285bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 4291673f1f0SChristoph Hellwig 4304f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 4314f1244c8SChristoph Hellwig bool send); 432a98e58e5SScott Bauer 4337bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 434287a63ebSChristoph Hellwig volatile union nvme_result *res); 435f866fc42SChristoph Hellwig 43625646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 43725646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 43869d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 439302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 440302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 441302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 442302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 443363c9aacSSagi Grimberg 444eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 4454160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 4469a95e4efSBart Van Assche struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 447f7f1fc36SMax Gurtovoy void nvme_cleanup_cmd(struct request *req); 448fc17b653SChristoph Hellwig blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 4498093f7caSMing Lin struct nvme_command *cmd); 45057dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 45157dacad5SJay Sternberg void *buf, unsigned bufflen); 45257dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 453d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 4549a95e4efSBart Van Assche unsigned timeout, int qid, int at_head, 4556287b51cSSagi Grimberg blk_mq_req_flags_t flags, bool poll); 4569a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 457038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 458d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 45979c48ccfSSagi Grimberg int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 460c5017e85SChristoph Hellwig int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 46157dacad5SJay Sternberg 4620e98719bSChristoph Hellwig int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 4630e98719bSChristoph Hellwig void *log, size_t size, u64 offset); 464d558fb51SMatias Bjørling 46533b14f67SHannes Reinecke extern const struct attribute_group *nvme_ns_id_attr_groups[]; 46632acab31SChristoph Hellwig extern const struct block_device_operations nvme_ns_head_ops; 46732acab31SChristoph Hellwig 46832acab31SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 4690d0b660fSChristoph Hellwig bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl); 470a785dbccSKeith Busch void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 471a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags); 47232acab31SChristoph Hellwig void nvme_failover_req(struct request *req); 47332acab31SChristoph Hellwig void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 47432acab31SChristoph Hellwig int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 4750d0b660fSChristoph Hellwig void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 47632acab31SChristoph Hellwig void nvme_mpath_remove_disk(struct nvme_ns_head *head); 4770d0b660fSChristoph Hellwig int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 4780d0b660fSChristoph Hellwig void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 4790d0b660fSChristoph Hellwig void nvme_mpath_stop(struct nvme_ctrl *ctrl); 480f3334447SChristoph Hellwig void nvme_mpath_clear_current_path(struct nvme_ns *ns); 48132acab31SChristoph Hellwig struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 482479a322fSSagi Grimberg 483479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 484479a322fSSagi Grimberg { 485479a322fSSagi Grimberg struct nvme_ns_head *head = ns->head; 486479a322fSSagi Grimberg 487479a322fSSagi Grimberg if (head->disk && list_empty(&head->list)) 488479a322fSSagi Grimberg kblockd_schedule_work(&head->requeue_work); 489479a322fSSagi Grimberg } 490479a322fSSagi Grimberg 4910d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_grpid; 4920d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_state; 49375c10e73SHannes Reinecke extern struct device_attribute subsys_attr_iopolicy; 4940d0b660fSChristoph Hellwig 49532acab31SChristoph Hellwig #else 4960d0b660fSChristoph Hellwig static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 4970d0b660fSChristoph Hellwig { 4980d0b660fSChristoph Hellwig return false; 4990d0b660fSChristoph Hellwig } 500a785dbccSKeith Busch /* 501a785dbccSKeith Busch * Without the multipath code enabled, multiple controller per subsystems are 502a785dbccSKeith Busch * visible as devices and thus we cannot use the subsystem instance. 503a785dbccSKeith Busch */ 504a785dbccSKeith Busch static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 505a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags) 506a785dbccSKeith Busch { 507a785dbccSKeith Busch sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 508a785dbccSKeith Busch } 509a785dbccSKeith Busch 51032acab31SChristoph Hellwig static inline void nvme_failover_req(struct request *req) 51132acab31SChristoph Hellwig { 51232acab31SChristoph Hellwig } 51332acab31SChristoph Hellwig static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 51432acab31SChristoph Hellwig { 51532acab31SChristoph Hellwig } 51632acab31SChristoph Hellwig static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 51732acab31SChristoph Hellwig struct nvme_ns_head *head) 51832acab31SChristoph Hellwig { 51932acab31SChristoph Hellwig return 0; 52032acab31SChristoph Hellwig } 5210d0b660fSChristoph Hellwig static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 5220d0b660fSChristoph Hellwig struct nvme_id_ns *id) 52332acab31SChristoph Hellwig { 52432acab31SChristoph Hellwig } 52532acab31SChristoph Hellwig static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 52632acab31SChristoph Hellwig { 52732acab31SChristoph Hellwig } 52832acab31SChristoph Hellwig static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns) 52932acab31SChristoph Hellwig { 53032acab31SChristoph Hellwig } 531479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 532479a322fSSagi Grimberg { 533479a322fSSagi Grimberg } 5340d0b660fSChristoph Hellwig static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 5350d0b660fSChristoph Hellwig struct nvme_id_ctrl *id) 5360d0b660fSChristoph Hellwig { 53714a1336eSChristoph Hellwig if (ctrl->subsys->cmic & (1 << 3)) 53814a1336eSChristoph Hellwig dev_warn(ctrl->device, 53914a1336eSChristoph Hellwig "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 5400d0b660fSChristoph Hellwig return 0; 5410d0b660fSChristoph Hellwig } 5420d0b660fSChristoph Hellwig static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 5430d0b660fSChristoph Hellwig { 5440d0b660fSChristoph Hellwig } 5450d0b660fSChristoph Hellwig static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 5460d0b660fSChristoph Hellwig { 5470d0b660fSChristoph Hellwig } 54832acab31SChristoph Hellwig #endif /* CONFIG_NVME_MULTIPATH */ 54932acab31SChristoph Hellwig 550c4699e70SKeith Busch #ifdef CONFIG_NVM 5513dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 552b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 55333b14f67SHannes Reinecke extern const struct attribute_group nvme_nvm_attr_group; 55484d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 555c4699e70SKeith Busch #else 556b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 5573dc87dd0SMatias Bjørling int node) 558c4699e70SKeith Busch { 559c4699e70SKeith Busch return 0; 560c4699e70SKeith Busch } 561c4699e70SKeith Busch 562b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 56384d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 56484d4add7SMatias Bjørling unsigned long arg) 56584d4add7SMatias Bjørling { 56684d4add7SMatias Bjørling return -ENOTTY; 56784d4add7SMatias Bjørling } 5683dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 5693dc87dd0SMatias Bjørling 57040267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 57140267efdSSimon A. F. Lund { 57240267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 57340267efdSSimon A. F. Lund } 574ca064085SMatias Bjørling 5755bae7f73SChristoph Hellwig int __init nvme_core_init(void); 5768eb5d89fSChengguang Xu void __exit nvme_core_exit(void); 5775bae7f73SChristoph Hellwig 57857dacad5SJay Sternberg #endif /* _NVME_H */ 579