1bc50ad75SChristoph Hellwig /* SPDX-License-Identifier: GPL-2.0 */ 257dacad5SJay Sternberg /* 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg */ 557dacad5SJay Sternberg 657dacad5SJay Sternberg #ifndef _NVME_H 757dacad5SJay Sternberg #define _NVME_H 857dacad5SJay Sternberg 957dacad5SJay Sternberg #include <linux/nvme.h> 10a6a5149bSChristoph Hellwig #include <linux/cdev.h> 1157dacad5SJay Sternberg #include <linux/pci.h> 1257dacad5SJay Sternberg #include <linux/kref.h> 1357dacad5SJay Sternberg #include <linux/blk-mq.h> 14a98e58e5SScott Bauer #include <linux/sed-opal.h> 15b9e03857SThomas Tai #include <linux/fault-inject.h> 16978628ecSJohannes Thumshirn #include <linux/rcupdate.h> 17c1ac9a4bSKeith Busch #include <linux/wait.h> 184d2ce688SJames Smart #include <linux/t10-pi.h> 1957dacad5SJay Sternberg 2035fe0d12SHannes Reinecke #include <trace/events/block.h> 2135fe0d12SHannes Reinecke 22*b668f2f5SMike Christie extern const struct pr_ops nvme_pr_ops; 23*b668f2f5SMike Christie 248ae4e447SMarc Olson extern unsigned int nvme_io_timeout; 2557dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2657dacad5SJay Sternberg 278ae4e447SMarc Olson extern unsigned int admin_timeout; 28dc96f938SChaitanya Kulkarni #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 2921d34711SChristoph Hellwig 30038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 31038bd4cbSSagi Grimberg 3238e18002SIsrael Rukshin #ifdef CONFIG_ARCH_NO_SG_CHAIN 3338e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 0 34ba7ca2aeSIsrael Rukshin #define NVME_INLINE_METADATA_SG_CNT 0 3538e18002SIsrael Rukshin #else 3638e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 2 37ba7ca2aeSIsrael Rukshin #define NVME_INLINE_METADATA_SG_CNT 1 3838e18002SIsrael Rukshin #endif 3938e18002SIsrael Rukshin 406c3c05b0SChaitanya Kulkarni /* 416c3c05b0SChaitanya Kulkarni * Default to a 4K page size, with the intention to update this 426c3c05b0SChaitanya Kulkarni * path in the future to accommodate architectures with differing 436c3c05b0SChaitanya Kulkarni * kernel and IO page sizes. 446c3c05b0SChaitanya Kulkarni */ 456c3c05b0SChaitanya Kulkarni #define NVME_CTRL_PAGE_SHIFT 12 466c3c05b0SChaitanya Kulkarni #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 476c3c05b0SChaitanya Kulkarni 489a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 49b227c59bSRoy Shterman extern struct workqueue_struct *nvme_reset_wq; 50b227c59bSRoy Shterman extern struct workqueue_struct *nvme_delete_wq; 519a6327d2SSagi Grimberg 5257dacad5SJay Sternberg /* 53106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 54106198edSChristoph Hellwig * the standard. 5557dacad5SJay Sternberg */ 56106198edSChristoph Hellwig enum nvme_quirks { 57106198edSChristoph Hellwig /* 58106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 59106198edSChristoph Hellwig * specific Identify field. 60106198edSChristoph Hellwig */ 61106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 62540c801cSKeith Busch 63540c801cSKeith Busch /* 64540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 65540c801cSKeith Busch * correctly. 66540c801cSKeith Busch */ 67540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 6808095e70SKeith Busch 6908095e70SKeith Busch /* 70e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 71e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 7208095e70SKeith Busch */ 73e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 7454adc010SGuilherme G. Piccoli 7554adc010SGuilherme G. Piccoli /* 7654adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 7754adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 7854adc010SGuilherme G. Piccoli */ 7954adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 80c5552fdeSAndy Lutomirski 81c5552fdeSAndy Lutomirski /* 82c5552fdeSAndy Lutomirski * APST should not be used. 83c5552fdeSAndy Lutomirski */ 84c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 85ff5350a8SAndy Lutomirski 86ff5350a8SAndy Lutomirski /* 87ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 88ff5350a8SAndy Lutomirski */ 89ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 90608cc4b1SChristoph Hellwig 91608cc4b1SChristoph Hellwig /* 929abd68efSJens Axboe * Set MEDIUM priority on SQ creation 939abd68efSJens Axboe */ 949abd68efSJens Axboe NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 956299358dSJames Dingwall 966299358dSJames Dingwall /* 976299358dSJames Dingwall * Ignore device provided subnqn. 986299358dSJames Dingwall */ 996299358dSJames Dingwall NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 1007b210e4eSChristoph Hellwig 1017b210e4eSChristoph Hellwig /* 1027b210e4eSChristoph Hellwig * Broken Write Zeroes. 1037b210e4eSChristoph Hellwig */ 1047b210e4eSChristoph Hellwig NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 105cb32de1bSMario Limonciello 106cb32de1bSMario Limonciello /* 107cb32de1bSMario Limonciello * Force simple suspend/resume path. 108cb32de1bSMario Limonciello */ 109cb32de1bSMario Limonciello NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 1107ad67ca5SLinus Torvalds 1117ad67ca5SLinus Torvalds /* 11266341331SBenjamin Herrenschmidt * Use only one interrupt vector for all queues 11366341331SBenjamin Herrenschmidt */ 1147ad67ca5SLinus Torvalds NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 11566341331SBenjamin Herrenschmidt 11666341331SBenjamin Herrenschmidt /* 11766341331SBenjamin Herrenschmidt * Use non-standard 128 bytes SQEs. 11866341331SBenjamin Herrenschmidt */ 1197ad67ca5SLinus Torvalds NVME_QUIRK_128_BYTES_SQES = (1 << 12), 120d38e9f04SBenjamin Herrenschmidt 121d38e9f04SBenjamin Herrenschmidt /* 122d38e9f04SBenjamin Herrenschmidt * Prevent tag overlap between queues 123d38e9f04SBenjamin Herrenschmidt */ 1247ad67ca5SLinus Torvalds NVME_QUIRK_SHARED_TAGS = (1 << 13), 1256c6aa2f2SAkinobu Mita 1266c6aa2f2SAkinobu Mita /* 1276c6aa2f2SAkinobu Mita * Don't change the value of the temperature threshold feature 1286c6aa2f2SAkinobu Mita */ 1296c6aa2f2SAkinobu Mita NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 1305bedd3afSChristoph Hellwig 1315bedd3afSChristoph Hellwig /* 1325bedd3afSChristoph Hellwig * The controller doesn't handle the Identify Namespace 1335bedd3afSChristoph Hellwig * Identification Descriptor list subcommand despite claiming 1345bedd3afSChristoph Hellwig * NVMe 1.3 compliance. 1355bedd3afSChristoph Hellwig */ 1365bedd3afSChristoph Hellwig NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 1374bdf2603SFilippo Sironi 1384bdf2603SFilippo Sironi /* 1394bdf2603SFilippo Sironi * The controller does not properly handle DMA addresses over 1404bdf2603SFilippo Sironi * 48 bits. 1414bdf2603SFilippo Sironi */ 1424bdf2603SFilippo Sironi NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 143a2941f6aSKeith Busch 144a2941f6aSKeith Busch /* 145b7df575fSXiang wangx * The controller requires the command_id value be limited, so skip 146a2941f6aSKeith Busch * encoding the generation sequence number. 147a2941f6aSKeith Busch */ 148a2941f6aSKeith Busch NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 14900ff400eSChristoph Hellwig 15000ff400eSChristoph Hellwig /* 15100ff400eSChristoph Hellwig * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 15200ff400eSChristoph Hellwig */ 15300ff400eSChristoph Hellwig NVME_QUIRK_BOGUS_NID = (1 << 18), 154106198edSChristoph Hellwig }; 155106198edSChristoph Hellwig 156d49187e9SChristoph Hellwig /* 157d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 158d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 159d49187e9SChristoph Hellwig */ 160d49187e9SChristoph Hellwig struct nvme_request { 161d49187e9SChristoph Hellwig struct nvme_command *cmd; 162d49187e9SChristoph Hellwig union nvme_result result; 163e7006de6SSagi Grimberg u8 genctr; 16444e44b29SChristoph Hellwig u8 retries; 16527fa9bc5SChristoph Hellwig u8 flags; 16627fa9bc5SChristoph Hellwig u16 status; 167d4d957b5SSagi Grimberg #ifdef CONFIG_NVME_MULTIPATH 168d4d957b5SSagi Grimberg unsigned long start_time; 169d4d957b5SSagi Grimberg #endif 17059e29ce6SSagi Grimberg struct nvme_ctrl *ctrl; 17127fa9bc5SChristoph Hellwig }; 17227fa9bc5SChristoph Hellwig 17332acab31SChristoph Hellwig /* 17432acab31SChristoph Hellwig * Mark a bio as coming in through the mpath node. 17532acab31SChristoph Hellwig */ 17632acab31SChristoph Hellwig #define REQ_NVME_MPATH REQ_DRV 17732acab31SChristoph Hellwig 17827fa9bc5SChristoph Hellwig enum { 17927fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 180bb06ec31SJames Smart NVME_REQ_USERCMD = (1 << 1), 181d4d957b5SSagi Grimberg NVME_MPATH_IO_STATS = (1 << 2), 182d49187e9SChristoph Hellwig }; 183d49187e9SChristoph Hellwig 184d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 185d49187e9SChristoph Hellwig { 186d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 187d49187e9SChristoph Hellwig } 188d49187e9SChristoph Hellwig 1895d87eb94SKeith Busch static inline u16 nvme_req_qid(struct request *req) 1905d87eb94SKeith Busch { 191643c476dSKeith Busch if (!req->q->queuedata) 1925d87eb94SKeith Busch return 0; 19384115d6dSBaolin Wang 19484115d6dSBaolin Wang return req->mq_hctx->queue_num + 1; 1955d87eb94SKeith Busch } 1965d87eb94SKeith Busch 19754adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 19854adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 19954adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 20054adc010SGuilherme G. Piccoli * found empirically. 20154adc010SGuilherme G. Piccoli */ 2028c97eeccSJeff Lien #define NVME_QUIRK_DELAY_AMOUNT 2300 20354adc010SGuilherme G. Piccoli 2044212f4e9SSagi Grimberg /* 2054212f4e9SSagi Grimberg * enum nvme_ctrl_state: Controller state 2064212f4e9SSagi Grimberg * 2074212f4e9SSagi Grimberg * @NVME_CTRL_NEW: New controller just allocated, initial state 2084212f4e9SSagi Grimberg * @NVME_CTRL_LIVE: Controller is connected and I/O capable 2094212f4e9SSagi Grimberg * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 2104212f4e9SSagi Grimberg * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 2114212f4e9SSagi Grimberg * transport 2124212f4e9SSagi Grimberg * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 213ecca390eSSagi Grimberg * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 214ecca390eSSagi Grimberg * disabled/failed immediately. This state comes 215ecca390eSSagi Grimberg * after all async event processing took place and 216ecca390eSSagi Grimberg * before ns removal and the controller deletion 217ecca390eSSagi Grimberg * progress 2184212f4e9SSagi Grimberg * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 2194212f4e9SSagi Grimberg * shutdown or removal. In this case we forcibly 2204212f4e9SSagi Grimberg * kill all inflight I/O as they have no chance to 2214212f4e9SSagi Grimberg * complete 2224212f4e9SSagi Grimberg */ 223bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 224bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 225bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 226bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 227ad6a0a52SMax Gurtovoy NVME_CTRL_CONNECTING, 228bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 229ecca390eSSagi Grimberg NVME_CTRL_DELETING_NOIO, 2300ff9d4e1SKeith Busch NVME_CTRL_DEAD, 231bb8d261eSChristoph Hellwig }; 232bb8d261eSChristoph Hellwig 233a3646451SAkinobu Mita struct nvme_fault_inject { 234a3646451SAkinobu Mita #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 235a3646451SAkinobu Mita struct fault_attr attr; 236a3646451SAkinobu Mita struct dentry *parent; 237a3646451SAkinobu Mita bool dont_retry; /* DNR, do not retry */ 238a3646451SAkinobu Mita u16 status; /* status code */ 239a3646451SAkinobu Mita #endif 240a3646451SAkinobu Mita }; 241a3646451SAkinobu Mita 242bf093d97SSagi Grimberg enum nvme_ctrl_flags { 243bf093d97SSagi Grimberg NVME_CTRL_FAILFAST_EXPIRED = 0, 244bf093d97SSagi Grimberg NVME_CTRL_ADMIN_Q_STOPPED = 1, 245f46ef9e8SSagi Grimberg NVME_CTRL_STARTED_ONCE = 2, 24698d81f0dSChao Leng NVME_CTRL_STOPPED = 3, 247bf093d97SSagi Grimberg }; 248bf093d97SSagi Grimberg 2491c63dc66SChristoph Hellwig struct nvme_ctrl { 2506e3ca03eSSagi Grimberg bool comp_seen; 251bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 252bd4da3abSAndy Lutomirski bool identified; 253bb8d261eSChristoph Hellwig spinlock_t lock; 254e7ad43c3SKeith Busch struct mutex scan_lock; 2551c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 25657dacad5SJay Sternberg struct request_queue *admin_q; 25707bfcd09SChristoph Hellwig struct request_queue *connect_q; 258e7832cb4SSagi Grimberg struct request_queue *fabrics_q; 25957dacad5SJay Sternberg struct device *dev; 26057dacad5SJay Sternberg int instance; 261103e515eSHannes Reinecke int numa_node; 2625bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 26334b6c231SSagi Grimberg struct blk_mq_tag_set *admin_tagset; 2645bae7f73SChristoph Hellwig struct list_head namespaces; 265765cc031SJianchao Wang struct rw_semaphore namespaces_rwsem; 266d22524a4SChristoph Hellwig struct device ctrl_device; 2675bae7f73SChristoph Hellwig struct device *device; /* char device */ 268ed7770f6SHannes Reinecke #ifdef CONFIG_NVME_HWMON 269ed7770f6SHannes Reinecke struct device *hwmon_device; 270ed7770f6SHannes Reinecke #endif 271a6a5149bSChristoph Hellwig struct cdev cdev; 272d86c4d8eSChristoph Hellwig struct work_struct reset_work; 273c5017e85SChristoph Hellwig struct work_struct delete_work; 274c1ac9a4bSKeith Busch wait_queue_head_t state_wq; 2751c63dc66SChristoph Hellwig 276ab9e00ccSChristoph Hellwig struct nvme_subsystem *subsys; 277ab9e00ccSChristoph Hellwig struct list_head subsys_entry; 278ab9e00ccSChristoph Hellwig 2794f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 280a98e58e5SScott Bauer 28157dacad5SJay Sternberg char name[12]; 28276e3914aSChristoph Hellwig u16 cntlid; 2835fd4ce1bSChristoph Hellwig 2845fd4ce1bSChristoph Hellwig u32 ctrl_config; 285b6dccf7fSArnav Dawn u16 mtfa; 286d858e5f0SSagi Grimberg u32 queue_count; 2875fd4ce1bSChristoph Hellwig 28820d0dfe6SSagi Grimberg u64 cap; 28957dacad5SJay Sternberg u32 max_hw_sectors; 290943e942eSJens Axboe u32 max_segments; 29195093350SMax Gurtovoy u32 max_integrity_segments; 2925befc7c2SKeith Busch u32 max_discard_sectors; 2935befc7c2SKeith Busch u32 max_discard_segments; 2945befc7c2SKeith Busch u32 max_zeroes_sectors; 295240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 296240e6ee2SKeith Busch u32 max_zone_append; 297240e6ee2SKeith Busch #endif 29849cd84b6SKeith Busch u16 crdt[3]; 29957dacad5SJay Sternberg u16 oncs; 3001a86924eSTom Yan u32 dmrsl; 3018a9ae523SScott Bauer u16 oacs; 302f968688fSKeith Busch u16 sqsize; 3030d0b660fSChristoph Hellwig u32 max_namespaces; 3046bf25d16SChristoph Hellwig atomic_t abort_limit; 30557dacad5SJay Sternberg u8 vwc; 306f3ca80fcSChristoph Hellwig u32 vs; 30707bfcd09SChristoph Hellwig u32 sgls; 308038bd4cbSSagi Grimberg u16 kas; 309c5552fdeSAndy Lutomirski u8 npss; 310c5552fdeSAndy Lutomirski u8 apsta; 311400b6a7bSGuenter Roeck u16 wctemp; 312400b6a7bSGuenter Roeck u16 cctemp; 313c0561f82SHannes Reinecke u32 oaes; 314e3d7874dSKeith Busch u32 aen_result; 3153e53ba38SSagi Grimberg u32 ctratt; 31607fbd32aSMartin K. Petersen unsigned int shutdown_timeout; 317038bd4cbSSagi Grimberg unsigned int kato; 318f3ca80fcSChristoph Hellwig bool subsystem; 319106198edSChristoph Hellwig unsigned long quirks; 320c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 32184fef62dSKeith Busch struct nvme_effects_log *effects; 3221cf7a12eSChaitanya Kulkarni struct xarray cels; 3235955be21SChristoph Hellwig struct work_struct scan_work; 324f866fc42SChristoph Hellwig struct work_struct async_event_work; 325038bd4cbSSagi Grimberg struct delayed_work ka_work; 3268c4dfea9SVictor Gladkov struct delayed_work failfast_work; 3270a34e466SRoland Dreier struct nvme_command ka_cmd; 328b6dccf7fSArnav Dawn struct work_struct fw_act_work; 32930d90964SChristoph Hellwig unsigned long events; 33007bfcd09SChristoph Hellwig 3310d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 3320d0b660fSChristoph Hellwig /* asymmetric namespace access: */ 3330d0b660fSChristoph Hellwig u8 anacap; 3340d0b660fSChristoph Hellwig u8 anatt; 3350d0b660fSChristoph Hellwig u32 anagrpmax; 3360d0b660fSChristoph Hellwig u32 nanagrpid; 3370d0b660fSChristoph Hellwig struct mutex ana_lock; 3380d0b660fSChristoph Hellwig struct nvme_ana_rsp_hdr *ana_log_buf; 3390d0b660fSChristoph Hellwig size_t ana_log_size; 3400d0b660fSChristoph Hellwig struct timer_list anatt_timer; 3410d0b660fSChristoph Hellwig struct work_struct ana_work; 3420d0b660fSChristoph Hellwig #endif 3430d0b660fSChristoph Hellwig 344f50fff73SHannes Reinecke #ifdef CONFIG_NVME_AUTH 345f50fff73SHannes Reinecke struct work_struct dhchap_auth_work; 346f50fff73SHannes Reinecke struct mutex dhchap_auth_mutex; 347aa36d711SSagi Grimberg struct nvme_dhchap_queue_context *dhchap_ctxs; 348f50fff73SHannes Reinecke struct nvme_dhchap_key *host_key; 349f50fff73SHannes Reinecke struct nvme_dhchap_key *ctrl_key; 350f50fff73SHannes Reinecke u16 transaction; 351f50fff73SHannes Reinecke #endif 352f50fff73SHannes Reinecke 353c5552fdeSAndy Lutomirski /* Power saving configuration */ 354c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 35576a5af84SKai-Heng Feng bool apst_enabled; 356c5552fdeSAndy Lutomirski 357044a9df1SChristoph Hellwig /* PCIe only: */ 358fe6d53c9SChristoph Hellwig u32 hmpre; 359fe6d53c9SChristoph Hellwig u32 hmmin; 360044a9df1SChristoph Hellwig u32 hmminds; 361044a9df1SChristoph Hellwig u16 hmmaxd; 362fe6d53c9SChristoph Hellwig 36307bfcd09SChristoph Hellwig /* Fabrics only */ 36407bfcd09SChristoph Hellwig u32 ioccsz; 36507bfcd09SChristoph Hellwig u32 iorcsz; 36607bfcd09SChristoph Hellwig u16 icdoff; 36707bfcd09SChristoph Hellwig u16 maxcmd; 368fdf9dfa8SSagi Grimberg int nr_reconnects; 3698c4dfea9SVictor Gladkov unsigned long flags; 37007bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 371cb5b7262SJens Axboe 372cb5b7262SJens Axboe struct page *discard_page; 373cb5b7262SJens Axboe unsigned long discard_page_busy; 374f79d5fdaSAkinobu Mita 375f79d5fdaSAkinobu Mita struct nvme_fault_inject fault_inject; 37686c2457aSMartin Belanger 37786c2457aSMartin Belanger enum nvme_ctrl_type cntrltype; 37886c2457aSMartin Belanger enum nvme_dctype dctype; 37957dacad5SJay Sternberg }; 38057dacad5SJay Sternberg 38175c10e73SHannes Reinecke enum nvme_iopolicy { 38275c10e73SHannes Reinecke NVME_IOPOLICY_NUMA, 38375c10e73SHannes Reinecke NVME_IOPOLICY_RR, 38475c10e73SHannes Reinecke }; 38575c10e73SHannes Reinecke 386ab9e00ccSChristoph Hellwig struct nvme_subsystem { 387ab9e00ccSChristoph Hellwig int instance; 388ab9e00ccSChristoph Hellwig struct device dev; 389ab9e00ccSChristoph Hellwig /* 390ab9e00ccSChristoph Hellwig * Because we unregister the device on the last put we need 391ab9e00ccSChristoph Hellwig * a separate refcount. 392ab9e00ccSChristoph Hellwig */ 393ab9e00ccSChristoph Hellwig struct kref ref; 394ab9e00ccSChristoph Hellwig struct list_head entry; 395ab9e00ccSChristoph Hellwig struct mutex lock; 396ab9e00ccSChristoph Hellwig struct list_head ctrls; 397ed754e5dSChristoph Hellwig struct list_head nsheads; 398ab9e00ccSChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 399ab9e00ccSChristoph Hellwig char serial[20]; 400ab9e00ccSChristoph Hellwig char model[40]; 401ab9e00ccSChristoph Hellwig char firmware_rev[8]; 402ab9e00ccSChristoph Hellwig u8 cmic; 403954ae166SHannes Reinecke enum nvme_subsys_type subtype; 404ab9e00ccSChristoph Hellwig u16 vendor_id; 40581adb863SBart Van Assche u16 awupf; /* 0's based awupf value. */ 406ed754e5dSChristoph Hellwig struct ida ns_ida; 40775c10e73SHannes Reinecke #ifdef CONFIG_NVME_MULTIPATH 40875c10e73SHannes Reinecke enum nvme_iopolicy iopolicy; 40975c10e73SHannes Reinecke #endif 410ab9e00ccSChristoph Hellwig }; 411ab9e00ccSChristoph Hellwig 412002fab04SChristoph Hellwig /* 413002fab04SChristoph Hellwig * Container structure for uniqueue namespace identifiers. 414002fab04SChristoph Hellwig */ 415002fab04SChristoph Hellwig struct nvme_ns_ids { 416002fab04SChristoph Hellwig u8 eui64[8]; 417002fab04SChristoph Hellwig u8 nguid[16]; 418002fab04SChristoph Hellwig uuid_t uuid; 41971010c30SNiklas Cassel u8 csi; 420002fab04SChristoph Hellwig }; 421002fab04SChristoph Hellwig 422ed754e5dSChristoph Hellwig /* 423ed754e5dSChristoph Hellwig * Anchor structure for namespaces. There is one for each namespace in a 424ed754e5dSChristoph Hellwig * NVMe subsystem that any of our controllers can see, and the namespace 425ed754e5dSChristoph Hellwig * structure for each controller is chained of it. For private namespaces 426ed754e5dSChristoph Hellwig * there is a 1:1 relation to our namespace structures, that is ->list 427ed754e5dSChristoph Hellwig * only ever has a single entry for private namespaces. 428ed754e5dSChristoph Hellwig */ 429ed754e5dSChristoph Hellwig struct nvme_ns_head { 430ed754e5dSChristoph Hellwig struct list_head list; 431ed754e5dSChristoph Hellwig struct srcu_struct srcu; 432ed754e5dSChristoph Hellwig struct nvme_subsystem *subsys; 433ed754e5dSChristoph Hellwig unsigned ns_id; 434ed754e5dSChristoph Hellwig struct nvme_ns_ids ids; 435ed754e5dSChristoph Hellwig struct list_head entry; 436ed754e5dSChristoph Hellwig struct kref ref; 4370c284db7SKeith Busch bool shared; 438ed754e5dSChristoph Hellwig int instance; 439be93e87eSKeith Busch struct nvme_effects_log *effects; 4402637baedSMinwoo Im 4412637baedSMinwoo Im struct cdev cdev; 4422637baedSMinwoo Im struct device cdev_device; 4432637baedSMinwoo Im 444f3334447SChristoph Hellwig struct gendisk *disk; 44530897388SMinwoo Im #ifdef CONFIG_NVME_MULTIPATH 446f3334447SChristoph Hellwig struct bio_list requeue_list; 447f3334447SChristoph Hellwig spinlock_t requeue_lock; 448f3334447SChristoph Hellwig struct work_struct requeue_work; 449f3334447SChristoph Hellwig struct mutex lock; 450d8a22f85SAnton Eidelman unsigned long flags; 451d8a22f85SAnton Eidelman #define NVME_NSHEAD_DISK_LIVE 0 452f3334447SChristoph Hellwig struct nvme_ns __rcu *current_path[]; 453f3334447SChristoph Hellwig #endif 454ed754e5dSChristoph Hellwig }; 455ed754e5dSChristoph Hellwig 45630897388SMinwoo Im static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 45730897388SMinwoo Im { 45830897388SMinwoo Im return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 45930897388SMinwoo Im } 46030897388SMinwoo Im 461ffc89b1dSMax Gurtovoy enum nvme_ns_features { 462ffc89b1dSMax Gurtovoy NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 463b29f8485SMax Gurtovoy NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 4641b96f862SChristoph Hellwig NVME_NS_DEAC, /* DEAC bit in Write Zeores supported */ 465ffc89b1dSMax Gurtovoy }; 466ffc89b1dSMax Gurtovoy 46757dacad5SJay Sternberg struct nvme_ns { 46857dacad5SJay Sternberg struct list_head list; 46957dacad5SJay Sternberg 4701c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 47157dacad5SJay Sternberg struct request_queue *queue; 47257dacad5SJay Sternberg struct gendisk *disk; 4730d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 4740d0b660fSChristoph Hellwig enum nvme_ana_state ana_state; 4750d0b660fSChristoph Hellwig u32 ana_grpid; 4760d0b660fSChristoph Hellwig #endif 477ed754e5dSChristoph Hellwig struct list_head siblings; 47857dacad5SJay Sternberg struct kref kref; 479ed754e5dSChristoph Hellwig struct nvme_ns_head *head; 48057dacad5SJay Sternberg 48157dacad5SJay Sternberg int lba_shift; 48257dacad5SJay Sternberg u16 ms; 4834020aad8SKeith Busch u16 pi_size; 484f5d11840SJens Axboe u16 sgs; 485f5d11840SJens Axboe u32 sws; 48657dacad5SJay Sternberg u8 pi_type; 4874020aad8SKeith Busch u8 guard_type; 488240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 489240e6ee2SKeith Busch u64 zsze; 490240e6ee2SKeith Busch #endif 491ffc89b1dSMax Gurtovoy unsigned long features; 492646017a6SKeith Busch unsigned long flags; 493646017a6SKeith Busch #define NVME_NS_REMOVING 0 4940d0b660fSChristoph Hellwig #define NVME_NS_ANA_PENDING 2 4952f4c9ba2SJavier González #define NVME_NS_FORCE_RO 3 496e7d65803SHannes Reinecke #define NVME_NS_READY 4 497b9e03857SThomas Tai 4982637baedSMinwoo Im struct cdev cdev; 4992637baedSMinwoo Im struct device cdev_device; 5002637baedSMinwoo Im 501b9e03857SThomas Tai struct nvme_fault_inject fault_inject; 502b9e03857SThomas Tai 50357dacad5SJay Sternberg }; 50457dacad5SJay Sternberg 5054d2ce688SJames Smart /* NVMe ns supports metadata actions by the controller (generate/strip) */ 5064d2ce688SJames Smart static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 5074d2ce688SJames Smart { 5084020aad8SKeith Busch return ns->pi_type && ns->ms == ns->pi_size; 5094d2ce688SJames Smart } 5104d2ce688SJames Smart 5111c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 5121a353d85SMing Lin const char *name; 513e439bb12SSagi Grimberg struct module *module; 514d3d5b87dSChristoph Hellwig unsigned int flags; 515d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 516c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 517db45e1a5SChristoph Hellwig #define NVME_F_BLOCKING (1 << 2) 518db45e1a5SChristoph Hellwig 51986adbf0cSChristoph Hellwig const struct attribute_group **dev_attr_groups; 5201c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 5215fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 5227fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 5231673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 524ad22c355SKeith Busch void (*submit_async_event)(struct nvme_ctrl *ctrl); 525c5017e85SChristoph Hellwig void (*delete_ctrl)(struct nvme_ctrl *ctrl); 526f7f70f4aSRuozhu Li void (*stop_ctrl)(struct nvme_ctrl *ctrl); 5271a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 5282f0dad17SKeith Busch void (*print_device_info)(struct nvme_ctrl *ctrl); 5292f859441SLogan Gunthorpe bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 53057dacad5SJay Sternberg }; 53157dacad5SJay Sternberg 532e7006de6SSagi Grimberg /* 533e7006de6SSagi Grimberg * nvme command_id is constructed as such: 534e7006de6SSagi Grimberg * | xxxx | xxxxxxxxxxxx | 535e7006de6SSagi Grimberg * gen request tag 536e7006de6SSagi Grimberg */ 537e7006de6SSagi Grimberg #define nvme_genctr_mask(gen) (gen & 0xf) 538e7006de6SSagi Grimberg #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 539e7006de6SSagi Grimberg #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 540e7006de6SSagi Grimberg #define nvme_tag_from_cid(cid) (cid & 0xfff) 541e7006de6SSagi Grimberg 542e7006de6SSagi Grimberg static inline u16 nvme_cid(struct request *rq) 543e7006de6SSagi Grimberg { 544e7006de6SSagi Grimberg return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 545e7006de6SSagi Grimberg } 546e7006de6SSagi Grimberg 547e7006de6SSagi Grimberg static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 548e7006de6SSagi Grimberg u16 command_id) 549e7006de6SSagi Grimberg { 550e7006de6SSagi Grimberg u8 genctr = nvme_genctr_from_cid(command_id); 551e7006de6SSagi Grimberg u16 tag = nvme_tag_from_cid(command_id); 552e7006de6SSagi Grimberg struct request *rq; 553e7006de6SSagi Grimberg 554e7006de6SSagi Grimberg rq = blk_mq_tag_to_rq(tags, tag); 555e7006de6SSagi Grimberg if (unlikely(!rq)) { 556e7006de6SSagi Grimberg pr_err("could not locate request for tag %#x\n", 557e7006de6SSagi Grimberg tag); 558e7006de6SSagi Grimberg return NULL; 559e7006de6SSagi Grimberg } 560e7006de6SSagi Grimberg if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 561e7006de6SSagi Grimberg dev_err(nvme_req(rq)->ctrl->device, 562e7006de6SSagi Grimberg "request %#x genctr mismatch (got %#x expected %#x)\n", 563e7006de6SSagi Grimberg tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 564e7006de6SSagi Grimberg return NULL; 565e7006de6SSagi Grimberg } 566e7006de6SSagi Grimberg return rq; 567e7006de6SSagi Grimberg } 568e7006de6SSagi Grimberg 569e7006de6SSagi Grimberg static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 570e7006de6SSagi Grimberg u16 command_id) 571e7006de6SSagi Grimberg { 572e7006de6SSagi Grimberg return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 573e7006de6SSagi Grimberg } 574e7006de6SSagi Grimberg 5752f0dad17SKeith Busch /* 5762f0dad17SKeith Busch * Return the length of the string without the space padding 5772f0dad17SKeith Busch */ 5782f0dad17SKeith Busch static inline int nvme_strlen(char *s, int len) 5792f0dad17SKeith Busch { 5802f0dad17SKeith Busch while (s[len - 1] == ' ') 5812f0dad17SKeith Busch len--; 5822f0dad17SKeith Busch return len; 5832f0dad17SKeith Busch } 5842f0dad17SKeith Busch 5852f0dad17SKeith Busch static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 5862f0dad17SKeith Busch { 5872f0dad17SKeith Busch struct nvme_subsystem *subsys = ctrl->subsys; 5882f0dad17SKeith Busch 5892f0dad17SKeith Busch if (ctrl->ops->print_device_info) { 5902f0dad17SKeith Busch ctrl->ops->print_device_info(ctrl); 5912f0dad17SKeith Busch return; 5922f0dad17SKeith Busch } 5932f0dad17SKeith Busch 5942f0dad17SKeith Busch dev_err(ctrl->device, 5952f0dad17SKeith Busch "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 5962f0dad17SKeith Busch nvme_strlen(subsys->model, sizeof(subsys->model)), 5972f0dad17SKeith Busch subsys->model, nvme_strlen(subsys->firmware_rev, 5982f0dad17SKeith Busch sizeof(subsys->firmware_rev)), 5992f0dad17SKeith Busch subsys->firmware_rev); 6002f0dad17SKeith Busch } 6012f0dad17SKeith Busch 602b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 603a3646451SAkinobu Mita void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 604a3646451SAkinobu Mita const char *dev_name); 605a3646451SAkinobu Mita void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 606b9e03857SThomas Tai void nvme_should_fail(struct request *req); 607b9e03857SThomas Tai #else 608a3646451SAkinobu Mita static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 609a3646451SAkinobu Mita const char *dev_name) 610a3646451SAkinobu Mita { 611a3646451SAkinobu Mita } 612a3646451SAkinobu Mita static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 613a3646451SAkinobu Mita { 614a3646451SAkinobu Mita } 615b9e03857SThomas Tai static inline void nvme_should_fail(struct request *req) {} 616b9e03857SThomas Tai #endif 617b9e03857SThomas Tai 6181e866afdSKeith Busch bool nvme_wait_reset(struct nvme_ctrl *ctrl); 6191e866afdSKeith Busch int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 6201e866afdSKeith Busch 621f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 622f3ca80fcSChristoph Hellwig { 6231e866afdSKeith Busch int ret; 6241e866afdSKeith Busch 625f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 626f3ca80fcSChristoph Hellwig return -ENOTTY; 6271e866afdSKeith Busch if (!nvme_wait_reset(ctrl)) 6281e866afdSKeith Busch return -EBUSY; 6291e866afdSKeith Busch 6301e866afdSKeith Busch ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 6311e866afdSKeith Busch if (ret) 6321e866afdSKeith Busch return ret; 6331e866afdSKeith Busch 6341e866afdSKeith Busch return nvme_try_sched_reset(ctrl); 635f3ca80fcSChristoph Hellwig } 636f3ca80fcSChristoph Hellwig 637314d48ddSDamien Le Moal /* 638314d48ddSDamien Le Moal * Convert a 512B sector number to a device logical block number. 639314d48ddSDamien Le Moal */ 640314d48ddSDamien Le Moal static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 64157dacad5SJay Sternberg { 642314d48ddSDamien Le Moal return sector >> (ns->lba_shift - SECTOR_SHIFT); 64357dacad5SJay Sternberg } 64457dacad5SJay Sternberg 645e08f2ae8SDamien Le Moal /* 646e08f2ae8SDamien Le Moal * Convert a device logical block number to a 512B sector number. 647e08f2ae8SDamien Le Moal */ 648e08f2ae8SDamien Le Moal static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 649e08f2ae8SDamien Le Moal { 650e08f2ae8SDamien Le Moal return lba << (ns->lba_shift - SECTOR_SHIFT); 65157dacad5SJay Sternberg } 65257dacad5SJay Sternberg 65371fb90ebSKeith Busch /* 65471fb90ebSKeith Busch * Convert byte length to nvme's 0-based num dwords 65571fb90ebSKeith Busch */ 65671fb90ebSKeith Busch static inline u32 nvme_bytes_to_numd(size_t len) 65771fb90ebSKeith Busch { 65871fb90ebSKeith Busch return (len >> 2) - 1; 65971fb90ebSKeith Busch } 66071fb90ebSKeith Busch 6615ddaabe8SChristoph Hellwig static inline bool nvme_is_ana_error(u16 status) 6625ddaabe8SChristoph Hellwig { 6635ddaabe8SChristoph Hellwig switch (status & 0x7ff) { 6645ddaabe8SChristoph Hellwig case NVME_SC_ANA_TRANSITION: 6655ddaabe8SChristoph Hellwig case NVME_SC_ANA_INACCESSIBLE: 6665ddaabe8SChristoph Hellwig case NVME_SC_ANA_PERSISTENT_LOSS: 6675ddaabe8SChristoph Hellwig return true; 6685ddaabe8SChristoph Hellwig default: 6695ddaabe8SChristoph Hellwig return false; 6705ddaabe8SChristoph Hellwig } 6715ddaabe8SChristoph Hellwig } 6725ddaabe8SChristoph Hellwig 6735ddaabe8SChristoph Hellwig static inline bool nvme_is_path_error(u16 status) 6745ddaabe8SChristoph Hellwig { 6751e41f3bdSChristoph Hellwig /* check for a status code type of 'path related status' */ 6761e41f3bdSChristoph Hellwig return (status & 0x700) == 0x300; 6775ddaabe8SChristoph Hellwig } 6785ddaabe8SChristoph Hellwig 6792eb81a33SChristoph Hellwig /* 6802eb81a33SChristoph Hellwig * Fill in the status and result information from the CQE, and then figure out 6812eb81a33SChristoph Hellwig * if blk-mq will need to use IPI magic to complete the request, and if yes do 6822eb81a33SChristoph Hellwig * so. If not let the caller complete the request without an indirect function 6832eb81a33SChristoph Hellwig * call. 6842eb81a33SChristoph Hellwig */ 6852eb81a33SChristoph Hellwig static inline bool nvme_try_complete_req(struct request *req, __le16 status, 68627fa9bc5SChristoph Hellwig union nvme_result result) 68715a190f7SChristoph Hellwig { 68827fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 689e4fdb2b1SKeith Busch struct nvme_ctrl *ctrl = rq->ctrl; 690e4fdb2b1SKeith Busch 691e4fdb2b1SKeith Busch if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 692e4fdb2b1SKeith Busch rq->genctr++; 69327fa9bc5SChristoph Hellwig 69427fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 69527fa9bc5SChristoph Hellwig rq->result = result; 696b9e03857SThomas Tai /* inject error when permitted by fault injection framework */ 697b9e03857SThomas Tai nvme_should_fail(req); 698ff029451SChristoph Hellwig if (unlikely(blk_should_fake_timeout(req->q))) 699ff029451SChristoph Hellwig return true; 700ff029451SChristoph Hellwig return blk_mq_complete_request_remote(req); 70115a190f7SChristoph Hellwig } 70215a190f7SChristoph Hellwig 703d22524a4SChristoph Hellwig static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 704d22524a4SChristoph Hellwig { 705d22524a4SChristoph Hellwig get_device(ctrl->device); 706d22524a4SChristoph Hellwig } 707d22524a4SChristoph Hellwig 708d22524a4SChristoph Hellwig static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 709d22524a4SChristoph Hellwig { 710d22524a4SChristoph Hellwig put_device(ctrl->device); 711d22524a4SChristoph Hellwig } 712d22524a4SChristoph Hellwig 71358a8df67SIsrael Rukshin static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 71458a8df67SIsrael Rukshin { 715e7006de6SSagi Grimberg return !qid && 716e7006de6SSagi Grimberg nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 71758a8df67SIsrael Rukshin } 71858a8df67SIsrael Rukshin 71977f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 720c234a653SJens Axboe void nvme_complete_batch_req(struct request *req); 721c234a653SJens Axboe 722c234a653SJens Axboe static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 723c234a653SJens Axboe void (*fn)(struct request *rq)) 724c234a653SJens Axboe { 725c234a653SJens Axboe struct request *req; 726c234a653SJens Axboe 727c234a653SJens Axboe rq_list_for_each(&iob->req_list, req) { 728c234a653SJens Axboe fn(req); 729c234a653SJens Axboe nvme_complete_batch_req(req); 730c234a653SJens Axboe } 731c234a653SJens Axboe blk_mq_end_request_batch(iob); 732c234a653SJens Axboe } 733c234a653SJens Axboe 734dda3248eSChao Leng blk_status_t nvme_host_path_error(struct request *req); 7352dd6532eSJohn Garry bool nvme_cancel_request(struct request *req, void *data); 73625479069SChao Leng void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 73725479069SChao Leng void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 738bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 739bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 740285b6e9bSChristoph Hellwig int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 741c0f2f45bSSagi Grimberg int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 742f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 743f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 74453029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 745d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 746d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 74794cc781fSChristoph Hellwig int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 748fe60e8c5SChristoph Hellwig int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 749db45e1a5SChristoph Hellwig const struct blk_mq_ops *ops, unsigned int cmd_size); 750fe60e8c5SChristoph Hellwig void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 751fe60e8c5SChristoph Hellwig int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 752db45e1a5SChristoph Hellwig const struct blk_mq_ops *ops, unsigned int nr_maps, 753db45e1a5SChristoph Hellwig unsigned int cmd_size); 754fe60e8c5SChristoph Hellwig void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 7555bae7f73SChristoph Hellwig 7565bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 7571673f1f0SChristoph Hellwig 7587bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 759287a63ebSChristoph Hellwig volatile union nvme_result *res); 760f866fc42SChristoph Hellwig 7619f27bd70SChristoph Hellwig void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 7629f27bd70SChristoph Hellwig void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 7639f27bd70SChristoph Hellwig void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 7649f27bd70SChristoph Hellwig void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 765cd50f9b2SChristoph Hellwig void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 766d6135c3aSKeith Busch void nvme_sync_queues(struct nvme_ctrl *ctrl); 76704800fbfSChao Leng void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 768302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 769302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 7707cf0d7c0SSagi Grimberg int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 771302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 772363c9aacSSagi Grimberg 773f9ed86dcSBart Van Assche static inline enum req_op nvme_req_op(struct nvme_command *cmd) 774e559398fSChristoph Hellwig { 775e559398fSChristoph Hellwig return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 776e559398fSChristoph Hellwig } 777e559398fSChristoph Hellwig 778eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 779e559398fSChristoph Hellwig void nvme_init_request(struct request *req, struct nvme_command *cmd); 780f7f1fc36SMax Gurtovoy void nvme_cleanup_cmd(struct request *req); 781f4b9e6c9SKeith Busch blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 782a9715744STao Chiu blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 783a9715744STao Chiu struct request *req); 784a9715744STao Chiu bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 785a9715744STao Chiu bool queue_live); 786a9715744STao Chiu 787a9715744STao Chiu static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 788a9715744STao Chiu bool queue_live) 789a9715744STao Chiu { 790a9715744STao Chiu if (likely(ctrl->state == NVME_CTRL_LIVE)) 791a9715744STao Chiu return true; 792a9715744STao Chiu if (ctrl->ops->flags & NVME_F_FABRICS && 793a9715744STao Chiu ctrl->state == NVME_CTRL_DELETING) 7948b77fa6fSRuozhu Li return queue_live; 795a9715744STao Chiu return __nvme_check_ready(ctrl, rq, queue_live); 796a9715744STao Chiu } 7975974ea7cSSungup Moon 7985974ea7cSSungup Moon /* 7995974ea7cSSungup Moon * NSID shall be unique for all shared namespaces, or if at least one of the 8005974ea7cSSungup Moon * following conditions is met: 8015974ea7cSSungup Moon * 1. Namespace Management is supported by the controller 8025974ea7cSSungup Moon * 2. ANA is supported by the controller 8035974ea7cSSungup Moon * 3. NVM Set are supported by the controller 8045974ea7cSSungup Moon * 8055974ea7cSSungup Moon * In other case, private namespace are not required to report a unique NSID. 8065974ea7cSSungup Moon */ 8075974ea7cSSungup Moon static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 8085974ea7cSSungup Moon struct nvme_ns_head *head) 8095974ea7cSSungup Moon { 8105974ea7cSSungup Moon return head->shared || 8115974ea7cSSungup Moon (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 8125974ea7cSSungup Moon (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 8135974ea7cSSungup Moon (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 8145974ea7cSSungup Moon } 8155974ea7cSSungup Moon 81657dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 81757dacad5SJay Sternberg void *buf, unsigned bufflen); 81857dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 819d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 8206b46fa02SChaitanya Kulkarni int qid, int at_head, 821be42a33bSKeith Busch blk_mq_req_flags_t flags); 8221a87ee65SKeith Busch int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 8231a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 8241a87ee65SKeith Busch u32 *result); 8251a87ee65SKeith Busch int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 8261a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 8271a87ee65SKeith Busch u32 *result); 8289a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 829038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 830d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 8312405252aSChristoph Hellwig int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 832c5017e85SChristoph Hellwig int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 8332405252aSChristoph Hellwig void nvme_queue_scan(struct nvme_ctrl *ctrl); 834be93e87eSKeith Busch int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 8350e98719bSChristoph Hellwig void *log, size_t size, u64 offset); 8361496bd49SChristoph Hellwig bool nvme_tryget_ns_head(struct nvme_ns_head *head); 8371496bd49SChristoph Hellwig void nvme_put_ns_head(struct nvme_ns_head *head); 8382637baedSMinwoo Im int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 8392637baedSMinwoo Im const struct file_operations *fops, struct module *owner); 8402637baedSMinwoo Im void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 8412405252aSChristoph Hellwig int nvme_ioctl(struct block_device *bdev, fmode_t mode, 8422405252aSChristoph Hellwig unsigned int cmd, unsigned long arg); 8432637baedSMinwoo Im long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 8442405252aSChristoph Hellwig int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode, 8452405252aSChristoph Hellwig unsigned int cmd, unsigned long arg); 8462637baedSMinwoo Im long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 8472637baedSMinwoo Im unsigned long arg); 8482405252aSChristoph Hellwig long nvme_dev_ioctl(struct file *file, unsigned int cmd, 8492405252aSChristoph Hellwig unsigned long arg); 850de97fcb3SJens Axboe int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 851de97fcb3SJens Axboe struct io_comp_batch *iob, unsigned int poll_flags); 852de97fcb3SJens Axboe int nvme_ns_head_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 853de97fcb3SJens Axboe struct io_comp_batch *iob, unsigned int poll_flags); 854456cba38SKanchan Joshi int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 855456cba38SKanchan Joshi unsigned int issue_flags); 856456cba38SKanchan Joshi int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 857456cba38SKanchan Joshi unsigned int issue_flags); 8581496bd49SChristoph Hellwig int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 85958e5bdebSKanchan Joshi int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 860d558fb51SMatias Bjørling 86133b14f67SHannes Reinecke extern const struct attribute_group *nvme_ns_id_attr_groups[]; 8621496bd49SChristoph Hellwig extern const struct pr_ops nvme_pr_ops; 86332acab31SChristoph Hellwig extern const struct block_device_operations nvme_ns_head_ops; 86486adbf0cSChristoph Hellwig extern const struct attribute_group nvme_dev_attrs_group; 86532acab31SChristoph Hellwig 866f1cf35e1SChristoph Hellwig struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 86732acab31SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 86866b20ac0SMarta Rybczynska static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 86966b20ac0SMarta Rybczynska { 87066b20ac0SMarta Rybczynska return ctrl->ana_log_buf != NULL; 87166b20ac0SMarta Rybczynska } 87266b20ac0SMarta Rybczynska 873b9156daeSSagi Grimberg void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 874b9156daeSSagi Grimberg void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 875b9156daeSSagi Grimberg void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 876e3d34794SHannes Reinecke void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 8775ddaabe8SChristoph Hellwig void nvme_failover_req(struct request *req); 87832acab31SChristoph Hellwig void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 87932acab31SChristoph Hellwig int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 880c13cf14fSJoel Granados void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 88132acab31SChristoph Hellwig void nvme_mpath_remove_disk(struct nvme_ns_head *head); 8825e1f6899SChristoph Hellwig int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 8835e1f6899SChristoph Hellwig void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 884a4a6f3c8SAnton Eidelman void nvme_mpath_update(struct nvme_ctrl *ctrl); 8850d0b660fSChristoph Hellwig void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 8860d0b660fSChristoph Hellwig void nvme_mpath_stop(struct nvme_ctrl *ctrl); 8870157ec8dSSagi Grimberg bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 888e7d65803SHannes Reinecke void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 8890157ec8dSSagi Grimberg void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 8905396fdacSHannes Reinecke void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 891d4d957b5SSagi Grimberg void nvme_mpath_start_request(struct request *rq); 892d4d957b5SSagi Grimberg void nvme_mpath_end_request(struct request *rq); 893479a322fSSagi Grimberg 8942b59787aSMax Gurtovoy static inline void nvme_trace_bio_complete(struct request *req) 89535fe0d12SHannes Reinecke { 89635fe0d12SHannes Reinecke struct nvme_ns *ns = req->q->queuedata; 89735fe0d12SHannes Reinecke 8983659fb5aSYanjun Zhang if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 899d24de76aSChristoph Hellwig trace_block_bio_complete(ns->head->disk->queue, req->bio); 90035fe0d12SHannes Reinecke } 90135fe0d12SHannes Reinecke 902b739e137SChristoph Hellwig extern bool multipath; 9030d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_grpid; 9040d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_state; 90575c10e73SHannes Reinecke extern struct device_attribute subsys_attr_iopolicy; 9060d0b660fSChristoph Hellwig 90732acab31SChristoph Hellwig #else 908b739e137SChristoph Hellwig #define multipath false 9090d0b660fSChristoph Hellwig static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 9100d0b660fSChristoph Hellwig { 9110d0b660fSChristoph Hellwig return false; 9120d0b660fSChristoph Hellwig } 9135ddaabe8SChristoph Hellwig static inline void nvme_failover_req(struct request *req) 91432acab31SChristoph Hellwig { 91532acab31SChristoph Hellwig } 91632acab31SChristoph Hellwig static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 91732acab31SChristoph Hellwig { 91832acab31SChristoph Hellwig } 91932acab31SChristoph Hellwig static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 92032acab31SChristoph Hellwig struct nvme_ns_head *head) 92132acab31SChristoph Hellwig { 92232acab31SChristoph Hellwig return 0; 92332acab31SChristoph Hellwig } 924c13cf14fSJoel Granados static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 92532acab31SChristoph Hellwig { 92632acab31SChristoph Hellwig } 92732acab31SChristoph Hellwig static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 92832acab31SChristoph Hellwig { 92932acab31SChristoph Hellwig } 9300157ec8dSSagi Grimberg static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 9310157ec8dSSagi Grimberg { 9320157ec8dSSagi Grimberg return false; 9330157ec8dSSagi Grimberg } 934e7d65803SHannes Reinecke static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 935e7d65803SHannes Reinecke { 936e7d65803SHannes Reinecke } 9370157ec8dSSagi Grimberg static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 93832acab31SChristoph Hellwig { 93932acab31SChristoph Hellwig } 9405396fdacSHannes Reinecke static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 941479a322fSSagi Grimberg { 942479a322fSSagi Grimberg } 9432b59787aSMax Gurtovoy static inline void nvme_trace_bio_complete(struct request *req) 94435fe0d12SHannes Reinecke { 94535fe0d12SHannes Reinecke } 9465e1f6899SChristoph Hellwig static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 9475e1f6899SChristoph Hellwig { 9485e1f6899SChristoph Hellwig } 9495e1f6899SChristoph Hellwig static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 9500d0b660fSChristoph Hellwig struct nvme_id_ctrl *id) 9510d0b660fSChristoph Hellwig { 9522bd64307SKanchan Joshi if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 95314a1336eSChristoph Hellwig dev_warn(ctrl->device, 95414a1336eSChristoph Hellwig "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 9550d0b660fSChristoph Hellwig return 0; 9560d0b660fSChristoph Hellwig } 957a4a6f3c8SAnton Eidelman static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 958a4a6f3c8SAnton Eidelman { 959a4a6f3c8SAnton Eidelman } 9600d0b660fSChristoph Hellwig static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 9610d0b660fSChristoph Hellwig { 9620d0b660fSChristoph Hellwig } 9630d0b660fSChristoph Hellwig static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 9640d0b660fSChristoph Hellwig { 9650d0b660fSChristoph Hellwig } 966b9156daeSSagi Grimberg static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 967b9156daeSSagi Grimberg { 968b9156daeSSagi Grimberg } 969b9156daeSSagi Grimberg static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 970b9156daeSSagi Grimberg { 971b9156daeSSagi Grimberg } 972b9156daeSSagi Grimberg static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 973b9156daeSSagi Grimberg { 974b9156daeSSagi Grimberg } 975e3d34794SHannes Reinecke static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 976e3d34794SHannes Reinecke { 977e3d34794SHannes Reinecke } 978d4d957b5SSagi Grimberg static inline void nvme_mpath_start_request(struct request *rq) 979d4d957b5SSagi Grimberg { 980d4d957b5SSagi Grimberg } 981d4d957b5SSagi Grimberg static inline void nvme_mpath_end_request(struct request *rq) 982d4d957b5SSagi Grimberg { 983d4d957b5SSagi Grimberg } 98432acab31SChristoph Hellwig #endif /* CONFIG_NVME_MULTIPATH */ 98532acab31SChristoph Hellwig 9867fad20ddSChristoph Hellwig int nvme_revalidate_zones(struct nvme_ns *ns); 9878b4fb0f9SChristoph Hellwig int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 9888b4fb0f9SChristoph Hellwig unsigned int nr_zones, report_zones_cb cb, void *data); 989240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 990d525c3c0SChristoph Hellwig int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 991240e6ee2SKeith Busch blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 992240e6ee2SKeith Busch struct nvme_command *cmnd, 993240e6ee2SKeith Busch enum nvme_zone_mgmt_action action); 994240e6ee2SKeith Busch #else 995240e6ee2SKeith Busch static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 996240e6ee2SKeith Busch struct request *req, struct nvme_command *cmnd, 997240e6ee2SKeith Busch enum nvme_zone_mgmt_action action) 998240e6ee2SKeith Busch { 999240e6ee2SKeith Busch return BLK_STS_NOTSUPP; 1000240e6ee2SKeith Busch } 1001240e6ee2SKeith Busch 1002d525c3c0SChristoph Hellwig static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 1003240e6ee2SKeith Busch { 1004240e6ee2SKeith Busch dev_warn(ns->ctrl->device, 1005240e6ee2SKeith Busch "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 1006240e6ee2SKeith Busch return -EPROTONOSUPPORT; 1007240e6ee2SKeith Busch } 1008240e6ee2SKeith Busch #endif 1009240e6ee2SKeith Busch 101040267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 101140267efdSSimon A. F. Lund { 101240267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 101340267efdSSimon A. F. Lund } 1014ca064085SMatias Bjørling 1015400b6a7bSGuenter Roeck #ifdef CONFIG_NVME_HWMON 101659e330f8SKeith Busch int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1017ed7770f6SHannes Reinecke void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1018400b6a7bSGuenter Roeck #else 101959e330f8SKeith Busch static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 102059e330f8SKeith Busch { 102159e330f8SKeith Busch return 0; 102259e330f8SKeith Busch } 1023ed7770f6SHannes Reinecke 1024ed7770f6SHannes Reinecke static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1025ed7770f6SHannes Reinecke { 1026ed7770f6SHannes Reinecke } 1027400b6a7bSGuenter Roeck #endif 1028400b6a7bSGuenter Roeck 10296887fc64SSagi Grimberg static inline void nvme_start_request(struct request *rq) 10306887fc64SSagi Grimberg { 1031d4d957b5SSagi Grimberg if (rq->cmd_flags & REQ_NVME_MPATH) 1032d4d957b5SSagi Grimberg nvme_mpath_start_request(rq); 10336887fc64SSagi Grimberg blk_mq_start_request(rq); 10346887fc64SSagi Grimberg } 10356887fc64SSagi Grimberg 103673eefc27SChaitanya Kulkarni static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 103773eefc27SChaitanya Kulkarni { 103873eefc27SChaitanya Kulkarni return ctrl->sgls & ((1 << 0) | (1 << 1)); 103973eefc27SChaitanya Kulkarni } 104073eefc27SChaitanya Kulkarni 1041f50fff73SHannes Reinecke #ifdef CONFIG_NVME_AUTH 1042e481fc0aSSagi Grimberg int __init nvme_init_auth(void); 1043e481fc0aSSagi Grimberg void __exit nvme_exit_auth(void); 1044193a8c7eSSagi Grimberg int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1045f50fff73SHannes Reinecke void nvme_auth_stop(struct nvme_ctrl *ctrl); 1046f50fff73SHannes Reinecke int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1047f50fff73SHannes Reinecke int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1048f50fff73SHannes Reinecke void nvme_auth_free(struct nvme_ctrl *ctrl); 1049f50fff73SHannes Reinecke #else 1050193a8c7eSSagi Grimberg static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1051193a8c7eSSagi Grimberg { 1052193a8c7eSSagi Grimberg return 0; 1053193a8c7eSSagi Grimberg } 1054e481fc0aSSagi Grimberg static inline int __init nvme_init_auth(void) 1055e481fc0aSSagi Grimberg { 1056e481fc0aSSagi Grimberg return 0; 1057e481fc0aSSagi Grimberg } 1058e481fc0aSSagi Grimberg static inline void __exit nvme_exit_auth(void) 1059e481fc0aSSagi Grimberg { 1060e481fc0aSSagi Grimberg } 1061f50fff73SHannes Reinecke static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1062f50fff73SHannes Reinecke static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1063f50fff73SHannes Reinecke { 1064f50fff73SHannes Reinecke return -EPROTONOSUPPORT; 1065f50fff73SHannes Reinecke } 1066f50fff73SHannes Reinecke static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1067f50fff73SHannes Reinecke { 1068f50fff73SHannes Reinecke return NVME_SC_AUTH_REQUIRED; 1069f50fff73SHannes Reinecke } 1070f50fff73SHannes Reinecke static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1071f50fff73SHannes Reinecke #endif 1072f50fff73SHannes Reinecke 1073df21b6b1SLogan Gunthorpe u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1074df21b6b1SLogan Gunthorpe u8 opcode); 107562281b9eSChristoph Hellwig u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 107662281b9eSChristoph Hellwig int nvme_execute_rq(struct request *rq, bool at_head); 1077bc8fb906SKeith Busch void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects, 1078bc8fb906SKeith Busch struct nvme_command *cmd, int status); 1079b2702aaaSChaitanya Kulkarni struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 108024493b8bSLogan Gunthorpe struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 108124493b8bSLogan Gunthorpe void nvme_put_ns(struct nvme_ns *ns); 1082df21b6b1SLogan Gunthorpe 108343dc9878SAdam Manzanares static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 108443dc9878SAdam Manzanares { 108543dc9878SAdam Manzanares return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 108643dc9878SAdam Manzanares } 108743dc9878SAdam Manzanares 1088bd83fe6fSAlan Adamson #ifdef CONFIG_NVME_VERBOSE_ERRORS 1089bd83fe6fSAlan Adamson const unsigned char *nvme_get_error_status_str(u16 status); 1090bd83fe6fSAlan Adamson const unsigned char *nvme_get_opcode_str(u8 opcode); 1091bd83fe6fSAlan Adamson const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 1092567da14dSAmit Engel const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode); 1093bd83fe6fSAlan Adamson #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1094bd83fe6fSAlan Adamson static inline const unsigned char *nvme_get_error_status_str(u16 status) 1095bd83fe6fSAlan Adamson { 1096bd83fe6fSAlan Adamson return "I/O Error"; 1097bd83fe6fSAlan Adamson } 1098bd83fe6fSAlan Adamson static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 1099bd83fe6fSAlan Adamson { 1100bd83fe6fSAlan Adamson return "I/O Cmd"; 1101bd83fe6fSAlan Adamson } 1102bd83fe6fSAlan Adamson static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 1103bd83fe6fSAlan Adamson { 1104bd83fe6fSAlan Adamson return "Admin Cmd"; 1105bd83fe6fSAlan Adamson } 1106567da14dSAmit Engel 1107567da14dSAmit Engel static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode) 1108567da14dSAmit Engel { 1109567da14dSAmit Engel return "Fabrics Cmd"; 1110567da14dSAmit Engel } 1111bd83fe6fSAlan Adamson #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1112bd83fe6fSAlan Adamson 1113567da14dSAmit Engel static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype) 1114567da14dSAmit Engel { 1115567da14dSAmit Engel if (opcode == nvme_fabrics_command) 1116567da14dSAmit Engel return nvme_get_fabrics_opcode_str(fctype); 1117567da14dSAmit Engel return qid ? nvme_get_opcode_str(opcode) : 1118567da14dSAmit Engel nvme_get_admin_opcode_str(opcode); 1119567da14dSAmit Engel } 112057dacad5SJay Sternberg #endif /* _NVME_H */ 1121