1bc50ad75SChristoph Hellwig /* SPDX-License-Identifier: GPL-2.0 */ 257dacad5SJay Sternberg /* 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg */ 557dacad5SJay Sternberg 657dacad5SJay Sternberg #ifndef _NVME_H 757dacad5SJay Sternberg #define _NVME_H 857dacad5SJay Sternberg 957dacad5SJay Sternberg #include <linux/nvme.h> 10a6a5149bSChristoph Hellwig #include <linux/cdev.h> 1157dacad5SJay Sternberg #include <linux/pci.h> 1257dacad5SJay Sternberg #include <linux/kref.h> 1357dacad5SJay Sternberg #include <linux/blk-mq.h> 14b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 15a98e58e5SScott Bauer #include <linux/sed-opal.h> 16b9e03857SThomas Tai #include <linux/fault-inject.h> 17978628ecSJohannes Thumshirn #include <linux/rcupdate.h> 18c1ac9a4bSKeith Busch #include <linux/wait.h> 1957dacad5SJay Sternberg 2035fe0d12SHannes Reinecke #include <trace/events/block.h> 2135fe0d12SHannes Reinecke 228ae4e447SMarc Olson extern unsigned int nvme_io_timeout; 2357dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2457dacad5SJay Sternberg 258ae4e447SMarc Olson extern unsigned int admin_timeout; 2621d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 2721d34711SChristoph Hellwig 28038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 29038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 30038bd4cbSSagi Grimberg 3138e18002SIsrael Rukshin #ifdef CONFIG_ARCH_NO_SG_CHAIN 3238e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 0 3338e18002SIsrael Rukshin #else 3438e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 2 3538e18002SIsrael Rukshin #endif 3638e18002SIsrael Rukshin 379a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 38b227c59bSRoy Shterman extern struct workqueue_struct *nvme_reset_wq; 39b227c59bSRoy Shterman extern struct workqueue_struct *nvme_delete_wq; 409a6327d2SSagi Grimberg 41ca064085SMatias Bjørling enum { 42ca064085SMatias Bjørling NVME_NS_LBA = 0, 43ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 44ca064085SMatias Bjørling }; 45ca064085SMatias Bjørling 4657dacad5SJay Sternberg /* 47106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 48106198edSChristoph Hellwig * the standard. 4957dacad5SJay Sternberg */ 50106198edSChristoph Hellwig enum nvme_quirks { 51106198edSChristoph Hellwig /* 52106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 53106198edSChristoph Hellwig * specific Identify field. 54106198edSChristoph Hellwig */ 55106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 56540c801cSKeith Busch 57540c801cSKeith Busch /* 58540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 59540c801cSKeith Busch * correctly. 60540c801cSKeith Busch */ 61540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 6208095e70SKeith Busch 6308095e70SKeith Busch /* 64e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 65e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 6608095e70SKeith Busch */ 67e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 6854adc010SGuilherme G. Piccoli 6954adc010SGuilherme G. Piccoli /* 7054adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 7154adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 7254adc010SGuilherme G. Piccoli */ 7354adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 74c5552fdeSAndy Lutomirski 75c5552fdeSAndy Lutomirski /* 76c5552fdeSAndy Lutomirski * APST should not be used. 77c5552fdeSAndy Lutomirski */ 78c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 79ff5350a8SAndy Lutomirski 80ff5350a8SAndy Lutomirski /* 81ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 82ff5350a8SAndy Lutomirski */ 83ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 84608cc4b1SChristoph Hellwig 85608cc4b1SChristoph Hellwig /* 86608cc4b1SChristoph Hellwig * Supports the LighNVM command set if indicated in vs[1]. 87608cc4b1SChristoph Hellwig */ 88608cc4b1SChristoph Hellwig NVME_QUIRK_LIGHTNVM = (1 << 6), 899abd68efSJens Axboe 909abd68efSJens Axboe /* 919abd68efSJens Axboe * Set MEDIUM priority on SQ creation 929abd68efSJens Axboe */ 939abd68efSJens Axboe NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 946299358dSJames Dingwall 956299358dSJames Dingwall /* 966299358dSJames Dingwall * Ignore device provided subnqn. 976299358dSJames Dingwall */ 986299358dSJames Dingwall NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 997b210e4eSChristoph Hellwig 1007b210e4eSChristoph Hellwig /* 1017b210e4eSChristoph Hellwig * Broken Write Zeroes. 1027b210e4eSChristoph Hellwig */ 1037b210e4eSChristoph Hellwig NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 104cb32de1bSMario Limonciello 105cb32de1bSMario Limonciello /* 106cb32de1bSMario Limonciello * Force simple suspend/resume path. 107cb32de1bSMario Limonciello */ 108cb32de1bSMario Limonciello NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 1097ad67ca5SLinus Torvalds 1107ad67ca5SLinus Torvalds /* 11166341331SBenjamin Herrenschmidt * Use only one interrupt vector for all queues 11266341331SBenjamin Herrenschmidt */ 1137ad67ca5SLinus Torvalds NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 11466341331SBenjamin Herrenschmidt 11566341331SBenjamin Herrenschmidt /* 11666341331SBenjamin Herrenschmidt * Use non-standard 128 bytes SQEs. 11766341331SBenjamin Herrenschmidt */ 1187ad67ca5SLinus Torvalds NVME_QUIRK_128_BYTES_SQES = (1 << 12), 119d38e9f04SBenjamin Herrenschmidt 120d38e9f04SBenjamin Herrenschmidt /* 121d38e9f04SBenjamin Herrenschmidt * Prevent tag overlap between queues 122d38e9f04SBenjamin Herrenschmidt */ 1237ad67ca5SLinus Torvalds NVME_QUIRK_SHARED_TAGS = (1 << 13), 1246c6aa2f2SAkinobu Mita 1256c6aa2f2SAkinobu Mita /* 1266c6aa2f2SAkinobu Mita * Don't change the value of the temperature threshold feature 1276c6aa2f2SAkinobu Mita */ 1286c6aa2f2SAkinobu Mita NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 129106198edSChristoph Hellwig }; 130106198edSChristoph Hellwig 131d49187e9SChristoph Hellwig /* 132d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 133d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 134d49187e9SChristoph Hellwig */ 135d49187e9SChristoph Hellwig struct nvme_request { 136d49187e9SChristoph Hellwig struct nvme_command *cmd; 137d49187e9SChristoph Hellwig union nvme_result result; 13844e44b29SChristoph Hellwig u8 retries; 13927fa9bc5SChristoph Hellwig u8 flags; 14027fa9bc5SChristoph Hellwig u16 status; 14159e29ce6SSagi Grimberg struct nvme_ctrl *ctrl; 14227fa9bc5SChristoph Hellwig }; 14327fa9bc5SChristoph Hellwig 14432acab31SChristoph Hellwig /* 14532acab31SChristoph Hellwig * Mark a bio as coming in through the mpath node. 14632acab31SChristoph Hellwig */ 14732acab31SChristoph Hellwig #define REQ_NVME_MPATH REQ_DRV 14832acab31SChristoph Hellwig 14927fa9bc5SChristoph Hellwig enum { 15027fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 151bb06ec31SJames Smart NVME_REQ_USERCMD = (1 << 1), 152d49187e9SChristoph Hellwig }; 153d49187e9SChristoph Hellwig 154d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 155d49187e9SChristoph Hellwig { 156d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 157d49187e9SChristoph Hellwig } 158d49187e9SChristoph Hellwig 1595d87eb94SKeith Busch static inline u16 nvme_req_qid(struct request *req) 1605d87eb94SKeith Busch { 1615d87eb94SKeith Busch if (!req->rq_disk) 1625d87eb94SKeith Busch return 0; 1635d87eb94SKeith Busch return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 1645d87eb94SKeith Busch } 1655d87eb94SKeith Busch 16654adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 16754adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 16854adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 16954adc010SGuilherme G. Piccoli * found empirically. 17054adc010SGuilherme G. Piccoli */ 1718c97eeccSJeff Lien #define NVME_QUIRK_DELAY_AMOUNT 2300 17254adc010SGuilherme G. Piccoli 173bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 174bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 175bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 176bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 177ad6a0a52SMax Gurtovoy NVME_CTRL_CONNECTING, 178bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 1790ff9d4e1SKeith Busch NVME_CTRL_DEAD, 180bb8d261eSChristoph Hellwig }; 181bb8d261eSChristoph Hellwig 182a3646451SAkinobu Mita struct nvme_fault_inject { 183a3646451SAkinobu Mita #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 184a3646451SAkinobu Mita struct fault_attr attr; 185a3646451SAkinobu Mita struct dentry *parent; 186a3646451SAkinobu Mita bool dont_retry; /* DNR, do not retry */ 187a3646451SAkinobu Mita u16 status; /* status code */ 188a3646451SAkinobu Mita #endif 189a3646451SAkinobu Mita }; 190a3646451SAkinobu Mita 1911c63dc66SChristoph Hellwig struct nvme_ctrl { 1926e3ca03eSSagi Grimberg bool comp_seen; 193bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 194bd4da3abSAndy Lutomirski bool identified; 195bb8d261eSChristoph Hellwig spinlock_t lock; 196e7ad43c3SKeith Busch struct mutex scan_lock; 1971c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 19857dacad5SJay Sternberg struct request_queue *admin_q; 19907bfcd09SChristoph Hellwig struct request_queue *connect_q; 200e7832cb4SSagi Grimberg struct request_queue *fabrics_q; 20157dacad5SJay Sternberg struct device *dev; 20257dacad5SJay Sternberg int instance; 203103e515eSHannes Reinecke int numa_node; 2045bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 20534b6c231SSagi Grimberg struct blk_mq_tag_set *admin_tagset; 2065bae7f73SChristoph Hellwig struct list_head namespaces; 207765cc031SJianchao Wang struct rw_semaphore namespaces_rwsem; 208d22524a4SChristoph Hellwig struct device ctrl_device; 2095bae7f73SChristoph Hellwig struct device *device; /* char device */ 210a6a5149bSChristoph Hellwig struct cdev cdev; 211d86c4d8eSChristoph Hellwig struct work_struct reset_work; 212c5017e85SChristoph Hellwig struct work_struct delete_work; 213c1ac9a4bSKeith Busch wait_queue_head_t state_wq; 2141c63dc66SChristoph Hellwig 215ab9e00ccSChristoph Hellwig struct nvme_subsystem *subsys; 216ab9e00ccSChristoph Hellwig struct list_head subsys_entry; 217ab9e00ccSChristoph Hellwig 2184f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 219a98e58e5SScott Bauer 22057dacad5SJay Sternberg char name[12]; 22176e3914aSChristoph Hellwig u16 cntlid; 2225fd4ce1bSChristoph Hellwig 2235fd4ce1bSChristoph Hellwig u32 ctrl_config; 224b6dccf7fSArnav Dawn u16 mtfa; 225d858e5f0SSagi Grimberg u32 queue_count; 2265fd4ce1bSChristoph Hellwig 22720d0dfe6SSagi Grimberg u64 cap; 2285fd4ce1bSChristoph Hellwig u32 page_size; 22957dacad5SJay Sternberg u32 max_hw_sectors; 230943e942eSJens Axboe u32 max_segments; 23149cd84b6SKeith Busch u16 crdt[3]; 23257dacad5SJay Sternberg u16 oncs; 2338a9ae523SScott Bauer u16 oacs; 234f5d11840SJens Axboe u16 nssa; 235f5d11840SJens Axboe u16 nr_streams; 236f968688fSKeith Busch u16 sqsize; 2370d0b660fSChristoph Hellwig u32 max_namespaces; 2386bf25d16SChristoph Hellwig atomic_t abort_limit; 23957dacad5SJay Sternberg u8 vwc; 240f3ca80fcSChristoph Hellwig u32 vs; 24107bfcd09SChristoph Hellwig u32 sgls; 242038bd4cbSSagi Grimberg u16 kas; 243c5552fdeSAndy Lutomirski u8 npss; 244c5552fdeSAndy Lutomirski u8 apsta; 245400b6a7bSGuenter Roeck u16 wctemp; 246400b6a7bSGuenter Roeck u16 cctemp; 247c0561f82SHannes Reinecke u32 oaes; 248e3d7874dSKeith Busch u32 aen_result; 2493e53ba38SSagi Grimberg u32 ctratt; 25007fbd32aSMartin K. Petersen unsigned int shutdown_timeout; 251038bd4cbSSagi Grimberg unsigned int kato; 252f3ca80fcSChristoph Hellwig bool subsystem; 253106198edSChristoph Hellwig unsigned long quirks; 254c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 25584fef62dSKeith Busch struct nvme_effects_log *effects; 2565955be21SChristoph Hellwig struct work_struct scan_work; 257f866fc42SChristoph Hellwig struct work_struct async_event_work; 258038bd4cbSSagi Grimberg struct delayed_work ka_work; 2590a34e466SRoland Dreier struct nvme_command ka_cmd; 260b6dccf7fSArnav Dawn struct work_struct fw_act_work; 26130d90964SChristoph Hellwig unsigned long events; 262ce151813SIsrael Rukshin bool created; 26307bfcd09SChristoph Hellwig 2640d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 2650d0b660fSChristoph Hellwig /* asymmetric namespace access: */ 2660d0b660fSChristoph Hellwig u8 anacap; 2670d0b660fSChristoph Hellwig u8 anatt; 2680d0b660fSChristoph Hellwig u32 anagrpmax; 2690d0b660fSChristoph Hellwig u32 nanagrpid; 2700d0b660fSChristoph Hellwig struct mutex ana_lock; 2710d0b660fSChristoph Hellwig struct nvme_ana_rsp_hdr *ana_log_buf; 2720d0b660fSChristoph Hellwig size_t ana_log_size; 2730d0b660fSChristoph Hellwig struct timer_list anatt_timer; 2740d0b660fSChristoph Hellwig struct work_struct ana_work; 2750d0b660fSChristoph Hellwig #endif 2760d0b660fSChristoph Hellwig 277c5552fdeSAndy Lutomirski /* Power saving configuration */ 278c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 27976a5af84SKai-Heng Feng bool apst_enabled; 280c5552fdeSAndy Lutomirski 281044a9df1SChristoph Hellwig /* PCIe only: */ 282fe6d53c9SChristoph Hellwig u32 hmpre; 283fe6d53c9SChristoph Hellwig u32 hmmin; 284044a9df1SChristoph Hellwig u32 hmminds; 285044a9df1SChristoph Hellwig u16 hmmaxd; 286fe6d53c9SChristoph Hellwig 28707bfcd09SChristoph Hellwig /* Fabrics only */ 28807bfcd09SChristoph Hellwig u32 ioccsz; 28907bfcd09SChristoph Hellwig u32 iorcsz; 29007bfcd09SChristoph Hellwig u16 icdoff; 29107bfcd09SChristoph Hellwig u16 maxcmd; 292fdf9dfa8SSagi Grimberg int nr_reconnects; 29307bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 294cb5b7262SJens Axboe 295cb5b7262SJens Axboe struct page *discard_page; 296cb5b7262SJens Axboe unsigned long discard_page_busy; 297f79d5fdaSAkinobu Mita 298f79d5fdaSAkinobu Mita struct nvme_fault_inject fault_inject; 29957dacad5SJay Sternberg }; 30057dacad5SJay Sternberg 30175c10e73SHannes Reinecke enum nvme_iopolicy { 30275c10e73SHannes Reinecke NVME_IOPOLICY_NUMA, 30375c10e73SHannes Reinecke NVME_IOPOLICY_RR, 30475c10e73SHannes Reinecke }; 30575c10e73SHannes Reinecke 306ab9e00ccSChristoph Hellwig struct nvme_subsystem { 307ab9e00ccSChristoph Hellwig int instance; 308ab9e00ccSChristoph Hellwig struct device dev; 309ab9e00ccSChristoph Hellwig /* 310ab9e00ccSChristoph Hellwig * Because we unregister the device on the last put we need 311ab9e00ccSChristoph Hellwig * a separate refcount. 312ab9e00ccSChristoph Hellwig */ 313ab9e00ccSChristoph Hellwig struct kref ref; 314ab9e00ccSChristoph Hellwig struct list_head entry; 315ab9e00ccSChristoph Hellwig struct mutex lock; 316ab9e00ccSChristoph Hellwig struct list_head ctrls; 317ed754e5dSChristoph Hellwig struct list_head nsheads; 318ab9e00ccSChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 319ab9e00ccSChristoph Hellwig char serial[20]; 320ab9e00ccSChristoph Hellwig char model[40]; 321ab9e00ccSChristoph Hellwig char firmware_rev[8]; 322ab9e00ccSChristoph Hellwig u8 cmic; 323ab9e00ccSChristoph Hellwig u16 vendor_id; 32481adb863SBart Van Assche u16 awupf; /* 0's based awupf value. */ 325ed754e5dSChristoph Hellwig struct ida ns_ida; 32675c10e73SHannes Reinecke #ifdef CONFIG_NVME_MULTIPATH 32775c10e73SHannes Reinecke enum nvme_iopolicy iopolicy; 32875c10e73SHannes Reinecke #endif 329ab9e00ccSChristoph Hellwig }; 330ab9e00ccSChristoph Hellwig 331002fab04SChristoph Hellwig /* 332002fab04SChristoph Hellwig * Container structure for uniqueue namespace identifiers. 333002fab04SChristoph Hellwig */ 334002fab04SChristoph Hellwig struct nvme_ns_ids { 335002fab04SChristoph Hellwig u8 eui64[8]; 336002fab04SChristoph Hellwig u8 nguid[16]; 337002fab04SChristoph Hellwig uuid_t uuid; 338002fab04SChristoph Hellwig }; 339002fab04SChristoph Hellwig 340ed754e5dSChristoph Hellwig /* 341ed754e5dSChristoph Hellwig * Anchor structure for namespaces. There is one for each namespace in a 342ed754e5dSChristoph Hellwig * NVMe subsystem that any of our controllers can see, and the namespace 343ed754e5dSChristoph Hellwig * structure for each controller is chained of it. For private namespaces 344ed754e5dSChristoph Hellwig * there is a 1:1 relation to our namespace structures, that is ->list 345ed754e5dSChristoph Hellwig * only ever has a single entry for private namespaces. 346ed754e5dSChristoph Hellwig */ 347ed754e5dSChristoph Hellwig struct nvme_ns_head { 348ed754e5dSChristoph Hellwig struct list_head list; 349ed754e5dSChristoph Hellwig struct srcu_struct srcu; 350ed754e5dSChristoph Hellwig struct nvme_subsystem *subsys; 351ed754e5dSChristoph Hellwig unsigned ns_id; 352ed754e5dSChristoph Hellwig struct nvme_ns_ids ids; 353ed754e5dSChristoph Hellwig struct list_head entry; 354ed754e5dSChristoph Hellwig struct kref ref; 3550c284db7SKeith Busch bool shared; 356ed754e5dSChristoph Hellwig int instance; 357f3334447SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 358f3334447SChristoph Hellwig struct gendisk *disk; 359f3334447SChristoph Hellwig struct bio_list requeue_list; 360f3334447SChristoph Hellwig spinlock_t requeue_lock; 361f3334447SChristoph Hellwig struct work_struct requeue_work; 362f3334447SChristoph Hellwig struct mutex lock; 363f3334447SChristoph Hellwig struct nvme_ns __rcu *current_path[]; 364f3334447SChristoph Hellwig #endif 365ed754e5dSChristoph Hellwig }; 366ed754e5dSChristoph Hellwig 367ffc89b1dSMax Gurtovoy enum nvme_ns_features { 368ffc89b1dSMax Gurtovoy NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 369b29f8485SMax Gurtovoy NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 370ffc89b1dSMax Gurtovoy }; 371ffc89b1dSMax Gurtovoy 37257dacad5SJay Sternberg struct nvme_ns { 37357dacad5SJay Sternberg struct list_head list; 37457dacad5SJay Sternberg 3751c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 37657dacad5SJay Sternberg struct request_queue *queue; 37757dacad5SJay Sternberg struct gendisk *disk; 3780d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 3790d0b660fSChristoph Hellwig enum nvme_ana_state ana_state; 3800d0b660fSChristoph Hellwig u32 ana_grpid; 3810d0b660fSChristoph Hellwig #endif 382ed754e5dSChristoph Hellwig struct list_head siblings; 383b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 38457dacad5SJay Sternberg struct kref kref; 385ed754e5dSChristoph Hellwig struct nvme_ns_head *head; 38657dacad5SJay Sternberg 38757dacad5SJay Sternberg int lba_shift; 38857dacad5SJay Sternberg u16 ms; 389f5d11840SJens Axboe u16 sgs; 390f5d11840SJens Axboe u32 sws; 39157dacad5SJay Sternberg u8 pi_type; 392ffc89b1dSMax Gurtovoy unsigned long features; 393646017a6SKeith Busch unsigned long flags; 394646017a6SKeith Busch #define NVME_NS_REMOVING 0 39569d9a99cSKeith Busch #define NVME_NS_DEAD 1 3960d0b660fSChristoph Hellwig #define NVME_NS_ANA_PENDING 2 397b9e03857SThomas Tai 398b9e03857SThomas Tai struct nvme_fault_inject fault_inject; 399b9e03857SThomas Tai 40057dacad5SJay Sternberg }; 40157dacad5SJay Sternberg 4021c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 4031a353d85SMing Lin const char *name; 404e439bb12SSagi Grimberg struct module *module; 405d3d5b87dSChristoph Hellwig unsigned int flags; 406d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 407c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 408e0596ab2SLogan Gunthorpe #define NVME_F_PCI_P2PDMA (1 << 2) 4091c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 4105fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 4117fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 4121673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 413ad22c355SKeith Busch void (*submit_async_event)(struct nvme_ctrl *ctrl); 414c5017e85SChristoph Hellwig void (*delete_ctrl)(struct nvme_ctrl *ctrl); 4151a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 41657dacad5SJay Sternberg }; 41757dacad5SJay Sternberg 418b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 419a3646451SAkinobu Mita void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 420a3646451SAkinobu Mita const char *dev_name); 421a3646451SAkinobu Mita void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 422b9e03857SThomas Tai void nvme_should_fail(struct request *req); 423b9e03857SThomas Tai #else 424a3646451SAkinobu Mita static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 425a3646451SAkinobu Mita const char *dev_name) 426a3646451SAkinobu Mita { 427a3646451SAkinobu Mita } 428a3646451SAkinobu Mita static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 429a3646451SAkinobu Mita { 430a3646451SAkinobu Mita } 431b9e03857SThomas Tai static inline void nvme_should_fail(struct request *req) {} 432b9e03857SThomas Tai #endif 433b9e03857SThomas Tai 434f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 435f3ca80fcSChristoph Hellwig { 436f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 437f3ca80fcSChristoph Hellwig return -ENOTTY; 438f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 439f3ca80fcSChristoph Hellwig } 440f3ca80fcSChristoph Hellwig 441314d48ddSDamien Le Moal /* 442314d48ddSDamien Le Moal * Convert a 512B sector number to a device logical block number. 443314d48ddSDamien Le Moal */ 444314d48ddSDamien Le Moal static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 44557dacad5SJay Sternberg { 446314d48ddSDamien Le Moal return sector >> (ns->lba_shift - SECTOR_SHIFT); 44757dacad5SJay Sternberg } 44857dacad5SJay Sternberg 449e08f2ae8SDamien Le Moal /* 450e08f2ae8SDamien Le Moal * Convert a device logical block number to a 512B sector number. 451e08f2ae8SDamien Le Moal */ 452e08f2ae8SDamien Le Moal static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 453e08f2ae8SDamien Le Moal { 454e08f2ae8SDamien Le Moal return lba << (ns->lba_shift - SECTOR_SHIFT); 45557dacad5SJay Sternberg } 45657dacad5SJay Sternberg 45771fb90ebSKeith Busch /* 45871fb90ebSKeith Busch * Convert byte length to nvme's 0-based num dwords 45971fb90ebSKeith Busch */ 46071fb90ebSKeith Busch static inline u32 nvme_bytes_to_numd(size_t len) 46171fb90ebSKeith Busch { 46271fb90ebSKeith Busch return (len >> 2) - 1; 46371fb90ebSKeith Busch } 46471fb90ebSKeith Busch 46527fa9bc5SChristoph Hellwig static inline void nvme_end_request(struct request *req, __le16 status, 46627fa9bc5SChristoph Hellwig union nvme_result result) 46715a190f7SChristoph Hellwig { 46827fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 46927fa9bc5SChristoph Hellwig 47027fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 47127fa9bc5SChristoph Hellwig rq->result = result; 472b9e03857SThomas Tai /* inject error when permitted by fault injection framework */ 473b9e03857SThomas Tai nvme_should_fail(req); 47408e0029aSChristoph Hellwig blk_mq_complete_request(req); 47515a190f7SChristoph Hellwig } 47615a190f7SChristoph Hellwig 477d22524a4SChristoph Hellwig static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 478d22524a4SChristoph Hellwig { 479d22524a4SChristoph Hellwig get_device(ctrl->device); 480d22524a4SChristoph Hellwig } 481d22524a4SChristoph Hellwig 482d22524a4SChristoph Hellwig static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 483d22524a4SChristoph Hellwig { 484d22524a4SChristoph Hellwig put_device(ctrl->device); 485d22524a4SChristoph Hellwig } 486d22524a4SChristoph Hellwig 48758a8df67SIsrael Rukshin static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 48858a8df67SIsrael Rukshin { 48958a8df67SIsrael Rukshin return !qid && command_id >= NVME_AQ_BLK_MQ_DEPTH; 49058a8df67SIsrael Rukshin } 49158a8df67SIsrael Rukshin 49277f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 4937baa8572SJens Axboe bool nvme_cancel_request(struct request *req, void *data, bool reserved); 494bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 495bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 496c1ac9a4bSKeith Busch bool nvme_wait_reset(struct nvme_ctrl *ctrl); 497b5b05048SSagi Grimberg int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 498c0f2f45bSSagi Grimberg int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 4995fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 500f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 501f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 50253029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 503d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 504d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 5057fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 5065bae7f73SChristoph Hellwig 5075bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 5081673f1f0SChristoph Hellwig 5094f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 5104f1244c8SChristoph Hellwig bool send); 511a98e58e5SScott Bauer 5127bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 513287a63ebSChristoph Hellwig volatile union nvme_result *res); 514f866fc42SChristoph Hellwig 51525646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 51625646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 51769d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 518d6135c3aSKeith Busch void nvme_sync_queues(struct nvme_ctrl *ctrl); 519302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 520302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 521302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 522302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 523363c9aacSSagi Grimberg 524eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 5254160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 5269a95e4efSBart Van Assche struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 527f7f1fc36SMax Gurtovoy void nvme_cleanup_cmd(struct request *req); 528fc17b653SChristoph Hellwig blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 5298093f7caSMing Lin struct nvme_command *cmd); 53057dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 53157dacad5SJay Sternberg void *buf, unsigned bufflen); 53257dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 533d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 5349a95e4efSBart Van Assche unsigned timeout, int qid, int at_head, 5356287b51cSSagi Grimberg blk_mq_req_flags_t flags, bool poll); 5361a87ee65SKeith Busch int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 5371a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 5381a87ee65SKeith Busch u32 *result); 5391a87ee65SKeith Busch int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 5401a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 5411a87ee65SKeith Busch u32 *result); 5429a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 543038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 544d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 54579c48ccfSSagi Grimberg int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 546c1ac9a4bSKeith Busch int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 547c5017e85SChristoph Hellwig int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 54857dacad5SJay Sternberg 5490e98719bSChristoph Hellwig int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 5500e98719bSChristoph Hellwig void *log, size_t size, u64 offset); 551d558fb51SMatias Bjørling 55233b14f67SHannes Reinecke extern const struct attribute_group *nvme_ns_id_attr_groups[]; 55332acab31SChristoph Hellwig extern const struct block_device_operations nvme_ns_head_ops; 55432acab31SChristoph Hellwig 55532acab31SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 55666b20ac0SMarta Rybczynska static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 55766b20ac0SMarta Rybczynska { 55866b20ac0SMarta Rybczynska return ctrl->ana_log_buf != NULL; 55966b20ac0SMarta Rybczynska } 56066b20ac0SMarta Rybczynska 561b9156daeSSagi Grimberg void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 562b9156daeSSagi Grimberg void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 563b9156daeSSagi Grimberg void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 564a785dbccSKeith Busch void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 565a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags); 566764e9332SJohn Meneghini bool nvme_failover_req(struct request *req); 56732acab31SChristoph Hellwig void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 56832acab31SChristoph Hellwig int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 5690d0b660fSChristoph Hellwig void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 57032acab31SChristoph Hellwig void nvme_mpath_remove_disk(struct nvme_ns_head *head); 5710d0b660fSChristoph Hellwig int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 5720d0b660fSChristoph Hellwig void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 5730d0b660fSChristoph Hellwig void nvme_mpath_stop(struct nvme_ctrl *ctrl); 5740157ec8dSSagi Grimberg bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 5750157ec8dSSagi Grimberg void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 57632acab31SChristoph Hellwig struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 577479a322fSSagi Grimberg 578479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 579479a322fSSagi Grimberg { 580479a322fSSagi Grimberg struct nvme_ns_head *head = ns->head; 581479a322fSSagi Grimberg 582479a322fSSagi Grimberg if (head->disk && list_empty(&head->list)) 583479a322fSSagi Grimberg kblockd_schedule_work(&head->requeue_work); 584479a322fSSagi Grimberg } 585479a322fSSagi Grimberg 58635fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 58735fe0d12SHannes Reinecke blk_status_t status) 58835fe0d12SHannes Reinecke { 58935fe0d12SHannes Reinecke struct nvme_ns *ns = req->q->queuedata; 59035fe0d12SHannes Reinecke 59135fe0d12SHannes Reinecke if (req->cmd_flags & REQ_NVME_MPATH) 59235fe0d12SHannes Reinecke trace_block_bio_complete(ns->head->disk->queue, 59335fe0d12SHannes Reinecke req->bio, status); 59435fe0d12SHannes Reinecke } 59535fe0d12SHannes Reinecke 5960d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_grpid; 5970d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_state; 59875c10e73SHannes Reinecke extern struct device_attribute subsys_attr_iopolicy; 5990d0b660fSChristoph Hellwig 60032acab31SChristoph Hellwig #else 6010d0b660fSChristoph Hellwig static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 6020d0b660fSChristoph Hellwig { 6030d0b660fSChristoph Hellwig return false; 6040d0b660fSChristoph Hellwig } 605a785dbccSKeith Busch /* 606a785dbccSKeith Busch * Without the multipath code enabled, multiple controller per subsystems are 607a785dbccSKeith Busch * visible as devices and thus we cannot use the subsystem instance. 608a785dbccSKeith Busch */ 609a785dbccSKeith Busch static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 610a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags) 611a785dbccSKeith Busch { 612a785dbccSKeith Busch sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 613a785dbccSKeith Busch } 614a785dbccSKeith Busch 615764e9332SJohn Meneghini static inline bool nvme_failover_req(struct request *req) 61632acab31SChristoph Hellwig { 617764e9332SJohn Meneghini return false; 61832acab31SChristoph Hellwig } 61932acab31SChristoph Hellwig static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 62032acab31SChristoph Hellwig { 62132acab31SChristoph Hellwig } 62232acab31SChristoph Hellwig static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 62332acab31SChristoph Hellwig struct nvme_ns_head *head) 62432acab31SChristoph Hellwig { 62532acab31SChristoph Hellwig return 0; 62632acab31SChristoph Hellwig } 6270d0b660fSChristoph Hellwig static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 6280d0b660fSChristoph Hellwig struct nvme_id_ns *id) 62932acab31SChristoph Hellwig { 63032acab31SChristoph Hellwig } 63132acab31SChristoph Hellwig static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 63232acab31SChristoph Hellwig { 63332acab31SChristoph Hellwig } 6340157ec8dSSagi Grimberg static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 6350157ec8dSSagi Grimberg { 6360157ec8dSSagi Grimberg return false; 6370157ec8dSSagi Grimberg } 6380157ec8dSSagi Grimberg static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 63932acab31SChristoph Hellwig { 64032acab31SChristoph Hellwig } 641479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 642479a322fSSagi Grimberg { 643479a322fSSagi Grimberg } 64435fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 64535fe0d12SHannes Reinecke blk_status_t status) 64635fe0d12SHannes Reinecke { 64735fe0d12SHannes Reinecke } 6480d0b660fSChristoph Hellwig static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 6490d0b660fSChristoph Hellwig struct nvme_id_ctrl *id) 6500d0b660fSChristoph Hellwig { 65114a1336eSChristoph Hellwig if (ctrl->subsys->cmic & (1 << 3)) 65214a1336eSChristoph Hellwig dev_warn(ctrl->device, 65314a1336eSChristoph Hellwig "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 6540d0b660fSChristoph Hellwig return 0; 6550d0b660fSChristoph Hellwig } 6560d0b660fSChristoph Hellwig static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 6570d0b660fSChristoph Hellwig { 6580d0b660fSChristoph Hellwig } 6590d0b660fSChristoph Hellwig static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 6600d0b660fSChristoph Hellwig { 6610d0b660fSChristoph Hellwig } 662b9156daeSSagi Grimberg static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 663b9156daeSSagi Grimberg { 664b9156daeSSagi Grimberg } 665b9156daeSSagi Grimberg static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 666b9156daeSSagi Grimberg { 667b9156daeSSagi Grimberg } 668b9156daeSSagi Grimberg static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 669b9156daeSSagi Grimberg { 670b9156daeSSagi Grimberg } 67132acab31SChristoph Hellwig #endif /* CONFIG_NVME_MULTIPATH */ 67232acab31SChristoph Hellwig 673c4699e70SKeith Busch #ifdef CONFIG_NVM 6743dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 675b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 67633b14f67SHannes Reinecke extern const struct attribute_group nvme_nvm_attr_group; 67784d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 678c4699e70SKeith Busch #else 679b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 6803dc87dd0SMatias Bjørling int node) 681c4699e70SKeith Busch { 682c4699e70SKeith Busch return 0; 683c4699e70SKeith Busch } 684c4699e70SKeith Busch 685b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 68684d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 68784d4add7SMatias Bjørling unsigned long arg) 68884d4add7SMatias Bjørling { 68984d4add7SMatias Bjørling return -ENOTTY; 69084d4add7SMatias Bjørling } 6913dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 6923dc87dd0SMatias Bjørling 69340267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 69440267efdSSimon A. F. Lund { 69540267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 69640267efdSSimon A. F. Lund } 697ca064085SMatias Bjørling 698400b6a7bSGuenter Roeck #ifdef CONFIG_NVME_HWMON 699400b6a7bSGuenter Roeck void nvme_hwmon_init(struct nvme_ctrl *ctrl); 700400b6a7bSGuenter Roeck #else 701400b6a7bSGuenter Roeck static inline void nvme_hwmon_init(struct nvme_ctrl *ctrl) { } 702400b6a7bSGuenter Roeck #endif 703400b6a7bSGuenter Roeck 70457dacad5SJay Sternberg #endif /* _NVME_H */ 705