157dacad5SJay Sternberg /* 257dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 357dacad5SJay Sternberg * 457dacad5SJay Sternberg * This program is free software; you can redistribute it and/or modify it 557dacad5SJay Sternberg * under the terms and conditions of the GNU General Public License, 657dacad5SJay Sternberg * version 2, as published by the Free Software Foundation. 757dacad5SJay Sternberg * 857dacad5SJay Sternberg * This program is distributed in the hope it will be useful, but WITHOUT 957dacad5SJay Sternberg * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1057dacad5SJay Sternberg * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1157dacad5SJay Sternberg * more details. 1257dacad5SJay Sternberg */ 1357dacad5SJay Sternberg 1457dacad5SJay Sternberg #ifndef _NVME_H 1557dacad5SJay Sternberg #define _NVME_H 1657dacad5SJay Sternberg 1757dacad5SJay Sternberg #include <linux/nvme.h> 1857dacad5SJay Sternberg #include <linux/pci.h> 1957dacad5SJay Sternberg #include <linux/kref.h> 2057dacad5SJay Sternberg #include <linux/blk-mq.h> 21b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 22a98e58e5SScott Bauer #include <linux/sed-opal.h> 2357dacad5SJay Sternberg 24297465c8SChristoph Hellwig enum { 25297465c8SChristoph Hellwig /* 26297465c8SChristoph Hellwig * Driver internal status code for commands that were cancelled due 27297465c8SChristoph Hellwig * to timeouts or controller shutdown. The value is negative so 28297465c8SChristoph Hellwig * that it a) doesn't overlap with the unsigned hardware error codes, 29297465c8SChristoph Hellwig * and b) can easily be tested for. 30297465c8SChristoph Hellwig */ 31297465c8SChristoph Hellwig NVME_SC_CANCELLED = -EINTR, 32297465c8SChristoph Hellwig }; 33297465c8SChristoph Hellwig 3457dacad5SJay Sternberg extern unsigned char nvme_io_timeout; 3557dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 3657dacad5SJay Sternberg 3721d34711SChristoph Hellwig extern unsigned char admin_timeout; 3821d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 3921d34711SChristoph Hellwig 405fd4ce1bSChristoph Hellwig extern unsigned char shutdown_timeout; 415fd4ce1bSChristoph Hellwig #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ) 425fd4ce1bSChristoph Hellwig 43038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 44038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 45038bd4cbSSagi Grimberg 46ca064085SMatias Bjørling enum { 47ca064085SMatias Bjørling NVME_NS_LBA = 0, 48ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 49ca064085SMatias Bjørling }; 50ca064085SMatias Bjørling 5157dacad5SJay Sternberg /* 52106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 53106198edSChristoph Hellwig * the standard. 5457dacad5SJay Sternberg */ 55106198edSChristoph Hellwig enum nvme_quirks { 56106198edSChristoph Hellwig /* 57106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 58106198edSChristoph Hellwig * specific Identify field. 59106198edSChristoph Hellwig */ 60106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 61540c801cSKeith Busch 62540c801cSKeith Busch /* 63540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 64540c801cSKeith Busch * correctly. 65540c801cSKeith Busch */ 66540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 6708095e70SKeith Busch 6808095e70SKeith Busch /* 6908095e70SKeith Busch * The controller deterministically returns O's on reads to discarded 7008095e70SKeith Busch * logical blocks. 7108095e70SKeith Busch */ 7208095e70SKeith Busch NVME_QUIRK_DISCARD_ZEROES = (1 << 2), 7354adc010SGuilherme G. Piccoli 7454adc010SGuilherme G. Piccoli /* 7554adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 7654adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 7754adc010SGuilherme G. Piccoli */ 7854adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 79c5552fdeSAndy Lutomirski 80c5552fdeSAndy Lutomirski /* 81c5552fdeSAndy Lutomirski * APST should not be used. 82c5552fdeSAndy Lutomirski */ 83c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 84106198edSChristoph Hellwig }; 85106198edSChristoph Hellwig 86d49187e9SChristoph Hellwig /* 87d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 88d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 89d49187e9SChristoph Hellwig */ 90d49187e9SChristoph Hellwig struct nvme_request { 91d49187e9SChristoph Hellwig struct nvme_command *cmd; 92d49187e9SChristoph Hellwig union nvme_result result; 9344e44b29SChristoph Hellwig u8 retries; 94d49187e9SChristoph Hellwig }; 95d49187e9SChristoph Hellwig 96d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 97d49187e9SChristoph Hellwig { 98d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 99d49187e9SChristoph Hellwig } 100d49187e9SChristoph Hellwig 10154adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 10254adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 10354adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 10454adc010SGuilherme G. Piccoli * found empirically. 10554adc010SGuilherme G. Piccoli */ 10654adc010SGuilherme G. Piccoli #define NVME_QUIRK_DELAY_AMOUNT 2000 10754adc010SGuilherme G. Piccoli 108bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 109bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 110bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 111bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 112def61ecaSChristoph Hellwig NVME_CTRL_RECONNECTING, 113bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 1140ff9d4e1SKeith Busch NVME_CTRL_DEAD, 115bb8d261eSChristoph Hellwig }; 116bb8d261eSChristoph Hellwig 1171c63dc66SChristoph Hellwig struct nvme_ctrl { 118bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 119bd4da3abSAndy Lutomirski bool identified; 120bb8d261eSChristoph Hellwig spinlock_t lock; 1211c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 12257dacad5SJay Sternberg struct request_queue *admin_q; 12307bfcd09SChristoph Hellwig struct request_queue *connect_q; 12457dacad5SJay Sternberg struct device *dev; 12557dacad5SJay Sternberg struct kref kref; 12657dacad5SJay Sternberg int instance; 1275bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 1285bae7f73SChristoph Hellwig struct list_head namespaces; 12969d3b8acSChristoph Hellwig struct mutex namespaces_mutex; 1305bae7f73SChristoph Hellwig struct device *device; /* char device */ 131f3ca80fcSChristoph Hellwig struct list_head node; 132075790ebSKeith Busch struct ida ns_ida; 1331c63dc66SChristoph Hellwig 1344f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 135a98e58e5SScott Bauer 13657dacad5SJay Sternberg char name[12]; 13757dacad5SJay Sternberg char serial[20]; 13857dacad5SJay Sternberg char model[40]; 13957dacad5SJay Sternberg char firmware_rev[8]; 14076e3914aSChristoph Hellwig u16 cntlid; 1415fd4ce1bSChristoph Hellwig 1425fd4ce1bSChristoph Hellwig u32 ctrl_config; 1435fd4ce1bSChristoph Hellwig 1445fd4ce1bSChristoph Hellwig u32 page_size; 14557dacad5SJay Sternberg u32 max_hw_sectors; 14657dacad5SJay Sternberg u16 oncs; 147118472abSKeith Busch u16 vid; 1488a9ae523SScott Bauer u16 oacs; 1496bf25d16SChristoph Hellwig atomic_t abort_limit; 15057dacad5SJay Sternberg u8 event_limit; 15157dacad5SJay Sternberg u8 vwc; 152f3ca80fcSChristoph Hellwig u32 vs; 15307bfcd09SChristoph Hellwig u32 sgls; 154038bd4cbSSagi Grimberg u16 kas; 155c5552fdeSAndy Lutomirski u8 npss; 156c5552fdeSAndy Lutomirski u8 apsta; 157038bd4cbSSagi Grimberg unsigned int kato; 158f3ca80fcSChristoph Hellwig bool subsystem; 159106198edSChristoph Hellwig unsigned long quirks; 160c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 1615955be21SChristoph Hellwig struct work_struct scan_work; 162f866fc42SChristoph Hellwig struct work_struct async_event_work; 163038bd4cbSSagi Grimberg struct delayed_work ka_work; 16407bfcd09SChristoph Hellwig 165c5552fdeSAndy Lutomirski /* Power saving configuration */ 166c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 167c5552fdeSAndy Lutomirski 16807bfcd09SChristoph Hellwig /* Fabrics only */ 16907bfcd09SChristoph Hellwig u16 sqsize; 17007bfcd09SChristoph Hellwig u32 ioccsz; 17107bfcd09SChristoph Hellwig u32 iorcsz; 17207bfcd09SChristoph Hellwig u16 icdoff; 17307bfcd09SChristoph Hellwig u16 maxcmd; 17407bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 17557dacad5SJay Sternberg }; 17657dacad5SJay Sternberg 17757dacad5SJay Sternberg /* 17857dacad5SJay Sternberg * An NVM Express namespace is equivalent to a SCSI LUN 17957dacad5SJay Sternberg */ 18057dacad5SJay Sternberg struct nvme_ns { 18157dacad5SJay Sternberg struct list_head list; 18257dacad5SJay Sternberg 1831c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 18457dacad5SJay Sternberg struct request_queue *queue; 18557dacad5SJay Sternberg struct gendisk *disk; 186b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 18757dacad5SJay Sternberg struct kref kref; 188075790ebSKeith Busch int instance; 18957dacad5SJay Sternberg 1902b9b6e86SKeith Busch u8 eui[8]; 1912b9b6e86SKeith Busch u8 uuid[16]; 1922b9b6e86SKeith Busch 19357dacad5SJay Sternberg unsigned ns_id; 19457dacad5SJay Sternberg int lba_shift; 19557dacad5SJay Sternberg u16 ms; 19657dacad5SJay Sternberg bool ext; 19757dacad5SJay Sternberg u8 pi_type; 198646017a6SKeith Busch unsigned long flags; 199646017a6SKeith Busch 200646017a6SKeith Busch #define NVME_NS_REMOVING 0 20169d9a99cSKeith Busch #define NVME_NS_DEAD 1 202646017a6SKeith Busch 20357dacad5SJay Sternberg u64 mode_select_num_blocks; 20457dacad5SJay Sternberg u32 mode_select_block_len; 20557dacad5SJay Sternberg }; 20657dacad5SJay Sternberg 2071c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 2081a353d85SMing Lin const char *name; 209e439bb12SSagi Grimberg struct module *module; 21007bfcd09SChristoph Hellwig bool is_fabrics; 2111c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 2125fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 2137fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 214f3ca80fcSChristoph Hellwig int (*reset_ctrl)(struct nvme_ctrl *ctrl); 2151673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 216f866fc42SChristoph Hellwig void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx); 2171a353d85SMing Lin int (*delete_ctrl)(struct nvme_ctrl *ctrl); 2181a353d85SMing Lin const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl); 2191a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 22057dacad5SJay Sternberg }; 22157dacad5SJay Sternberg 2221c63dc66SChristoph Hellwig static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) 2231c63dc66SChristoph Hellwig { 2241c63dc66SChristoph Hellwig u32 val = 0; 2251c63dc66SChristoph Hellwig 2261c63dc66SChristoph Hellwig if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) 2271c63dc66SChristoph Hellwig return false; 2281c63dc66SChristoph Hellwig return val & NVME_CSTS_RDY; 2291c63dc66SChristoph Hellwig } 2301c63dc66SChristoph Hellwig 231f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 232f3ca80fcSChristoph Hellwig { 233f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 234f3ca80fcSChristoph Hellwig return -ENOTTY; 235f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 236f3ca80fcSChristoph Hellwig } 237f3ca80fcSChristoph Hellwig 23857dacad5SJay Sternberg static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 23957dacad5SJay Sternberg { 24057dacad5SJay Sternberg return (sector >> (ns->lba_shift - 9)); 24157dacad5SJay Sternberg } 24257dacad5SJay Sternberg 2436904242dSMing Lin static inline void nvme_cleanup_cmd(struct request *req) 2446904242dSMing Lin { 245f9d03f96SChristoph Hellwig if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 246f9d03f96SChristoph Hellwig kfree(page_address(req->special_vec.bv_page) + 247f9d03f96SChristoph Hellwig req->special_vec.bv_offset); 248f9d03f96SChristoph Hellwig } 2496904242dSMing Lin } 2506904242dSMing Lin 25115a190f7SChristoph Hellwig static inline int nvme_error_status(u16 status) 25215a190f7SChristoph Hellwig { 25315a190f7SChristoph Hellwig switch (status & 0x7ff) { 25415a190f7SChristoph Hellwig case NVME_SC_SUCCESS: 25515a190f7SChristoph Hellwig return 0; 25615a190f7SChristoph Hellwig case NVME_SC_CAP_EXCEEDED: 25715a190f7SChristoph Hellwig return -ENOSPC; 25815a190f7SChristoph Hellwig default: 25915a190f7SChristoph Hellwig return -EIO; 26015a190f7SChristoph Hellwig } 26115a190f7SChristoph Hellwig } 26215a190f7SChristoph Hellwig 26377f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 264c55a2fd4SMing Lin void nvme_cancel_request(struct request *req, void *data, bool reserved); 265bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 266bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 2675fd4ce1bSChristoph Hellwig int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 2685fd4ce1bSChristoph Hellwig int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 2695fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 270f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 271f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 27253029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 2731673f1f0SChristoph Hellwig void nvme_put_ctrl(struct nvme_ctrl *ctrl); 2747fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 2755bae7f73SChristoph Hellwig 2765955be21SChristoph Hellwig void nvme_queue_scan(struct nvme_ctrl *ctrl); 2775bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 2781673f1f0SChristoph Hellwig 2794f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2804f1244c8SChristoph Hellwig bool send); 281a98e58e5SScott Bauer 282f866fc42SChristoph Hellwig #define NVME_NR_AERS 1 2837bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 2847bf58533SChristoph Hellwig union nvme_result *res); 285f866fc42SChristoph Hellwig void nvme_queue_async_events(struct nvme_ctrl *ctrl); 286f866fc42SChristoph Hellwig 28725646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 28825646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 28969d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 290302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 291302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 292302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 293302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 294363c9aacSSagi Grimberg 295eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 2964160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 297eb71f435SChristoph Hellwig struct nvme_command *cmd, unsigned int flags, int qid); 2988093f7caSMing Lin int nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 2998093f7caSMing Lin struct nvme_command *cmd); 30057dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 30157dacad5SJay Sternberg void *buf, unsigned bufflen); 30257dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 303d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 304eb71f435SChristoph Hellwig unsigned timeout, int qid, int at_head, int flags); 3054160982eSChristoph Hellwig int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, 3064160982eSChristoph Hellwig void __user *ubuffer, unsigned bufflen, u32 *result, 3074160982eSChristoph Hellwig unsigned timeout); 3080b7f1f26SKeith Busch int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, 3090b7f1f26SKeith Busch void __user *ubuffer, unsigned bufflen, 3100b7f1f26SKeith Busch void __user *meta_buffer, unsigned meta_len, u32 meta_seed, 31157dacad5SJay Sternberg u32 *result, unsigned timeout); 3121c63dc66SChristoph Hellwig int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id); 3131c63dc66SChristoph Hellwig int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid, 31457dacad5SJay Sternberg struct nvme_id_ns **id); 3151c63dc66SChristoph Hellwig int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log); 3161c63dc66SChristoph Hellwig int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid, 3171a6fe74dSAndy Lutomirski void *buffer, size_t buflen, u32 *result); 3181c63dc66SChristoph Hellwig int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11, 3191a6fe74dSAndy Lutomirski void *buffer, size_t buflen, u32 *result); 3209a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 321038bd4cbSSagi Grimberg void nvme_start_keep_alive(struct nvme_ctrl *ctrl); 322038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 32357dacad5SJay Sternberg 32457dacad5SJay Sternberg struct sg_io_hdr; 32557dacad5SJay Sternberg 32657dacad5SJay Sternberg int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr); 32757dacad5SJay Sternberg int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg); 32857dacad5SJay Sternberg int nvme_sg_get_version_num(int __user *ip); 32957dacad5SJay Sternberg 330c4699e70SKeith Busch #ifdef CONFIG_NVM 331ca064085SMatias Bjørling int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id); 3323dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 333b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 3343dc87dd0SMatias Bjørling int nvme_nvm_register_sysfs(struct nvme_ns *ns); 3353dc87dd0SMatias Bjørling void nvme_nvm_unregister_sysfs(struct nvme_ns *ns); 33684d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 337c4699e70SKeith Busch #else 338b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 3393dc87dd0SMatias Bjørling int node) 340c4699e70SKeith Busch { 341c4699e70SKeith Busch return 0; 342c4699e70SKeith Busch } 343c4699e70SKeith Busch 344b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 3453dc87dd0SMatias Bjørling static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns) 3463dc87dd0SMatias Bjørling { 3473dc87dd0SMatias Bjørling return 0; 3483dc87dd0SMatias Bjørling } 3493dc87dd0SMatias Bjørling static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {}; 350c4699e70SKeith Busch static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id) 351c4699e70SKeith Busch { 352c4699e70SKeith Busch return 0; 353c4699e70SKeith Busch } 35484d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 35584d4add7SMatias Bjørling unsigned long arg) 35684d4add7SMatias Bjørling { 35784d4add7SMatias Bjørling return -ENOTTY; 35884d4add7SMatias Bjørling } 3593dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 3603dc87dd0SMatias Bjørling 36140267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 36240267efdSSimon A. F. Lund { 36340267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 36440267efdSSimon A. F. Lund } 365ca064085SMatias Bjørling 3665bae7f73SChristoph Hellwig int __init nvme_core_init(void); 3675bae7f73SChristoph Hellwig void nvme_core_exit(void); 3685bae7f73SChristoph Hellwig 36957dacad5SJay Sternberg #endif /* _NVME_H */ 370