157dacad5SJay Sternberg /* 257dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 357dacad5SJay Sternberg * 457dacad5SJay Sternberg * This program is free software; you can redistribute it and/or modify it 557dacad5SJay Sternberg * under the terms and conditions of the GNU General Public License, 657dacad5SJay Sternberg * version 2, as published by the Free Software Foundation. 757dacad5SJay Sternberg * 857dacad5SJay Sternberg * This program is distributed in the hope it will be useful, but WITHOUT 957dacad5SJay Sternberg * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1057dacad5SJay Sternberg * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1157dacad5SJay Sternberg * more details. 1257dacad5SJay Sternberg */ 1357dacad5SJay Sternberg 1457dacad5SJay Sternberg #ifndef _NVME_H 1557dacad5SJay Sternberg #define _NVME_H 1657dacad5SJay Sternberg 1757dacad5SJay Sternberg #include <linux/nvme.h> 1857dacad5SJay Sternberg #include <linux/pci.h> 1957dacad5SJay Sternberg #include <linux/kref.h> 2057dacad5SJay Sternberg #include <linux/blk-mq.h> 21b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 22a98e58e5SScott Bauer #include <linux/sed-opal.h> 2357dacad5SJay Sternberg 2457dacad5SJay Sternberg extern unsigned char nvme_io_timeout; 2557dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2657dacad5SJay Sternberg 2721d34711SChristoph Hellwig extern unsigned char admin_timeout; 2821d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 2921d34711SChristoph Hellwig 305fd4ce1bSChristoph Hellwig extern unsigned char shutdown_timeout; 315fd4ce1bSChristoph Hellwig #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ) 325fd4ce1bSChristoph Hellwig 33038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 34038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 35038bd4cbSSagi Grimberg 369a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 379a6327d2SSagi Grimberg 38ca064085SMatias Bjørling enum { 39ca064085SMatias Bjørling NVME_NS_LBA = 0, 40ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 41ca064085SMatias Bjørling }; 42ca064085SMatias Bjørling 4357dacad5SJay Sternberg /* 44106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 45106198edSChristoph Hellwig * the standard. 4657dacad5SJay Sternberg */ 47106198edSChristoph Hellwig enum nvme_quirks { 48106198edSChristoph Hellwig /* 49106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 50106198edSChristoph Hellwig * specific Identify field. 51106198edSChristoph Hellwig */ 52106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 53540c801cSKeith Busch 54540c801cSKeith Busch /* 55540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 56540c801cSKeith Busch * correctly. 57540c801cSKeith Busch */ 58540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 5908095e70SKeith Busch 6008095e70SKeith Busch /* 61e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 62e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 6308095e70SKeith Busch */ 64e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 6554adc010SGuilherme G. Piccoli 6654adc010SGuilherme G. Piccoli /* 6754adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 6854adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 6954adc010SGuilherme G. Piccoli */ 7054adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 71c5552fdeSAndy Lutomirski 72c5552fdeSAndy Lutomirski /* 73c5552fdeSAndy Lutomirski * APST should not be used. 74c5552fdeSAndy Lutomirski */ 75c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 76ff5350a8SAndy Lutomirski 77ff5350a8SAndy Lutomirski /* 78ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 79ff5350a8SAndy Lutomirski */ 80ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 81106198edSChristoph Hellwig }; 82106198edSChristoph Hellwig 83d49187e9SChristoph Hellwig /* 84d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 85d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 86d49187e9SChristoph Hellwig */ 87d49187e9SChristoph Hellwig struct nvme_request { 88d49187e9SChristoph Hellwig struct nvme_command *cmd; 89d49187e9SChristoph Hellwig union nvme_result result; 9044e44b29SChristoph Hellwig u8 retries; 9127fa9bc5SChristoph Hellwig u8 flags; 9227fa9bc5SChristoph Hellwig u16 status; 9327fa9bc5SChristoph Hellwig }; 9427fa9bc5SChristoph Hellwig 9527fa9bc5SChristoph Hellwig enum { 9627fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 97d49187e9SChristoph Hellwig }; 98d49187e9SChristoph Hellwig 99d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 100d49187e9SChristoph Hellwig { 101d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 102d49187e9SChristoph Hellwig } 103d49187e9SChristoph Hellwig 10454adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 10554adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 10654adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 10754adc010SGuilherme G. Piccoli * found empirically. 10854adc010SGuilherme G. Piccoli */ 10954adc010SGuilherme G. Piccoli #define NVME_QUIRK_DELAY_AMOUNT 2000 11054adc010SGuilherme G. Piccoli 111bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 112bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 113bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 114bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 115def61ecaSChristoph Hellwig NVME_CTRL_RECONNECTING, 116bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 1170ff9d4e1SKeith Busch NVME_CTRL_DEAD, 118bb8d261eSChristoph Hellwig }; 119bb8d261eSChristoph Hellwig 1201c63dc66SChristoph Hellwig struct nvme_ctrl { 121bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 122bd4da3abSAndy Lutomirski bool identified; 123bb8d261eSChristoph Hellwig spinlock_t lock; 1241c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 12557dacad5SJay Sternberg struct request_queue *admin_q; 12607bfcd09SChristoph Hellwig struct request_queue *connect_q; 12757dacad5SJay Sternberg struct device *dev; 12857dacad5SJay Sternberg struct kref kref; 12957dacad5SJay Sternberg int instance; 1305bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 1315bae7f73SChristoph Hellwig struct list_head namespaces; 13269d3b8acSChristoph Hellwig struct mutex namespaces_mutex; 1335bae7f73SChristoph Hellwig struct device *device; /* char device */ 134f3ca80fcSChristoph Hellwig struct list_head node; 135075790ebSKeith Busch struct ida ns_ida; 1361c63dc66SChristoph Hellwig 1374f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 138a98e58e5SScott Bauer 13957dacad5SJay Sternberg char name[12]; 14057dacad5SJay Sternberg char serial[20]; 14157dacad5SJay Sternberg char model[40]; 14257dacad5SJay Sternberg char firmware_rev[8]; 14376e3914aSChristoph Hellwig u16 cntlid; 1445fd4ce1bSChristoph Hellwig 1455fd4ce1bSChristoph Hellwig u32 ctrl_config; 1465fd4ce1bSChristoph Hellwig 1475fd4ce1bSChristoph Hellwig u32 page_size; 14857dacad5SJay Sternberg u32 max_hw_sectors; 14957dacad5SJay Sternberg u16 oncs; 150118472abSKeith Busch u16 vid; 1518a9ae523SScott Bauer u16 oacs; 1526bf25d16SChristoph Hellwig atomic_t abort_limit; 15357dacad5SJay Sternberg u8 event_limit; 15457dacad5SJay Sternberg u8 vwc; 155f3ca80fcSChristoph Hellwig u32 vs; 15607bfcd09SChristoph Hellwig u32 sgls; 157038bd4cbSSagi Grimberg u16 kas; 158c5552fdeSAndy Lutomirski u8 npss; 159c5552fdeSAndy Lutomirski u8 apsta; 160038bd4cbSSagi Grimberg unsigned int kato; 161f3ca80fcSChristoph Hellwig bool subsystem; 162106198edSChristoph Hellwig unsigned long quirks; 163c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 1645955be21SChristoph Hellwig struct work_struct scan_work; 165f866fc42SChristoph Hellwig struct work_struct async_event_work; 166038bd4cbSSagi Grimberg struct delayed_work ka_work; 16707bfcd09SChristoph Hellwig 168c5552fdeSAndy Lutomirski /* Power saving configuration */ 169c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 170c5552fdeSAndy Lutomirski 171fe6d53c9SChristoph Hellwig u32 hmpre; 172fe6d53c9SChristoph Hellwig u32 hmmin; 173fe6d53c9SChristoph Hellwig 17407bfcd09SChristoph Hellwig /* Fabrics only */ 17507bfcd09SChristoph Hellwig u16 sqsize; 17607bfcd09SChristoph Hellwig u32 ioccsz; 17707bfcd09SChristoph Hellwig u32 iorcsz; 17807bfcd09SChristoph Hellwig u16 icdoff; 17907bfcd09SChristoph Hellwig u16 maxcmd; 180fdf9dfa8SSagi Grimberg int nr_reconnects; 18107bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 18257dacad5SJay Sternberg }; 18357dacad5SJay Sternberg 18457dacad5SJay Sternberg /* 18557dacad5SJay Sternberg * An NVM Express namespace is equivalent to a SCSI LUN 18657dacad5SJay Sternberg */ 18757dacad5SJay Sternberg struct nvme_ns { 18857dacad5SJay Sternberg struct list_head list; 18957dacad5SJay Sternberg 1901c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 19157dacad5SJay Sternberg struct request_queue *queue; 19257dacad5SJay Sternberg struct gendisk *disk; 193b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 19457dacad5SJay Sternberg struct kref kref; 195075790ebSKeith Busch int instance; 19657dacad5SJay Sternberg 1972b9b6e86SKeith Busch u8 eui[8]; 19890985b84SJohannes Thumshirn u8 nguid[16]; 199*3b22ba26SJohannes Thumshirn uuid_t uuid; 2002b9b6e86SKeith Busch 20157dacad5SJay Sternberg unsigned ns_id; 20257dacad5SJay Sternberg int lba_shift; 20357dacad5SJay Sternberg u16 ms; 20457dacad5SJay Sternberg bool ext; 20557dacad5SJay Sternberg u8 pi_type; 206646017a6SKeith Busch unsigned long flags; 207646017a6SKeith Busch 208646017a6SKeith Busch #define NVME_NS_REMOVING 0 20969d9a99cSKeith Busch #define NVME_NS_DEAD 1 210646017a6SKeith Busch 21157dacad5SJay Sternberg u64 mode_select_num_blocks; 21257dacad5SJay Sternberg u32 mode_select_block_len; 21357dacad5SJay Sternberg }; 21457dacad5SJay Sternberg 2151c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 2161a353d85SMing Lin const char *name; 217e439bb12SSagi Grimberg struct module *module; 218d3d5b87dSChristoph Hellwig unsigned int flags; 219d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 220c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 2211c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 2225fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 2237fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 224f3ca80fcSChristoph Hellwig int (*reset_ctrl)(struct nvme_ctrl *ctrl); 2251673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 226f866fc42SChristoph Hellwig void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx); 2271a353d85SMing Lin int (*delete_ctrl)(struct nvme_ctrl *ctrl); 2281a353d85SMing Lin const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl); 2291a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 23057dacad5SJay Sternberg }; 23157dacad5SJay Sternberg 2321c63dc66SChristoph Hellwig static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) 2331c63dc66SChristoph Hellwig { 2341c63dc66SChristoph Hellwig u32 val = 0; 2351c63dc66SChristoph Hellwig 2361c63dc66SChristoph Hellwig if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) 2371c63dc66SChristoph Hellwig return false; 2381c63dc66SChristoph Hellwig return val & NVME_CSTS_RDY; 2391c63dc66SChristoph Hellwig } 2401c63dc66SChristoph Hellwig 241f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 242f3ca80fcSChristoph Hellwig { 243f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 244f3ca80fcSChristoph Hellwig return -ENOTTY; 245f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 246f3ca80fcSChristoph Hellwig } 247f3ca80fcSChristoph Hellwig 24857dacad5SJay Sternberg static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 24957dacad5SJay Sternberg { 25057dacad5SJay Sternberg return (sector >> (ns->lba_shift - 9)); 25157dacad5SJay Sternberg } 25257dacad5SJay Sternberg 2536904242dSMing Lin static inline void nvme_cleanup_cmd(struct request *req) 2546904242dSMing Lin { 255f9d03f96SChristoph Hellwig if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 256f9d03f96SChristoph Hellwig kfree(page_address(req->special_vec.bv_page) + 257f9d03f96SChristoph Hellwig req->special_vec.bv_offset); 258f9d03f96SChristoph Hellwig } 2596904242dSMing Lin } 2606904242dSMing Lin 26127fa9bc5SChristoph Hellwig static inline void nvme_end_request(struct request *req, __le16 status, 26227fa9bc5SChristoph Hellwig union nvme_result result) 26315a190f7SChristoph Hellwig { 26427fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 26527fa9bc5SChristoph Hellwig 26627fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 26727fa9bc5SChristoph Hellwig rq->result = result; 26808e0029aSChristoph Hellwig blk_mq_complete_request(req); 26915a190f7SChristoph Hellwig } 27015a190f7SChristoph Hellwig 27177f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 272c55a2fd4SMing Lin void nvme_cancel_request(struct request *req, void *data, bool reserved); 273bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 274bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 2755fd4ce1bSChristoph Hellwig int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 2765fd4ce1bSChristoph Hellwig int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 2775fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 278f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 279f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 28053029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 2811673f1f0SChristoph Hellwig void nvme_put_ctrl(struct nvme_ctrl *ctrl); 2827fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 2835bae7f73SChristoph Hellwig 2845955be21SChristoph Hellwig void nvme_queue_scan(struct nvme_ctrl *ctrl); 2855bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 2861673f1f0SChristoph Hellwig 2874f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2884f1244c8SChristoph Hellwig bool send); 289a98e58e5SScott Bauer 290f866fc42SChristoph Hellwig #define NVME_NR_AERS 1 2917bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 2927bf58533SChristoph Hellwig union nvme_result *res); 293f866fc42SChristoph Hellwig void nvme_queue_async_events(struct nvme_ctrl *ctrl); 294f866fc42SChristoph Hellwig 29525646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 29625646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 29769d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 298302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 299302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 300302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 301302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 302363c9aacSSagi Grimberg 303eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 3044160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 305eb71f435SChristoph Hellwig struct nvme_command *cmd, unsigned int flags, int qid); 306fc17b653SChristoph Hellwig blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 3078093f7caSMing Lin struct nvme_command *cmd); 30857dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 30957dacad5SJay Sternberg void *buf, unsigned bufflen); 31057dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 311d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 312eb71f435SChristoph Hellwig unsigned timeout, int qid, int at_head, int flags); 3134160982eSChristoph Hellwig int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, 3144160982eSChristoph Hellwig void __user *ubuffer, unsigned bufflen, u32 *result, 3154160982eSChristoph Hellwig unsigned timeout); 3160b7f1f26SKeith Busch int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, 3170b7f1f26SKeith Busch void __user *ubuffer, unsigned bufflen, 3180b7f1f26SKeith Busch void __user *meta_buffer, unsigned meta_len, u32 meta_seed, 31957dacad5SJay Sternberg u32 *result, unsigned timeout); 3201c63dc66SChristoph Hellwig int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id); 3211c63dc66SChristoph Hellwig int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid, 32257dacad5SJay Sternberg struct nvme_id_ns **id); 3231c63dc66SChristoph Hellwig int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log); 3241c63dc66SChristoph Hellwig int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid, 3251a6fe74dSAndy Lutomirski void *buffer, size_t buflen, u32 *result); 3261c63dc66SChristoph Hellwig int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11, 3271a6fe74dSAndy Lutomirski void *buffer, size_t buflen, u32 *result); 3289a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 329038bd4cbSSagi Grimberg void nvme_start_keep_alive(struct nvme_ctrl *ctrl); 330038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 33157dacad5SJay Sternberg 33257dacad5SJay Sternberg struct sg_io_hdr; 33357dacad5SJay Sternberg 33457dacad5SJay Sternberg int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr); 33557dacad5SJay Sternberg int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg); 33657dacad5SJay Sternberg int nvme_sg_get_version_num(int __user *ip); 33757dacad5SJay Sternberg 338c4699e70SKeith Busch #ifdef CONFIG_NVM 339ca064085SMatias Bjørling int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id); 3403dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 341b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 3423dc87dd0SMatias Bjørling int nvme_nvm_register_sysfs(struct nvme_ns *ns); 3433dc87dd0SMatias Bjørling void nvme_nvm_unregister_sysfs(struct nvme_ns *ns); 34484d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 345c4699e70SKeith Busch #else 346b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 3473dc87dd0SMatias Bjørling int node) 348c4699e70SKeith Busch { 349c4699e70SKeith Busch return 0; 350c4699e70SKeith Busch } 351c4699e70SKeith Busch 352b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 3533dc87dd0SMatias Bjørling static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns) 3543dc87dd0SMatias Bjørling { 3553dc87dd0SMatias Bjørling return 0; 3563dc87dd0SMatias Bjørling } 3573dc87dd0SMatias Bjørling static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {}; 358c4699e70SKeith Busch static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id) 359c4699e70SKeith Busch { 360c4699e70SKeith Busch return 0; 361c4699e70SKeith Busch } 36284d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 36384d4add7SMatias Bjørling unsigned long arg) 36484d4add7SMatias Bjørling { 36584d4add7SMatias Bjørling return -ENOTTY; 36684d4add7SMatias Bjørling } 3673dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 3683dc87dd0SMatias Bjørling 36940267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 37040267efdSSimon A. F. Lund { 37140267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 37240267efdSSimon A. F. Lund } 373ca064085SMatias Bjørling 3745bae7f73SChristoph Hellwig int __init nvme_core_init(void); 3755bae7f73SChristoph Hellwig void nvme_core_exit(void); 3765bae7f73SChristoph Hellwig 37757dacad5SJay Sternberg #endif /* _NVME_H */ 378