1bc50ad75SChristoph Hellwig /* SPDX-License-Identifier: GPL-2.0 */ 257dacad5SJay Sternberg /* 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg */ 557dacad5SJay Sternberg 657dacad5SJay Sternberg #ifndef _NVME_H 757dacad5SJay Sternberg #define _NVME_H 857dacad5SJay Sternberg 957dacad5SJay Sternberg #include <linux/nvme.h> 10a6a5149bSChristoph Hellwig #include <linux/cdev.h> 1157dacad5SJay Sternberg #include <linux/pci.h> 1257dacad5SJay Sternberg #include <linux/kref.h> 1357dacad5SJay Sternberg #include <linux/blk-mq.h> 14b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 15a98e58e5SScott Bauer #include <linux/sed-opal.h> 16b9e03857SThomas Tai #include <linux/fault-inject.h> 17978628ecSJohannes Thumshirn #include <linux/rcupdate.h> 1857dacad5SJay Sternberg 1935fe0d12SHannes Reinecke #include <trace/events/block.h> 2035fe0d12SHannes Reinecke 218ae4e447SMarc Olson extern unsigned int nvme_io_timeout; 2257dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2357dacad5SJay Sternberg 248ae4e447SMarc Olson extern unsigned int admin_timeout; 2521d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 2621d34711SChristoph Hellwig 27038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 28038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 29038bd4cbSSagi Grimberg 309a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 31b227c59bSRoy Shterman extern struct workqueue_struct *nvme_reset_wq; 32b227c59bSRoy Shterman extern struct workqueue_struct *nvme_delete_wq; 339a6327d2SSagi Grimberg 34ca064085SMatias Bjørling enum { 35ca064085SMatias Bjørling NVME_NS_LBA = 0, 36ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 37ca064085SMatias Bjørling }; 38ca064085SMatias Bjørling 3957dacad5SJay Sternberg /* 40106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 41106198edSChristoph Hellwig * the standard. 4257dacad5SJay Sternberg */ 43106198edSChristoph Hellwig enum nvme_quirks { 44106198edSChristoph Hellwig /* 45106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 46106198edSChristoph Hellwig * specific Identify field. 47106198edSChristoph Hellwig */ 48106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 49540c801cSKeith Busch 50540c801cSKeith Busch /* 51540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 52540c801cSKeith Busch * correctly. 53540c801cSKeith Busch */ 54540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 5508095e70SKeith Busch 5608095e70SKeith Busch /* 57e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 58e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 5908095e70SKeith Busch */ 60e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 6154adc010SGuilherme G. Piccoli 6254adc010SGuilherme G. Piccoli /* 6354adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 6454adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 6554adc010SGuilherme G. Piccoli */ 6654adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 67c5552fdeSAndy Lutomirski 68c5552fdeSAndy Lutomirski /* 69c5552fdeSAndy Lutomirski * APST should not be used. 70c5552fdeSAndy Lutomirski */ 71c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 72ff5350a8SAndy Lutomirski 73ff5350a8SAndy Lutomirski /* 74ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 75ff5350a8SAndy Lutomirski */ 76ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 77608cc4b1SChristoph Hellwig 78608cc4b1SChristoph Hellwig /* 79608cc4b1SChristoph Hellwig * Supports the LighNVM command set if indicated in vs[1]. 80608cc4b1SChristoph Hellwig */ 81608cc4b1SChristoph Hellwig NVME_QUIRK_LIGHTNVM = (1 << 6), 829abd68efSJens Axboe 839abd68efSJens Axboe /* 849abd68efSJens Axboe * Set MEDIUM priority on SQ creation 859abd68efSJens Axboe */ 869abd68efSJens Axboe NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 876299358dSJames Dingwall 886299358dSJames Dingwall /* 896299358dSJames Dingwall * Ignore device provided subnqn. 906299358dSJames Dingwall */ 916299358dSJames Dingwall NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 927b210e4eSChristoph Hellwig 937b210e4eSChristoph Hellwig /* 947b210e4eSChristoph Hellwig * Broken Write Zeroes. 957b210e4eSChristoph Hellwig */ 967b210e4eSChristoph Hellwig NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 97106198edSChristoph Hellwig }; 98106198edSChristoph Hellwig 99d49187e9SChristoph Hellwig /* 100d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 101d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 102d49187e9SChristoph Hellwig */ 103d49187e9SChristoph Hellwig struct nvme_request { 104d49187e9SChristoph Hellwig struct nvme_command *cmd; 105d49187e9SChristoph Hellwig union nvme_result result; 10644e44b29SChristoph Hellwig u8 retries; 10727fa9bc5SChristoph Hellwig u8 flags; 10827fa9bc5SChristoph Hellwig u16 status; 10959e29ce6SSagi Grimberg struct nvme_ctrl *ctrl; 11027fa9bc5SChristoph Hellwig }; 11127fa9bc5SChristoph Hellwig 11232acab31SChristoph Hellwig /* 11332acab31SChristoph Hellwig * Mark a bio as coming in through the mpath node. 11432acab31SChristoph Hellwig */ 11532acab31SChristoph Hellwig #define REQ_NVME_MPATH REQ_DRV 11632acab31SChristoph Hellwig 11727fa9bc5SChristoph Hellwig enum { 11827fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 119bb06ec31SJames Smart NVME_REQ_USERCMD = (1 << 1), 120d49187e9SChristoph Hellwig }; 121d49187e9SChristoph Hellwig 122d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 123d49187e9SChristoph Hellwig { 124d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 125d49187e9SChristoph Hellwig } 126d49187e9SChristoph Hellwig 1275d87eb94SKeith Busch static inline u16 nvme_req_qid(struct request *req) 1285d87eb94SKeith Busch { 1295d87eb94SKeith Busch if (!req->rq_disk) 1305d87eb94SKeith Busch return 0; 1315d87eb94SKeith Busch return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 1325d87eb94SKeith Busch } 1335d87eb94SKeith Busch 13454adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 13554adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 13654adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 13754adc010SGuilherme G. Piccoli * found empirically. 13854adc010SGuilherme G. Piccoli */ 1398c97eeccSJeff Lien #define NVME_QUIRK_DELAY_AMOUNT 2300 14054adc010SGuilherme G. Piccoli 141bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 142bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 143bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 1442b1b7e78SJianchao Wang NVME_CTRL_ADMIN_ONLY, /* Only admin queue live */ 145bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 146ad6a0a52SMax Gurtovoy NVME_CTRL_CONNECTING, 147bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 1480ff9d4e1SKeith Busch NVME_CTRL_DEAD, 149bb8d261eSChristoph Hellwig }; 150bb8d261eSChristoph Hellwig 151a3646451SAkinobu Mita struct nvme_fault_inject { 152a3646451SAkinobu Mita #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 153a3646451SAkinobu Mita struct fault_attr attr; 154a3646451SAkinobu Mita struct dentry *parent; 155a3646451SAkinobu Mita bool dont_retry; /* DNR, do not retry */ 156a3646451SAkinobu Mita u16 status; /* status code */ 157a3646451SAkinobu Mita #endif 158a3646451SAkinobu Mita }; 159a3646451SAkinobu Mita 1601c63dc66SChristoph Hellwig struct nvme_ctrl { 1616e3ca03eSSagi Grimberg bool comp_seen; 162bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 163bd4da3abSAndy Lutomirski bool identified; 164bb8d261eSChristoph Hellwig spinlock_t lock; 165e7ad43c3SKeith Busch struct mutex scan_lock; 1661c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 16757dacad5SJay Sternberg struct request_queue *admin_q; 16807bfcd09SChristoph Hellwig struct request_queue *connect_q; 16957dacad5SJay Sternberg struct device *dev; 17057dacad5SJay Sternberg int instance; 171103e515eSHannes Reinecke int numa_node; 1725bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 17334b6c231SSagi Grimberg struct blk_mq_tag_set *admin_tagset; 1745bae7f73SChristoph Hellwig struct list_head namespaces; 175765cc031SJianchao Wang struct rw_semaphore namespaces_rwsem; 176d22524a4SChristoph Hellwig struct device ctrl_device; 1775bae7f73SChristoph Hellwig struct device *device; /* char device */ 178a6a5149bSChristoph Hellwig struct cdev cdev; 179d86c4d8eSChristoph Hellwig struct work_struct reset_work; 180c5017e85SChristoph Hellwig struct work_struct delete_work; 1811c63dc66SChristoph Hellwig 182ab9e00ccSChristoph Hellwig struct nvme_subsystem *subsys; 183ab9e00ccSChristoph Hellwig struct list_head subsys_entry; 184ab9e00ccSChristoph Hellwig 1854f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 186a98e58e5SScott Bauer 18757dacad5SJay Sternberg char name[12]; 18876e3914aSChristoph Hellwig u16 cntlid; 1895fd4ce1bSChristoph Hellwig 1905fd4ce1bSChristoph Hellwig u32 ctrl_config; 191b6dccf7fSArnav Dawn u16 mtfa; 192d858e5f0SSagi Grimberg u32 queue_count; 1935fd4ce1bSChristoph Hellwig 19420d0dfe6SSagi Grimberg u64 cap; 1955fd4ce1bSChristoph Hellwig u32 page_size; 19657dacad5SJay Sternberg u32 max_hw_sectors; 197943e942eSJens Axboe u32 max_segments; 19849cd84b6SKeith Busch u16 crdt[3]; 19957dacad5SJay Sternberg u16 oncs; 2008a9ae523SScott Bauer u16 oacs; 201f5d11840SJens Axboe u16 nssa; 202f5d11840SJens Axboe u16 nr_streams; 2030d0b660fSChristoph Hellwig u32 max_namespaces; 2046bf25d16SChristoph Hellwig atomic_t abort_limit; 20557dacad5SJay Sternberg u8 vwc; 206f3ca80fcSChristoph Hellwig u32 vs; 20707bfcd09SChristoph Hellwig u32 sgls; 208038bd4cbSSagi Grimberg u16 kas; 209c5552fdeSAndy Lutomirski u8 npss; 210c5552fdeSAndy Lutomirski u8 apsta; 211c0561f82SHannes Reinecke u32 oaes; 212e3d7874dSKeith Busch u32 aen_result; 2133e53ba38SSagi Grimberg u32 ctratt; 21407fbd32aSMartin K. Petersen unsigned int shutdown_timeout; 215038bd4cbSSagi Grimberg unsigned int kato; 216f3ca80fcSChristoph Hellwig bool subsystem; 217106198edSChristoph Hellwig unsigned long quirks; 218c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 21984fef62dSKeith Busch struct nvme_effects_log *effects; 2205955be21SChristoph Hellwig struct work_struct scan_work; 221f866fc42SChristoph Hellwig struct work_struct async_event_work; 222038bd4cbSSagi Grimberg struct delayed_work ka_work; 2230a34e466SRoland Dreier struct nvme_command ka_cmd; 224b6dccf7fSArnav Dawn struct work_struct fw_act_work; 22530d90964SChristoph Hellwig unsigned long events; 22607bfcd09SChristoph Hellwig 2270d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 2280d0b660fSChristoph Hellwig /* asymmetric namespace access: */ 2290d0b660fSChristoph Hellwig u8 anacap; 2300d0b660fSChristoph Hellwig u8 anatt; 2310d0b660fSChristoph Hellwig u32 anagrpmax; 2320d0b660fSChristoph Hellwig u32 nanagrpid; 2330d0b660fSChristoph Hellwig struct mutex ana_lock; 2340d0b660fSChristoph Hellwig struct nvme_ana_rsp_hdr *ana_log_buf; 2350d0b660fSChristoph Hellwig size_t ana_log_size; 2360d0b660fSChristoph Hellwig struct timer_list anatt_timer; 2370d0b660fSChristoph Hellwig struct work_struct ana_work; 2380d0b660fSChristoph Hellwig #endif 2390d0b660fSChristoph Hellwig 240c5552fdeSAndy Lutomirski /* Power saving configuration */ 241c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 24276a5af84SKai-Heng Feng bool apst_enabled; 243c5552fdeSAndy Lutomirski 244044a9df1SChristoph Hellwig /* PCIe only: */ 245fe6d53c9SChristoph Hellwig u32 hmpre; 246fe6d53c9SChristoph Hellwig u32 hmmin; 247044a9df1SChristoph Hellwig u32 hmminds; 248044a9df1SChristoph Hellwig u16 hmmaxd; 249fe6d53c9SChristoph Hellwig 25007bfcd09SChristoph Hellwig /* Fabrics only */ 25107bfcd09SChristoph Hellwig u16 sqsize; 25207bfcd09SChristoph Hellwig u32 ioccsz; 25307bfcd09SChristoph Hellwig u32 iorcsz; 25407bfcd09SChristoph Hellwig u16 icdoff; 25507bfcd09SChristoph Hellwig u16 maxcmd; 256fdf9dfa8SSagi Grimberg int nr_reconnects; 25707bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 258cb5b7262SJens Axboe 259cb5b7262SJens Axboe struct page *discard_page; 260cb5b7262SJens Axboe unsigned long discard_page_busy; 261f79d5fdaSAkinobu Mita 262f79d5fdaSAkinobu Mita struct nvme_fault_inject fault_inject; 26357dacad5SJay Sternberg }; 26457dacad5SJay Sternberg 26575c10e73SHannes Reinecke enum nvme_iopolicy { 26675c10e73SHannes Reinecke NVME_IOPOLICY_NUMA, 26775c10e73SHannes Reinecke NVME_IOPOLICY_RR, 26875c10e73SHannes Reinecke }; 26975c10e73SHannes Reinecke 270ab9e00ccSChristoph Hellwig struct nvme_subsystem { 271ab9e00ccSChristoph Hellwig int instance; 272ab9e00ccSChristoph Hellwig struct device dev; 273ab9e00ccSChristoph Hellwig /* 274ab9e00ccSChristoph Hellwig * Because we unregister the device on the last put we need 275ab9e00ccSChristoph Hellwig * a separate refcount. 276ab9e00ccSChristoph Hellwig */ 277ab9e00ccSChristoph Hellwig struct kref ref; 278ab9e00ccSChristoph Hellwig struct list_head entry; 279ab9e00ccSChristoph Hellwig struct mutex lock; 280ab9e00ccSChristoph Hellwig struct list_head ctrls; 281ed754e5dSChristoph Hellwig struct list_head nsheads; 282ab9e00ccSChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 283ab9e00ccSChristoph Hellwig char serial[20]; 284ab9e00ccSChristoph Hellwig char model[40]; 285ab9e00ccSChristoph Hellwig char firmware_rev[8]; 286ab9e00ccSChristoph Hellwig u8 cmic; 287ab9e00ccSChristoph Hellwig u16 vendor_id; 28881adb863SBart Van Assche u16 awupf; /* 0's based awupf value. */ 289ed754e5dSChristoph Hellwig struct ida ns_ida; 29075c10e73SHannes Reinecke #ifdef CONFIG_NVME_MULTIPATH 29175c10e73SHannes Reinecke enum nvme_iopolicy iopolicy; 29275c10e73SHannes Reinecke #endif 293ab9e00ccSChristoph Hellwig }; 294ab9e00ccSChristoph Hellwig 295002fab04SChristoph Hellwig /* 296002fab04SChristoph Hellwig * Container structure for uniqueue namespace identifiers. 297002fab04SChristoph Hellwig */ 298002fab04SChristoph Hellwig struct nvme_ns_ids { 299002fab04SChristoph Hellwig u8 eui64[8]; 300002fab04SChristoph Hellwig u8 nguid[16]; 301002fab04SChristoph Hellwig uuid_t uuid; 302002fab04SChristoph Hellwig }; 303002fab04SChristoph Hellwig 304ed754e5dSChristoph Hellwig /* 305ed754e5dSChristoph Hellwig * Anchor structure for namespaces. There is one for each namespace in a 306ed754e5dSChristoph Hellwig * NVMe subsystem that any of our controllers can see, and the namespace 307ed754e5dSChristoph Hellwig * structure for each controller is chained of it. For private namespaces 308ed754e5dSChristoph Hellwig * there is a 1:1 relation to our namespace structures, that is ->list 309ed754e5dSChristoph Hellwig * only ever has a single entry for private namespaces. 310ed754e5dSChristoph Hellwig */ 311ed754e5dSChristoph Hellwig struct nvme_ns_head { 312ed754e5dSChristoph Hellwig struct list_head list; 313ed754e5dSChristoph Hellwig struct srcu_struct srcu; 314ed754e5dSChristoph Hellwig struct nvme_subsystem *subsys; 315ed754e5dSChristoph Hellwig unsigned ns_id; 316ed754e5dSChristoph Hellwig struct nvme_ns_ids ids; 317ed754e5dSChristoph Hellwig struct list_head entry; 318ed754e5dSChristoph Hellwig struct kref ref; 319ed754e5dSChristoph Hellwig int instance; 320f3334447SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 321f3334447SChristoph Hellwig struct gendisk *disk; 322f3334447SChristoph Hellwig struct bio_list requeue_list; 323f3334447SChristoph Hellwig spinlock_t requeue_lock; 324f3334447SChristoph Hellwig struct work_struct requeue_work; 325f3334447SChristoph Hellwig struct mutex lock; 326f3334447SChristoph Hellwig struct nvme_ns __rcu *current_path[]; 327f3334447SChristoph Hellwig #endif 328ed754e5dSChristoph Hellwig }; 329ed754e5dSChristoph Hellwig 33057dacad5SJay Sternberg struct nvme_ns { 33157dacad5SJay Sternberg struct list_head list; 33257dacad5SJay Sternberg 3331c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 33457dacad5SJay Sternberg struct request_queue *queue; 33557dacad5SJay Sternberg struct gendisk *disk; 3360d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 3370d0b660fSChristoph Hellwig enum nvme_ana_state ana_state; 3380d0b660fSChristoph Hellwig u32 ana_grpid; 3390d0b660fSChristoph Hellwig #endif 340ed754e5dSChristoph Hellwig struct list_head siblings; 341b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 34257dacad5SJay Sternberg struct kref kref; 343ed754e5dSChristoph Hellwig struct nvme_ns_head *head; 34457dacad5SJay Sternberg 34557dacad5SJay Sternberg int lba_shift; 34657dacad5SJay Sternberg u16 ms; 347f5d11840SJens Axboe u16 sgs; 348f5d11840SJens Axboe u32 sws; 34957dacad5SJay Sternberg bool ext; 35057dacad5SJay Sternberg u8 pi_type; 351646017a6SKeith Busch unsigned long flags; 352646017a6SKeith Busch #define NVME_NS_REMOVING 0 35369d9a99cSKeith Busch #define NVME_NS_DEAD 1 3540d0b660fSChristoph Hellwig #define NVME_NS_ANA_PENDING 2 35557eeaf8eSChristoph Hellwig u16 noiob; 356b9e03857SThomas Tai 357b9e03857SThomas Tai struct nvme_fault_inject fault_inject; 358b9e03857SThomas Tai 35957dacad5SJay Sternberg }; 36057dacad5SJay Sternberg 3611c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 3621a353d85SMing Lin const char *name; 363e439bb12SSagi Grimberg struct module *module; 364d3d5b87dSChristoph Hellwig unsigned int flags; 365d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 366c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 367e0596ab2SLogan Gunthorpe #define NVME_F_PCI_P2PDMA (1 << 2) 3681c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 3695fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 3707fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 3711673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 372ad22c355SKeith Busch void (*submit_async_event)(struct nvme_ctrl *ctrl); 373c5017e85SChristoph Hellwig void (*delete_ctrl)(struct nvme_ctrl *ctrl); 3741a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 37557dacad5SJay Sternberg }; 37657dacad5SJay Sternberg 377b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 378a3646451SAkinobu Mita void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 379a3646451SAkinobu Mita const char *dev_name); 380a3646451SAkinobu Mita void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 381b9e03857SThomas Tai void nvme_should_fail(struct request *req); 382b9e03857SThomas Tai #else 383a3646451SAkinobu Mita static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 384a3646451SAkinobu Mita const char *dev_name) 385a3646451SAkinobu Mita { 386a3646451SAkinobu Mita } 387a3646451SAkinobu Mita static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 388a3646451SAkinobu Mita { 389a3646451SAkinobu Mita } 390b9e03857SThomas Tai static inline void nvme_should_fail(struct request *req) {} 391b9e03857SThomas Tai #endif 392b9e03857SThomas Tai 393f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 394f3ca80fcSChristoph Hellwig { 395f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 396f3ca80fcSChristoph Hellwig return -ENOTTY; 397f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 398f3ca80fcSChristoph Hellwig } 399f3ca80fcSChristoph Hellwig 40057dacad5SJay Sternberg static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 40157dacad5SJay Sternberg { 40257dacad5SJay Sternberg return (sector >> (ns->lba_shift - 9)); 40357dacad5SJay Sternberg } 40457dacad5SJay Sternberg 40527fa9bc5SChristoph Hellwig static inline void nvme_end_request(struct request *req, __le16 status, 40627fa9bc5SChristoph Hellwig union nvme_result result) 40715a190f7SChristoph Hellwig { 40827fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 40927fa9bc5SChristoph Hellwig 41027fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 41127fa9bc5SChristoph Hellwig rq->result = result; 412b9e03857SThomas Tai /* inject error when permitted by fault injection framework */ 413b9e03857SThomas Tai nvme_should_fail(req); 41408e0029aSChristoph Hellwig blk_mq_complete_request(req); 41515a190f7SChristoph Hellwig } 41615a190f7SChristoph Hellwig 417d22524a4SChristoph Hellwig static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 418d22524a4SChristoph Hellwig { 419d22524a4SChristoph Hellwig get_device(ctrl->device); 420d22524a4SChristoph Hellwig } 421d22524a4SChristoph Hellwig 422d22524a4SChristoph Hellwig static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 423d22524a4SChristoph Hellwig { 424d22524a4SChristoph Hellwig put_device(ctrl->device); 425d22524a4SChristoph Hellwig } 426d22524a4SChristoph Hellwig 42777f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 4287baa8572SJens Axboe bool nvme_cancel_request(struct request *req, void *data, bool reserved); 429bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 430bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 431b5b05048SSagi Grimberg int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 432c0f2f45bSSagi Grimberg int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 4335fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 434f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 435f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 43653029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 437d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 438d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 4391673f1f0SChristoph Hellwig void nvme_put_ctrl(struct nvme_ctrl *ctrl); 4407fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 4415bae7f73SChristoph Hellwig 4425bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 4431673f1f0SChristoph Hellwig 4444f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 4454f1244c8SChristoph Hellwig bool send); 446a98e58e5SScott Bauer 4477bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 448287a63ebSChristoph Hellwig volatile union nvme_result *res); 449f866fc42SChristoph Hellwig 45025646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 45125646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 45269d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 453d6135c3aSKeith Busch void nvme_sync_queues(struct nvme_ctrl *ctrl); 454302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 455302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 456302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 457302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 458363c9aacSSagi Grimberg 459eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 4604160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 4619a95e4efSBart Van Assche struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 462f7f1fc36SMax Gurtovoy void nvme_cleanup_cmd(struct request *req); 463fc17b653SChristoph Hellwig blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 4648093f7caSMing Lin struct nvme_command *cmd); 46557dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 46657dacad5SJay Sternberg void *buf, unsigned bufflen); 46757dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 468d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 4699a95e4efSBart Van Assche unsigned timeout, int qid, int at_head, 4706287b51cSSagi Grimberg blk_mq_req_flags_t flags, bool poll); 4711a87ee65SKeith Busch int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 4721a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 4731a87ee65SKeith Busch u32 *result); 4741a87ee65SKeith Busch int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 4751a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 4761a87ee65SKeith Busch u32 *result); 4779a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 478038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 479d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 48079c48ccfSSagi Grimberg int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 481c5017e85SChristoph Hellwig int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 48257dacad5SJay Sternberg 4830e98719bSChristoph Hellwig int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 4840e98719bSChristoph Hellwig void *log, size_t size, u64 offset); 485d558fb51SMatias Bjørling 48633b14f67SHannes Reinecke extern const struct attribute_group *nvme_ns_id_attr_groups[]; 48732acab31SChristoph Hellwig extern const struct block_device_operations nvme_ns_head_ops; 48832acab31SChristoph Hellwig 48932acab31SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 49066b20ac0SMarta Rybczynska static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 49166b20ac0SMarta Rybczynska { 49266b20ac0SMarta Rybczynska return ctrl->ana_log_buf != NULL; 49366b20ac0SMarta Rybczynska } 49466b20ac0SMarta Rybczynska 495a785dbccSKeith Busch void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 496a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags); 49732acab31SChristoph Hellwig void nvme_failover_req(struct request *req); 49832acab31SChristoph Hellwig void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 49932acab31SChristoph Hellwig int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 5000d0b660fSChristoph Hellwig void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 50132acab31SChristoph Hellwig void nvme_mpath_remove_disk(struct nvme_ns_head *head); 5020d0b660fSChristoph Hellwig int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 5030d0b660fSChristoph Hellwig void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 5040d0b660fSChristoph Hellwig void nvme_mpath_stop(struct nvme_ctrl *ctrl); 505f3334447SChristoph Hellwig void nvme_mpath_clear_current_path(struct nvme_ns *ns); 50632acab31SChristoph Hellwig struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 507479a322fSSagi Grimberg 508479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 509479a322fSSagi Grimberg { 510479a322fSSagi Grimberg struct nvme_ns_head *head = ns->head; 511479a322fSSagi Grimberg 512479a322fSSagi Grimberg if (head->disk && list_empty(&head->list)) 513479a322fSSagi Grimberg kblockd_schedule_work(&head->requeue_work); 514479a322fSSagi Grimberg } 515479a322fSSagi Grimberg 51635fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 51735fe0d12SHannes Reinecke blk_status_t status) 51835fe0d12SHannes Reinecke { 51935fe0d12SHannes Reinecke struct nvme_ns *ns = req->q->queuedata; 52035fe0d12SHannes Reinecke 52135fe0d12SHannes Reinecke if (req->cmd_flags & REQ_NVME_MPATH) 52235fe0d12SHannes Reinecke trace_block_bio_complete(ns->head->disk->queue, 52335fe0d12SHannes Reinecke req->bio, status); 52435fe0d12SHannes Reinecke } 52535fe0d12SHannes Reinecke 5260d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_grpid; 5270d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_state; 52875c10e73SHannes Reinecke extern struct device_attribute subsys_attr_iopolicy; 5290d0b660fSChristoph Hellwig 53032acab31SChristoph Hellwig #else 5310d0b660fSChristoph Hellwig static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 5320d0b660fSChristoph Hellwig { 5330d0b660fSChristoph Hellwig return false; 5340d0b660fSChristoph Hellwig } 535a785dbccSKeith Busch /* 536a785dbccSKeith Busch * Without the multipath code enabled, multiple controller per subsystems are 537a785dbccSKeith Busch * visible as devices and thus we cannot use the subsystem instance. 538a785dbccSKeith Busch */ 539a785dbccSKeith Busch static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 540a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags) 541a785dbccSKeith Busch { 542a785dbccSKeith Busch sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 543a785dbccSKeith Busch } 544a785dbccSKeith Busch 54532acab31SChristoph Hellwig static inline void nvme_failover_req(struct request *req) 54632acab31SChristoph Hellwig { 54732acab31SChristoph Hellwig } 54832acab31SChristoph Hellwig static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 54932acab31SChristoph Hellwig { 55032acab31SChristoph Hellwig } 55132acab31SChristoph Hellwig static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 55232acab31SChristoph Hellwig struct nvme_ns_head *head) 55332acab31SChristoph Hellwig { 55432acab31SChristoph Hellwig return 0; 55532acab31SChristoph Hellwig } 5560d0b660fSChristoph Hellwig static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 5570d0b660fSChristoph Hellwig struct nvme_id_ns *id) 55832acab31SChristoph Hellwig { 55932acab31SChristoph Hellwig } 56032acab31SChristoph Hellwig static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 56132acab31SChristoph Hellwig { 56232acab31SChristoph Hellwig } 56332acab31SChristoph Hellwig static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns) 56432acab31SChristoph Hellwig { 56532acab31SChristoph Hellwig } 566479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 567479a322fSSagi Grimberg { 568479a322fSSagi Grimberg } 56935fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 57035fe0d12SHannes Reinecke blk_status_t status) 57135fe0d12SHannes Reinecke { 57235fe0d12SHannes Reinecke } 5730d0b660fSChristoph Hellwig static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 5740d0b660fSChristoph Hellwig struct nvme_id_ctrl *id) 5750d0b660fSChristoph Hellwig { 57614a1336eSChristoph Hellwig if (ctrl->subsys->cmic & (1 << 3)) 57714a1336eSChristoph Hellwig dev_warn(ctrl->device, 57814a1336eSChristoph Hellwig "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 5790d0b660fSChristoph Hellwig return 0; 5800d0b660fSChristoph Hellwig } 5810d0b660fSChristoph Hellwig static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 5820d0b660fSChristoph Hellwig { 5830d0b660fSChristoph Hellwig } 5840d0b660fSChristoph Hellwig static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 5850d0b660fSChristoph Hellwig { 5860d0b660fSChristoph Hellwig } 58732acab31SChristoph Hellwig #endif /* CONFIG_NVME_MULTIPATH */ 58832acab31SChristoph Hellwig 589c4699e70SKeith Busch #ifdef CONFIG_NVM 5903dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 591b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 59233b14f67SHannes Reinecke extern const struct attribute_group nvme_nvm_attr_group; 59384d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 594c4699e70SKeith Busch #else 595b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 5963dc87dd0SMatias Bjørling int node) 597c4699e70SKeith Busch { 598c4699e70SKeith Busch return 0; 599c4699e70SKeith Busch } 600c4699e70SKeith Busch 601b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 60284d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 60384d4add7SMatias Bjørling unsigned long arg) 60484d4add7SMatias Bjørling { 60584d4add7SMatias Bjørling return -ENOTTY; 60684d4add7SMatias Bjørling } 6073dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 6083dc87dd0SMatias Bjørling 60940267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 61040267efdSSimon A. F. Lund { 61140267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 61240267efdSSimon A. F. Lund } 613ca064085SMatias Bjørling 61457dacad5SJay Sternberg #endif /* _NVME_H */ 615