157dacad5SJay Sternberg /* 257dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 357dacad5SJay Sternberg * 457dacad5SJay Sternberg * This program is free software; you can redistribute it and/or modify it 557dacad5SJay Sternberg * under the terms and conditions of the GNU General Public License, 657dacad5SJay Sternberg * version 2, as published by the Free Software Foundation. 757dacad5SJay Sternberg * 857dacad5SJay Sternberg * This program is distributed in the hope it will be useful, but WITHOUT 957dacad5SJay Sternberg * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1057dacad5SJay Sternberg * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1157dacad5SJay Sternberg * more details. 1257dacad5SJay Sternberg */ 1357dacad5SJay Sternberg 1457dacad5SJay Sternberg #ifndef _NVME_H 1557dacad5SJay Sternberg #define _NVME_H 1657dacad5SJay Sternberg 1757dacad5SJay Sternberg #include <linux/nvme.h> 1857dacad5SJay Sternberg #include <linux/pci.h> 1957dacad5SJay Sternberg #include <linux/kref.h> 2057dacad5SJay Sternberg #include <linux/blk-mq.h> 21b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 22a98e58e5SScott Bauer #include <linux/sed-opal.h> 2357dacad5SJay Sternberg 24297465c8SChristoph Hellwig enum { 25297465c8SChristoph Hellwig /* 26297465c8SChristoph Hellwig * Driver internal status code for commands that were cancelled due 27297465c8SChristoph Hellwig * to timeouts or controller shutdown. The value is negative so 28297465c8SChristoph Hellwig * that it a) doesn't overlap with the unsigned hardware error codes, 29297465c8SChristoph Hellwig * and b) can easily be tested for. 30297465c8SChristoph Hellwig */ 31297465c8SChristoph Hellwig NVME_SC_CANCELLED = -EINTR, 32297465c8SChristoph Hellwig }; 33297465c8SChristoph Hellwig 3457dacad5SJay Sternberg extern unsigned char nvme_io_timeout; 3557dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 3657dacad5SJay Sternberg 3721d34711SChristoph Hellwig extern unsigned char admin_timeout; 3821d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 3921d34711SChristoph Hellwig 405fd4ce1bSChristoph Hellwig extern unsigned char shutdown_timeout; 415fd4ce1bSChristoph Hellwig #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ) 425fd4ce1bSChristoph Hellwig 43038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 44038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 45038bd4cbSSagi Grimberg 46f80ec966SKeith Busch extern unsigned int nvme_max_retries; 47f80ec966SKeith Busch 48ca064085SMatias Bjørling enum { 49ca064085SMatias Bjørling NVME_NS_LBA = 0, 50ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 51ca064085SMatias Bjørling }; 52ca064085SMatias Bjørling 5357dacad5SJay Sternberg /* 54106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 55106198edSChristoph Hellwig * the standard. 5657dacad5SJay Sternberg */ 57106198edSChristoph Hellwig enum nvme_quirks { 58106198edSChristoph Hellwig /* 59106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 60106198edSChristoph Hellwig * specific Identify field. 61106198edSChristoph Hellwig */ 62106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 63540c801cSKeith Busch 64540c801cSKeith Busch /* 65540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 66540c801cSKeith Busch * correctly. 67540c801cSKeith Busch */ 68540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 6908095e70SKeith Busch 7008095e70SKeith Busch /* 7108095e70SKeith Busch * The controller deterministically returns O's on reads to discarded 7208095e70SKeith Busch * logical blocks. 7308095e70SKeith Busch */ 7408095e70SKeith Busch NVME_QUIRK_DISCARD_ZEROES = (1 << 2), 7554adc010SGuilherme G. Piccoli 7654adc010SGuilherme G. Piccoli /* 7754adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 7854adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 7954adc010SGuilherme G. Piccoli */ 8054adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 81c5552fdeSAndy Lutomirski 82c5552fdeSAndy Lutomirski /* 83c5552fdeSAndy Lutomirski * APST should not be used. 84c5552fdeSAndy Lutomirski */ 85c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 86106198edSChristoph Hellwig }; 87106198edSChristoph Hellwig 88d49187e9SChristoph Hellwig /* 89d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 90d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 91d49187e9SChristoph Hellwig */ 92d49187e9SChristoph Hellwig struct nvme_request { 93d49187e9SChristoph Hellwig struct nvme_command *cmd; 94d49187e9SChristoph Hellwig union nvme_result result; 95d49187e9SChristoph Hellwig }; 96d49187e9SChristoph Hellwig 97d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 98d49187e9SChristoph Hellwig { 99d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 100d49187e9SChristoph Hellwig } 101d49187e9SChristoph Hellwig 10254adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 10354adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 10454adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 10554adc010SGuilherme G. Piccoli * found empirically. 10654adc010SGuilherme G. Piccoli */ 10754adc010SGuilherme G. Piccoli #define NVME_QUIRK_DELAY_AMOUNT 2000 10854adc010SGuilherme G. Piccoli 109bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 110bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 111bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 112bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 113def61ecaSChristoph Hellwig NVME_CTRL_RECONNECTING, 114bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 1150ff9d4e1SKeith Busch NVME_CTRL_DEAD, 116bb8d261eSChristoph Hellwig }; 117bb8d261eSChristoph Hellwig 1181c63dc66SChristoph Hellwig struct nvme_ctrl { 119bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 120bd4da3abSAndy Lutomirski bool identified; 121bb8d261eSChristoph Hellwig spinlock_t lock; 1221c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 12357dacad5SJay Sternberg struct request_queue *admin_q; 12407bfcd09SChristoph Hellwig struct request_queue *connect_q; 12557dacad5SJay Sternberg struct device *dev; 12657dacad5SJay Sternberg struct kref kref; 12757dacad5SJay Sternberg int instance; 1285bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 1295bae7f73SChristoph Hellwig struct list_head namespaces; 13069d3b8acSChristoph Hellwig struct mutex namespaces_mutex; 1315bae7f73SChristoph Hellwig struct device *device; /* char device */ 132f3ca80fcSChristoph Hellwig struct list_head node; 133075790ebSKeith Busch struct ida ns_ida; 1341c63dc66SChristoph Hellwig 1354f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 136a98e58e5SScott Bauer 13757dacad5SJay Sternberg char name[12]; 13857dacad5SJay Sternberg char serial[20]; 13957dacad5SJay Sternberg char model[40]; 14057dacad5SJay Sternberg char firmware_rev[8]; 14176e3914aSChristoph Hellwig u16 cntlid; 1425fd4ce1bSChristoph Hellwig 1435fd4ce1bSChristoph Hellwig u32 ctrl_config; 1445fd4ce1bSChristoph Hellwig 1455fd4ce1bSChristoph Hellwig u32 page_size; 14657dacad5SJay Sternberg u32 max_hw_sectors; 14757dacad5SJay Sternberg u16 oncs; 148118472abSKeith Busch u16 vid; 1498a9ae523SScott Bauer u16 oacs; 1506bf25d16SChristoph Hellwig atomic_t abort_limit; 15157dacad5SJay Sternberg u8 event_limit; 15257dacad5SJay Sternberg u8 vwc; 153f3ca80fcSChristoph Hellwig u32 vs; 15407bfcd09SChristoph Hellwig u32 sgls; 155038bd4cbSSagi Grimberg u16 kas; 156c5552fdeSAndy Lutomirski u8 npss; 157c5552fdeSAndy Lutomirski u8 apsta; 158038bd4cbSSagi Grimberg unsigned int kato; 159f3ca80fcSChristoph Hellwig bool subsystem; 160106198edSChristoph Hellwig unsigned long quirks; 161c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 1625955be21SChristoph Hellwig struct work_struct scan_work; 163f866fc42SChristoph Hellwig struct work_struct async_event_work; 164038bd4cbSSagi Grimberg struct delayed_work ka_work; 16507bfcd09SChristoph Hellwig 166c5552fdeSAndy Lutomirski /* Power saving configuration */ 167c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 168c5552fdeSAndy Lutomirski 16907bfcd09SChristoph Hellwig /* Fabrics only */ 17007bfcd09SChristoph Hellwig u16 sqsize; 17107bfcd09SChristoph Hellwig u32 ioccsz; 17207bfcd09SChristoph Hellwig u32 iorcsz; 17307bfcd09SChristoph Hellwig u16 icdoff; 17407bfcd09SChristoph Hellwig u16 maxcmd; 17507bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 17657dacad5SJay Sternberg }; 17757dacad5SJay Sternberg 17857dacad5SJay Sternberg /* 17957dacad5SJay Sternberg * An NVM Express namespace is equivalent to a SCSI LUN 18057dacad5SJay Sternberg */ 18157dacad5SJay Sternberg struct nvme_ns { 18257dacad5SJay Sternberg struct list_head list; 18357dacad5SJay Sternberg 1841c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 18557dacad5SJay Sternberg struct request_queue *queue; 18657dacad5SJay Sternberg struct gendisk *disk; 187b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 18857dacad5SJay Sternberg struct kref kref; 189075790ebSKeith Busch int instance; 19057dacad5SJay Sternberg 1912b9b6e86SKeith Busch u8 eui[8]; 1922b9b6e86SKeith Busch u8 uuid[16]; 1932b9b6e86SKeith Busch 19457dacad5SJay Sternberg unsigned ns_id; 19557dacad5SJay Sternberg int lba_shift; 19657dacad5SJay Sternberg u16 ms; 19757dacad5SJay Sternberg bool ext; 19857dacad5SJay Sternberg u8 pi_type; 199646017a6SKeith Busch unsigned long flags; 200646017a6SKeith Busch 201646017a6SKeith Busch #define NVME_NS_REMOVING 0 20269d9a99cSKeith Busch #define NVME_NS_DEAD 1 203646017a6SKeith Busch 20457dacad5SJay Sternberg u64 mode_select_num_blocks; 20557dacad5SJay Sternberg u32 mode_select_block_len; 20657dacad5SJay Sternberg }; 20757dacad5SJay Sternberg 2081c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 2091a353d85SMing Lin const char *name; 210e439bb12SSagi Grimberg struct module *module; 21107bfcd09SChristoph Hellwig bool is_fabrics; 2121c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 2135fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 2147fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 215f3ca80fcSChristoph Hellwig int (*reset_ctrl)(struct nvme_ctrl *ctrl); 2161673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 217f866fc42SChristoph Hellwig void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx); 2181a353d85SMing Lin int (*delete_ctrl)(struct nvme_ctrl *ctrl); 2191a353d85SMing Lin const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl); 2201a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 22157dacad5SJay Sternberg }; 22257dacad5SJay Sternberg 2231c63dc66SChristoph Hellwig static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) 2241c63dc66SChristoph Hellwig { 2251c63dc66SChristoph Hellwig u32 val = 0; 2261c63dc66SChristoph Hellwig 2271c63dc66SChristoph Hellwig if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) 2281c63dc66SChristoph Hellwig return false; 2291c63dc66SChristoph Hellwig return val & NVME_CSTS_RDY; 2301c63dc66SChristoph Hellwig } 2311c63dc66SChristoph Hellwig 232f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 233f3ca80fcSChristoph Hellwig { 234f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 235f3ca80fcSChristoph Hellwig return -ENOTTY; 236f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 237f3ca80fcSChristoph Hellwig } 238f3ca80fcSChristoph Hellwig 23957dacad5SJay Sternberg static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 24057dacad5SJay Sternberg { 24157dacad5SJay Sternberg return (sector >> (ns->lba_shift - 9)); 24257dacad5SJay Sternberg } 24357dacad5SJay Sternberg 2446904242dSMing Lin static inline void nvme_cleanup_cmd(struct request *req) 2456904242dSMing Lin { 246f9d03f96SChristoph Hellwig if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 247f9d03f96SChristoph Hellwig kfree(page_address(req->special_vec.bv_page) + 248f9d03f96SChristoph Hellwig req->special_vec.bv_offset); 249f9d03f96SChristoph Hellwig } 2506904242dSMing Lin } 2516904242dSMing Lin 25215a190f7SChristoph Hellwig static inline int nvme_error_status(u16 status) 25315a190f7SChristoph Hellwig { 25415a190f7SChristoph Hellwig switch (status & 0x7ff) { 25515a190f7SChristoph Hellwig case NVME_SC_SUCCESS: 25615a190f7SChristoph Hellwig return 0; 25715a190f7SChristoph Hellwig case NVME_SC_CAP_EXCEEDED: 25815a190f7SChristoph Hellwig return -ENOSPC; 25915a190f7SChristoph Hellwig default: 26015a190f7SChristoph Hellwig return -EIO; 26115a190f7SChristoph Hellwig } 26215a190f7SChristoph Hellwig } 26315a190f7SChristoph Hellwig 2647688faa6SChristoph Hellwig static inline bool nvme_req_needs_retry(struct request *req, u16 status) 2657688faa6SChristoph Hellwig { 2667688faa6SChristoph Hellwig return !(status & NVME_SC_DNR || blk_noretry_request(req)) && 267f80ec966SKeith Busch (jiffies - req->start_time) < req->timeout && 268f80ec966SKeith Busch req->retries < nvme_max_retries; 2697688faa6SChristoph Hellwig } 2707688faa6SChristoph Hellwig 271c55a2fd4SMing Lin void nvme_cancel_request(struct request *req, void *data, bool reserved); 272bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 273bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 2745fd4ce1bSChristoph Hellwig int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 2755fd4ce1bSChristoph Hellwig int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 2765fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 277f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 278f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 27953029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 2801673f1f0SChristoph Hellwig void nvme_put_ctrl(struct nvme_ctrl *ctrl); 2817fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 2825bae7f73SChristoph Hellwig 2835955be21SChristoph Hellwig void nvme_queue_scan(struct nvme_ctrl *ctrl); 2845bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 2851673f1f0SChristoph Hellwig 2864f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2874f1244c8SChristoph Hellwig bool send); 288a98e58e5SScott Bauer 289f866fc42SChristoph Hellwig #define NVME_NR_AERS 1 2907bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 2917bf58533SChristoph Hellwig union nvme_result *res); 292f866fc42SChristoph Hellwig void nvme_queue_async_events(struct nvme_ctrl *ctrl); 293f866fc42SChristoph Hellwig 29425646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 29525646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 29669d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 297*302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 298*302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 299*302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 300*302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 301363c9aacSSagi Grimberg 302eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 3034160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 304eb71f435SChristoph Hellwig struct nvme_command *cmd, unsigned int flags, int qid); 3057688faa6SChristoph Hellwig void nvme_requeue_req(struct request *req); 3068093f7caSMing Lin int nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 3078093f7caSMing Lin struct nvme_command *cmd); 30857dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 30957dacad5SJay Sternberg void *buf, unsigned bufflen); 31057dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 311d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 312eb71f435SChristoph Hellwig unsigned timeout, int qid, int at_head, int flags); 3134160982eSChristoph Hellwig int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, 3144160982eSChristoph Hellwig void __user *ubuffer, unsigned bufflen, u32 *result, 3154160982eSChristoph Hellwig unsigned timeout); 3160b7f1f26SKeith Busch int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, 3170b7f1f26SKeith Busch void __user *ubuffer, unsigned bufflen, 3180b7f1f26SKeith Busch void __user *meta_buffer, unsigned meta_len, u32 meta_seed, 31957dacad5SJay Sternberg u32 *result, unsigned timeout); 3201c63dc66SChristoph Hellwig int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id); 3211c63dc66SChristoph Hellwig int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid, 32257dacad5SJay Sternberg struct nvme_id_ns **id); 3231c63dc66SChristoph Hellwig int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log); 3241c63dc66SChristoph Hellwig int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid, 3251a6fe74dSAndy Lutomirski void *buffer, size_t buflen, u32 *result); 3261c63dc66SChristoph Hellwig int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11, 3271a6fe74dSAndy Lutomirski void *buffer, size_t buflen, u32 *result); 3289a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 329038bd4cbSSagi Grimberg void nvme_start_keep_alive(struct nvme_ctrl *ctrl); 330038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 33157dacad5SJay Sternberg 33257dacad5SJay Sternberg struct sg_io_hdr; 33357dacad5SJay Sternberg 33457dacad5SJay Sternberg int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr); 33557dacad5SJay Sternberg int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg); 33657dacad5SJay Sternberg int nvme_sg_get_version_num(int __user *ip); 33757dacad5SJay Sternberg 338c4699e70SKeith Busch #ifdef CONFIG_NVM 339ca064085SMatias Bjørling int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id); 3403dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 341b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 3423dc87dd0SMatias Bjørling int nvme_nvm_register_sysfs(struct nvme_ns *ns); 3433dc87dd0SMatias Bjørling void nvme_nvm_unregister_sysfs(struct nvme_ns *ns); 34484d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 345c4699e70SKeith Busch #else 346b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 3473dc87dd0SMatias Bjørling int node) 348c4699e70SKeith Busch { 349c4699e70SKeith Busch return 0; 350c4699e70SKeith Busch } 351c4699e70SKeith Busch 352b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 3533dc87dd0SMatias Bjørling static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns) 3543dc87dd0SMatias Bjørling { 3553dc87dd0SMatias Bjørling return 0; 3563dc87dd0SMatias Bjørling } 3573dc87dd0SMatias Bjørling static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {}; 358c4699e70SKeith Busch static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id) 359c4699e70SKeith Busch { 360c4699e70SKeith Busch return 0; 361c4699e70SKeith Busch } 36284d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 36384d4add7SMatias Bjørling unsigned long arg) 36484d4add7SMatias Bjørling { 36584d4add7SMatias Bjørling return -ENOTTY; 36684d4add7SMatias Bjørling } 3673dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 3683dc87dd0SMatias Bjørling 36940267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 37040267efdSSimon A. F. Lund { 37140267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 37240267efdSSimon A. F. Lund } 373ca064085SMatias Bjørling 3745bae7f73SChristoph Hellwig int __init nvme_core_init(void); 3755bae7f73SChristoph Hellwig void nvme_core_exit(void); 3765bae7f73SChristoph Hellwig 37757dacad5SJay Sternberg #endif /* _NVME_H */ 378