1bc50ad75SChristoph Hellwig /* SPDX-License-Identifier: GPL-2.0 */ 257dacad5SJay Sternberg /* 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg */ 557dacad5SJay Sternberg 657dacad5SJay Sternberg #ifndef _NVME_H 757dacad5SJay Sternberg #define _NVME_H 857dacad5SJay Sternberg 957dacad5SJay Sternberg #include <linux/nvme.h> 10a6a5149bSChristoph Hellwig #include <linux/cdev.h> 1157dacad5SJay Sternberg #include <linux/pci.h> 1257dacad5SJay Sternberg #include <linux/kref.h> 1357dacad5SJay Sternberg #include <linux/blk-mq.h> 14b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 15a98e58e5SScott Bauer #include <linux/sed-opal.h> 16b9e03857SThomas Tai #include <linux/fault-inject.h> 17978628ecSJohannes Thumshirn #include <linux/rcupdate.h> 18c1ac9a4bSKeith Busch #include <linux/wait.h> 194d2ce688SJames Smart #include <linux/t10-pi.h> 2057dacad5SJay Sternberg 2135fe0d12SHannes Reinecke #include <trace/events/block.h> 2235fe0d12SHannes Reinecke 238ae4e447SMarc Olson extern unsigned int nvme_io_timeout; 2457dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2557dacad5SJay Sternberg 268ae4e447SMarc Olson extern unsigned int admin_timeout; 2721d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 2821d34711SChristoph Hellwig 29038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 30038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 31038bd4cbSSagi Grimberg 3238e18002SIsrael Rukshin #ifdef CONFIG_ARCH_NO_SG_CHAIN 3338e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 0 34ba7ca2aeSIsrael Rukshin #define NVME_INLINE_METADATA_SG_CNT 0 3538e18002SIsrael Rukshin #else 3638e18002SIsrael Rukshin #define NVME_INLINE_SG_CNT 2 37ba7ca2aeSIsrael Rukshin #define NVME_INLINE_METADATA_SG_CNT 1 3838e18002SIsrael Rukshin #endif 3938e18002SIsrael Rukshin 409a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 41b227c59bSRoy Shterman extern struct workqueue_struct *nvme_reset_wq; 42b227c59bSRoy Shterman extern struct workqueue_struct *nvme_delete_wq; 439a6327d2SSagi Grimberg 44ca064085SMatias Bjørling enum { 45ca064085SMatias Bjørling NVME_NS_LBA = 0, 46ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 47ca064085SMatias Bjørling }; 48ca064085SMatias Bjørling 4957dacad5SJay Sternberg /* 50106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 51106198edSChristoph Hellwig * the standard. 5257dacad5SJay Sternberg */ 53106198edSChristoph Hellwig enum nvme_quirks { 54106198edSChristoph Hellwig /* 55106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 56106198edSChristoph Hellwig * specific Identify field. 57106198edSChristoph Hellwig */ 58106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 59540c801cSKeith Busch 60540c801cSKeith Busch /* 61540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 62540c801cSKeith Busch * correctly. 63540c801cSKeith Busch */ 64540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 6508095e70SKeith Busch 6608095e70SKeith Busch /* 67e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 68e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 6908095e70SKeith Busch */ 70e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 7154adc010SGuilherme G. Piccoli 7254adc010SGuilherme G. Piccoli /* 7354adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 7454adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 7554adc010SGuilherme G. Piccoli */ 7654adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 77c5552fdeSAndy Lutomirski 78c5552fdeSAndy Lutomirski /* 79c5552fdeSAndy Lutomirski * APST should not be used. 80c5552fdeSAndy Lutomirski */ 81c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 82ff5350a8SAndy Lutomirski 83ff5350a8SAndy Lutomirski /* 84ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 85ff5350a8SAndy Lutomirski */ 86ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 87608cc4b1SChristoph Hellwig 88608cc4b1SChristoph Hellwig /* 89608cc4b1SChristoph Hellwig * Supports the LighNVM command set if indicated in vs[1]. 90608cc4b1SChristoph Hellwig */ 91608cc4b1SChristoph Hellwig NVME_QUIRK_LIGHTNVM = (1 << 6), 929abd68efSJens Axboe 939abd68efSJens Axboe /* 949abd68efSJens Axboe * Set MEDIUM priority on SQ creation 959abd68efSJens Axboe */ 969abd68efSJens Axboe NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 976299358dSJames Dingwall 986299358dSJames Dingwall /* 996299358dSJames Dingwall * Ignore device provided subnqn. 1006299358dSJames Dingwall */ 1016299358dSJames Dingwall NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 1027b210e4eSChristoph Hellwig 1037b210e4eSChristoph Hellwig /* 1047b210e4eSChristoph Hellwig * Broken Write Zeroes. 1057b210e4eSChristoph Hellwig */ 1067b210e4eSChristoph Hellwig NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 107cb32de1bSMario Limonciello 108cb32de1bSMario Limonciello /* 109cb32de1bSMario Limonciello * Force simple suspend/resume path. 110cb32de1bSMario Limonciello */ 111cb32de1bSMario Limonciello NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 1127ad67ca5SLinus Torvalds 1137ad67ca5SLinus Torvalds /* 11466341331SBenjamin Herrenschmidt * Use only one interrupt vector for all queues 11566341331SBenjamin Herrenschmidt */ 1167ad67ca5SLinus Torvalds NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 11766341331SBenjamin Herrenschmidt 11866341331SBenjamin Herrenschmidt /* 11966341331SBenjamin Herrenschmidt * Use non-standard 128 bytes SQEs. 12066341331SBenjamin Herrenschmidt */ 1217ad67ca5SLinus Torvalds NVME_QUIRK_128_BYTES_SQES = (1 << 12), 122d38e9f04SBenjamin Herrenschmidt 123d38e9f04SBenjamin Herrenschmidt /* 124d38e9f04SBenjamin Herrenschmidt * Prevent tag overlap between queues 125d38e9f04SBenjamin Herrenschmidt */ 1267ad67ca5SLinus Torvalds NVME_QUIRK_SHARED_TAGS = (1 << 13), 1276c6aa2f2SAkinobu Mita 1286c6aa2f2SAkinobu Mita /* 1296c6aa2f2SAkinobu Mita * Don't change the value of the temperature threshold feature 1306c6aa2f2SAkinobu Mita */ 1316c6aa2f2SAkinobu Mita NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 132106198edSChristoph Hellwig }; 133106198edSChristoph Hellwig 134d49187e9SChristoph Hellwig /* 135d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 136d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 137d49187e9SChristoph Hellwig */ 138d49187e9SChristoph Hellwig struct nvme_request { 139d49187e9SChristoph Hellwig struct nvme_command *cmd; 140d49187e9SChristoph Hellwig union nvme_result result; 14144e44b29SChristoph Hellwig u8 retries; 14227fa9bc5SChristoph Hellwig u8 flags; 14327fa9bc5SChristoph Hellwig u16 status; 14459e29ce6SSagi Grimberg struct nvme_ctrl *ctrl; 14527fa9bc5SChristoph Hellwig }; 14627fa9bc5SChristoph Hellwig 14732acab31SChristoph Hellwig /* 14832acab31SChristoph Hellwig * Mark a bio as coming in through the mpath node. 14932acab31SChristoph Hellwig */ 15032acab31SChristoph Hellwig #define REQ_NVME_MPATH REQ_DRV 15132acab31SChristoph Hellwig 15227fa9bc5SChristoph Hellwig enum { 15327fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 154bb06ec31SJames Smart NVME_REQ_USERCMD = (1 << 1), 155d49187e9SChristoph Hellwig }; 156d49187e9SChristoph Hellwig 157d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 158d49187e9SChristoph Hellwig { 159d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 160d49187e9SChristoph Hellwig } 161d49187e9SChristoph Hellwig 1625d87eb94SKeith Busch static inline u16 nvme_req_qid(struct request *req) 1635d87eb94SKeith Busch { 1645d87eb94SKeith Busch if (!req->rq_disk) 1655d87eb94SKeith Busch return 0; 1665d87eb94SKeith Busch return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(req)) + 1; 1675d87eb94SKeith Busch } 1685d87eb94SKeith Busch 16954adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 17054adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 17154adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 17254adc010SGuilherme G. Piccoli * found empirically. 17354adc010SGuilherme G. Piccoli */ 1748c97eeccSJeff Lien #define NVME_QUIRK_DELAY_AMOUNT 2300 17554adc010SGuilherme G. Piccoli 176bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 177bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 178bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 179bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 180ad6a0a52SMax Gurtovoy NVME_CTRL_CONNECTING, 181bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 1820ff9d4e1SKeith Busch NVME_CTRL_DEAD, 183bb8d261eSChristoph Hellwig }; 184bb8d261eSChristoph Hellwig 185a3646451SAkinobu Mita struct nvme_fault_inject { 186a3646451SAkinobu Mita #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 187a3646451SAkinobu Mita struct fault_attr attr; 188a3646451SAkinobu Mita struct dentry *parent; 189a3646451SAkinobu Mita bool dont_retry; /* DNR, do not retry */ 190a3646451SAkinobu Mita u16 status; /* status code */ 191a3646451SAkinobu Mita #endif 192a3646451SAkinobu Mita }; 193a3646451SAkinobu Mita 194be93e87eSKeith Busch struct nvme_cel { 195be93e87eSKeith Busch struct list_head entry; 196be93e87eSKeith Busch struct nvme_effects_log log; 197be93e87eSKeith Busch u8 csi; 198be93e87eSKeith Busch }; 199be93e87eSKeith Busch 2001c63dc66SChristoph Hellwig struct nvme_ctrl { 2016e3ca03eSSagi Grimberg bool comp_seen; 202bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 203bd4da3abSAndy Lutomirski bool identified; 204bb8d261eSChristoph Hellwig spinlock_t lock; 205e7ad43c3SKeith Busch struct mutex scan_lock; 2061c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 20757dacad5SJay Sternberg struct request_queue *admin_q; 20807bfcd09SChristoph Hellwig struct request_queue *connect_q; 209e7832cb4SSagi Grimberg struct request_queue *fabrics_q; 21057dacad5SJay Sternberg struct device *dev; 21157dacad5SJay Sternberg int instance; 212103e515eSHannes Reinecke int numa_node; 2135bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 21434b6c231SSagi Grimberg struct blk_mq_tag_set *admin_tagset; 2155bae7f73SChristoph Hellwig struct list_head namespaces; 216765cc031SJianchao Wang struct rw_semaphore namespaces_rwsem; 217d22524a4SChristoph Hellwig struct device ctrl_device; 2185bae7f73SChristoph Hellwig struct device *device; /* char device */ 219a6a5149bSChristoph Hellwig struct cdev cdev; 220d86c4d8eSChristoph Hellwig struct work_struct reset_work; 221c5017e85SChristoph Hellwig struct work_struct delete_work; 222c1ac9a4bSKeith Busch wait_queue_head_t state_wq; 2231c63dc66SChristoph Hellwig 224ab9e00ccSChristoph Hellwig struct nvme_subsystem *subsys; 225ab9e00ccSChristoph Hellwig struct list_head subsys_entry; 226ab9e00ccSChristoph Hellwig 2274f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 228a98e58e5SScott Bauer 22957dacad5SJay Sternberg char name[12]; 23076e3914aSChristoph Hellwig u16 cntlid; 2315fd4ce1bSChristoph Hellwig 2325fd4ce1bSChristoph Hellwig u32 ctrl_config; 233b6dccf7fSArnav Dawn u16 mtfa; 234d858e5f0SSagi Grimberg u32 queue_count; 2355fd4ce1bSChristoph Hellwig 23620d0dfe6SSagi Grimberg u64 cap; 2375fd4ce1bSChristoph Hellwig u32 page_size; 23857dacad5SJay Sternberg u32 max_hw_sectors; 239943e942eSJens Axboe u32 max_segments; 24095093350SMax Gurtovoy u32 max_integrity_segments; 241240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 242240e6ee2SKeith Busch u32 max_zone_append; 243240e6ee2SKeith Busch #endif 24449cd84b6SKeith Busch u16 crdt[3]; 24557dacad5SJay Sternberg u16 oncs; 2468a9ae523SScott Bauer u16 oacs; 247f5d11840SJens Axboe u16 nssa; 248f5d11840SJens Axboe u16 nr_streams; 249f968688fSKeith Busch u16 sqsize; 2500d0b660fSChristoph Hellwig u32 max_namespaces; 2516bf25d16SChristoph Hellwig atomic_t abort_limit; 25257dacad5SJay Sternberg u8 vwc; 253f3ca80fcSChristoph Hellwig u32 vs; 25407bfcd09SChristoph Hellwig u32 sgls; 255038bd4cbSSagi Grimberg u16 kas; 256c5552fdeSAndy Lutomirski u8 npss; 257c5552fdeSAndy Lutomirski u8 apsta; 258400b6a7bSGuenter Roeck u16 wctemp; 259400b6a7bSGuenter Roeck u16 cctemp; 260c0561f82SHannes Reinecke u32 oaes; 261e3d7874dSKeith Busch u32 aen_result; 2623e53ba38SSagi Grimberg u32 ctratt; 26307fbd32aSMartin K. Petersen unsigned int shutdown_timeout; 264038bd4cbSSagi Grimberg unsigned int kato; 265f3ca80fcSChristoph Hellwig bool subsystem; 266106198edSChristoph Hellwig unsigned long quirks; 267c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 26884fef62dSKeith Busch struct nvme_effects_log *effects; 269be93e87eSKeith Busch struct list_head cels; 2705955be21SChristoph Hellwig struct work_struct scan_work; 271f866fc42SChristoph Hellwig struct work_struct async_event_work; 272038bd4cbSSagi Grimberg struct delayed_work ka_work; 2730a34e466SRoland Dreier struct nvme_command ka_cmd; 274b6dccf7fSArnav Dawn struct work_struct fw_act_work; 27530d90964SChristoph Hellwig unsigned long events; 276ce151813SIsrael Rukshin bool created; 27707bfcd09SChristoph Hellwig 2780d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 2790d0b660fSChristoph Hellwig /* asymmetric namespace access: */ 2800d0b660fSChristoph Hellwig u8 anacap; 2810d0b660fSChristoph Hellwig u8 anatt; 2820d0b660fSChristoph Hellwig u32 anagrpmax; 2830d0b660fSChristoph Hellwig u32 nanagrpid; 2840d0b660fSChristoph Hellwig struct mutex ana_lock; 2850d0b660fSChristoph Hellwig struct nvme_ana_rsp_hdr *ana_log_buf; 2860d0b660fSChristoph Hellwig size_t ana_log_size; 2870d0b660fSChristoph Hellwig struct timer_list anatt_timer; 2880d0b660fSChristoph Hellwig struct work_struct ana_work; 2890d0b660fSChristoph Hellwig #endif 2900d0b660fSChristoph Hellwig 291c5552fdeSAndy Lutomirski /* Power saving configuration */ 292c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 29376a5af84SKai-Heng Feng bool apst_enabled; 294c5552fdeSAndy Lutomirski 295044a9df1SChristoph Hellwig /* PCIe only: */ 296fe6d53c9SChristoph Hellwig u32 hmpre; 297fe6d53c9SChristoph Hellwig u32 hmmin; 298044a9df1SChristoph Hellwig u32 hmminds; 299044a9df1SChristoph Hellwig u16 hmmaxd; 300fe6d53c9SChristoph Hellwig 30107bfcd09SChristoph Hellwig /* Fabrics only */ 30207bfcd09SChristoph Hellwig u32 ioccsz; 30307bfcd09SChristoph Hellwig u32 iorcsz; 30407bfcd09SChristoph Hellwig u16 icdoff; 30507bfcd09SChristoph Hellwig u16 maxcmd; 306fdf9dfa8SSagi Grimberg int nr_reconnects; 30707bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 308cb5b7262SJens Axboe 309cb5b7262SJens Axboe struct page *discard_page; 310cb5b7262SJens Axboe unsigned long discard_page_busy; 311f79d5fdaSAkinobu Mita 312f79d5fdaSAkinobu Mita struct nvme_fault_inject fault_inject; 31357dacad5SJay Sternberg }; 31457dacad5SJay Sternberg 31575c10e73SHannes Reinecke enum nvme_iopolicy { 31675c10e73SHannes Reinecke NVME_IOPOLICY_NUMA, 31775c10e73SHannes Reinecke NVME_IOPOLICY_RR, 31875c10e73SHannes Reinecke }; 31975c10e73SHannes Reinecke 320ab9e00ccSChristoph Hellwig struct nvme_subsystem { 321ab9e00ccSChristoph Hellwig int instance; 322ab9e00ccSChristoph Hellwig struct device dev; 323ab9e00ccSChristoph Hellwig /* 324ab9e00ccSChristoph Hellwig * Because we unregister the device on the last put we need 325ab9e00ccSChristoph Hellwig * a separate refcount. 326ab9e00ccSChristoph Hellwig */ 327ab9e00ccSChristoph Hellwig struct kref ref; 328ab9e00ccSChristoph Hellwig struct list_head entry; 329ab9e00ccSChristoph Hellwig struct mutex lock; 330ab9e00ccSChristoph Hellwig struct list_head ctrls; 331ed754e5dSChristoph Hellwig struct list_head nsheads; 332ab9e00ccSChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 333ab9e00ccSChristoph Hellwig char serial[20]; 334ab9e00ccSChristoph Hellwig char model[40]; 335ab9e00ccSChristoph Hellwig char firmware_rev[8]; 336ab9e00ccSChristoph Hellwig u8 cmic; 337ab9e00ccSChristoph Hellwig u16 vendor_id; 33881adb863SBart Van Assche u16 awupf; /* 0's based awupf value. */ 339ed754e5dSChristoph Hellwig struct ida ns_ida; 34075c10e73SHannes Reinecke #ifdef CONFIG_NVME_MULTIPATH 34175c10e73SHannes Reinecke enum nvme_iopolicy iopolicy; 34275c10e73SHannes Reinecke #endif 343ab9e00ccSChristoph Hellwig }; 344ab9e00ccSChristoph Hellwig 345002fab04SChristoph Hellwig /* 346002fab04SChristoph Hellwig * Container structure for uniqueue namespace identifiers. 347002fab04SChristoph Hellwig */ 348002fab04SChristoph Hellwig struct nvme_ns_ids { 349002fab04SChristoph Hellwig u8 eui64[8]; 350002fab04SChristoph Hellwig u8 nguid[16]; 351002fab04SChristoph Hellwig uuid_t uuid; 35271010c30SNiklas Cassel u8 csi; 353002fab04SChristoph Hellwig }; 354002fab04SChristoph Hellwig 355ed754e5dSChristoph Hellwig /* 356ed754e5dSChristoph Hellwig * Anchor structure for namespaces. There is one for each namespace in a 357ed754e5dSChristoph Hellwig * NVMe subsystem that any of our controllers can see, and the namespace 358ed754e5dSChristoph Hellwig * structure for each controller is chained of it. For private namespaces 359ed754e5dSChristoph Hellwig * there is a 1:1 relation to our namespace structures, that is ->list 360ed754e5dSChristoph Hellwig * only ever has a single entry for private namespaces. 361ed754e5dSChristoph Hellwig */ 362ed754e5dSChristoph Hellwig struct nvme_ns_head { 363ed754e5dSChristoph Hellwig struct list_head list; 364ed754e5dSChristoph Hellwig struct srcu_struct srcu; 365ed754e5dSChristoph Hellwig struct nvme_subsystem *subsys; 366ed754e5dSChristoph Hellwig unsigned ns_id; 367ed754e5dSChristoph Hellwig struct nvme_ns_ids ids; 368ed754e5dSChristoph Hellwig struct list_head entry; 369ed754e5dSChristoph Hellwig struct kref ref; 3700c284db7SKeith Busch bool shared; 371ed754e5dSChristoph Hellwig int instance; 372be93e87eSKeith Busch struct nvme_effects_log *effects; 373f3334447SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 374f3334447SChristoph Hellwig struct gendisk *disk; 375f3334447SChristoph Hellwig struct bio_list requeue_list; 376f3334447SChristoph Hellwig spinlock_t requeue_lock; 377f3334447SChristoph Hellwig struct work_struct requeue_work; 378f3334447SChristoph Hellwig struct mutex lock; 379d8a22f85SAnton Eidelman unsigned long flags; 380d8a22f85SAnton Eidelman #define NVME_NSHEAD_DISK_LIVE 0 381f3334447SChristoph Hellwig struct nvme_ns __rcu *current_path[]; 382f3334447SChristoph Hellwig #endif 383ed754e5dSChristoph Hellwig }; 384ed754e5dSChristoph Hellwig 385ffc89b1dSMax Gurtovoy enum nvme_ns_features { 386ffc89b1dSMax Gurtovoy NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 387b29f8485SMax Gurtovoy NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 388ffc89b1dSMax Gurtovoy }; 389ffc89b1dSMax Gurtovoy 39057dacad5SJay Sternberg struct nvme_ns { 39157dacad5SJay Sternberg struct list_head list; 39257dacad5SJay Sternberg 3931c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 39457dacad5SJay Sternberg struct request_queue *queue; 39557dacad5SJay Sternberg struct gendisk *disk; 3960d0b660fSChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 3970d0b660fSChristoph Hellwig enum nvme_ana_state ana_state; 3980d0b660fSChristoph Hellwig u32 ana_grpid; 3990d0b660fSChristoph Hellwig #endif 400ed754e5dSChristoph Hellwig struct list_head siblings; 401b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 40257dacad5SJay Sternberg struct kref kref; 403ed754e5dSChristoph Hellwig struct nvme_ns_head *head; 40457dacad5SJay Sternberg 40557dacad5SJay Sternberg int lba_shift; 40657dacad5SJay Sternberg u16 ms; 407f5d11840SJens Axboe u16 sgs; 408f5d11840SJens Axboe u32 sws; 40957dacad5SJay Sternberg u8 pi_type; 410240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 411240e6ee2SKeith Busch u64 zsze; 412240e6ee2SKeith Busch #endif 413ffc89b1dSMax Gurtovoy unsigned long features; 414646017a6SKeith Busch unsigned long flags; 415646017a6SKeith Busch #define NVME_NS_REMOVING 0 41669d9a99cSKeith Busch #define NVME_NS_DEAD 1 4170d0b660fSChristoph Hellwig #define NVME_NS_ANA_PENDING 2 418b9e03857SThomas Tai 419b9e03857SThomas Tai struct nvme_fault_inject fault_inject; 420b9e03857SThomas Tai 42157dacad5SJay Sternberg }; 42257dacad5SJay Sternberg 4234d2ce688SJames Smart /* NVMe ns supports metadata actions by the controller (generate/strip) */ 4244d2ce688SJames Smart static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 4254d2ce688SJames Smart { 4264d2ce688SJames Smart return ns->pi_type && ns->ms == sizeof(struct t10_pi_tuple); 4274d2ce688SJames Smart } 4284d2ce688SJames Smart 4291c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 4301a353d85SMing Lin const char *name; 431e439bb12SSagi Grimberg struct module *module; 432d3d5b87dSChristoph Hellwig unsigned int flags; 433d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 434c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 435e0596ab2SLogan Gunthorpe #define NVME_F_PCI_P2PDMA (1 << 2) 4361c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 4375fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 4387fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 4391673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 440ad22c355SKeith Busch void (*submit_async_event)(struct nvme_ctrl *ctrl); 441c5017e85SChristoph Hellwig void (*delete_ctrl)(struct nvme_ctrl *ctrl); 4421a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 44357dacad5SJay Sternberg }; 44457dacad5SJay Sternberg 445b9e03857SThomas Tai #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 446a3646451SAkinobu Mita void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 447a3646451SAkinobu Mita const char *dev_name); 448a3646451SAkinobu Mita void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 449b9e03857SThomas Tai void nvme_should_fail(struct request *req); 450b9e03857SThomas Tai #else 451a3646451SAkinobu Mita static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 452a3646451SAkinobu Mita const char *dev_name) 453a3646451SAkinobu Mita { 454a3646451SAkinobu Mita } 455a3646451SAkinobu Mita static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 456a3646451SAkinobu Mita { 457a3646451SAkinobu Mita } 458b9e03857SThomas Tai static inline void nvme_should_fail(struct request *req) {} 459b9e03857SThomas Tai #endif 460b9e03857SThomas Tai 461f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 462f3ca80fcSChristoph Hellwig { 463f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 464f3ca80fcSChristoph Hellwig return -ENOTTY; 465f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 466f3ca80fcSChristoph Hellwig } 467f3ca80fcSChristoph Hellwig 468314d48ddSDamien Le Moal /* 469314d48ddSDamien Le Moal * Convert a 512B sector number to a device logical block number. 470314d48ddSDamien Le Moal */ 471314d48ddSDamien Le Moal static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 47257dacad5SJay Sternberg { 473314d48ddSDamien Le Moal return sector >> (ns->lba_shift - SECTOR_SHIFT); 47457dacad5SJay Sternberg } 47557dacad5SJay Sternberg 476e08f2ae8SDamien Le Moal /* 477e08f2ae8SDamien Le Moal * Convert a device logical block number to a 512B sector number. 478e08f2ae8SDamien Le Moal */ 479e08f2ae8SDamien Le Moal static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 480e08f2ae8SDamien Le Moal { 481e08f2ae8SDamien Le Moal return lba << (ns->lba_shift - SECTOR_SHIFT); 48257dacad5SJay Sternberg } 48357dacad5SJay Sternberg 48471fb90ebSKeith Busch /* 48571fb90ebSKeith Busch * Convert byte length to nvme's 0-based num dwords 48671fb90ebSKeith Busch */ 48771fb90ebSKeith Busch static inline u32 nvme_bytes_to_numd(size_t len) 48871fb90ebSKeith Busch { 48971fb90ebSKeith Busch return (len >> 2) - 1; 49071fb90ebSKeith Busch } 49171fb90ebSKeith Busch 492ff029451SChristoph Hellwig static inline bool nvme_end_request(struct request *req, __le16 status, 49327fa9bc5SChristoph Hellwig union nvme_result result) 49415a190f7SChristoph Hellwig { 49527fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 49627fa9bc5SChristoph Hellwig 49727fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 49827fa9bc5SChristoph Hellwig rq->result = result; 499b9e03857SThomas Tai /* inject error when permitted by fault injection framework */ 500b9e03857SThomas Tai nvme_should_fail(req); 501ff029451SChristoph Hellwig if (unlikely(blk_should_fake_timeout(req->q))) 502ff029451SChristoph Hellwig return true; 503ff029451SChristoph Hellwig return blk_mq_complete_request_remote(req); 50415a190f7SChristoph Hellwig } 50515a190f7SChristoph Hellwig 506d22524a4SChristoph Hellwig static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 507d22524a4SChristoph Hellwig { 508d22524a4SChristoph Hellwig get_device(ctrl->device); 509d22524a4SChristoph Hellwig } 510d22524a4SChristoph Hellwig 511d22524a4SChristoph Hellwig static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 512d22524a4SChristoph Hellwig { 513d22524a4SChristoph Hellwig put_device(ctrl->device); 514d22524a4SChristoph Hellwig } 515d22524a4SChristoph Hellwig 51658a8df67SIsrael Rukshin static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 51758a8df67SIsrael Rukshin { 51858a8df67SIsrael Rukshin return !qid && command_id >= NVME_AQ_BLK_MQ_DEPTH; 51958a8df67SIsrael Rukshin } 52058a8df67SIsrael Rukshin 52177f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 5227baa8572SJens Axboe bool nvme_cancel_request(struct request *req, void *data, bool reserved); 523bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 524bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 525c1ac9a4bSKeith Busch bool nvme_wait_reset(struct nvme_ctrl *ctrl); 526b5b05048SSagi Grimberg int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 527c0f2f45bSSagi Grimberg int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 5285fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 529f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 530f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 53153029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 532d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 533d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 5347fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 5355bae7f73SChristoph Hellwig 5365bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 5371673f1f0SChristoph Hellwig 5384f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 5394f1244c8SChristoph Hellwig bool send); 540a98e58e5SScott Bauer 5417bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 542287a63ebSChristoph Hellwig volatile union nvme_result *res); 543f866fc42SChristoph Hellwig 54425646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 54525646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 54669d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 547d6135c3aSKeith Busch void nvme_sync_queues(struct nvme_ctrl *ctrl); 548302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 549302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 550302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 551302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 552363c9aacSSagi Grimberg 553eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 5544160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 5559a95e4efSBart Van Assche struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 556f7f1fc36SMax Gurtovoy void nvme_cleanup_cmd(struct request *req); 557fc17b653SChristoph Hellwig blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 5588093f7caSMing Lin struct nvme_command *cmd); 55957dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 56057dacad5SJay Sternberg void *buf, unsigned bufflen); 56157dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 562d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 5639a95e4efSBart Van Assche unsigned timeout, int qid, int at_head, 5646287b51cSSagi Grimberg blk_mq_req_flags_t flags, bool poll); 5651a87ee65SKeith Busch int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 5661a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 5671a87ee65SKeith Busch u32 *result); 5681a87ee65SKeith Busch int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 5691a87ee65SKeith Busch unsigned int dword11, void *buffer, size_t buflen, 5701a87ee65SKeith Busch u32 *result); 5719a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 572038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 573d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 57479c48ccfSSagi Grimberg int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 575c1ac9a4bSKeith Busch int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 576c5017e85SChristoph Hellwig int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 57757dacad5SJay Sternberg 578be93e87eSKeith Busch int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 5790e98719bSChristoph Hellwig void *log, size_t size, u64 offset); 580240e6ee2SKeith Busch struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk, 581240e6ee2SKeith Busch struct nvme_ns_head **head, int *srcu_idx); 582240e6ee2SKeith Busch void nvme_put_ns_from_disk(struct nvme_ns_head *head, int idx); 583d558fb51SMatias Bjørling 58433b14f67SHannes Reinecke extern const struct attribute_group *nvme_ns_id_attr_groups[]; 58532acab31SChristoph Hellwig extern const struct block_device_operations nvme_ns_head_ops; 58632acab31SChristoph Hellwig 58732acab31SChristoph Hellwig #ifdef CONFIG_NVME_MULTIPATH 58866b20ac0SMarta Rybczynska static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 58966b20ac0SMarta Rybczynska { 59066b20ac0SMarta Rybczynska return ctrl->ana_log_buf != NULL; 59166b20ac0SMarta Rybczynska } 59266b20ac0SMarta Rybczynska 593b9156daeSSagi Grimberg void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 594b9156daeSSagi Grimberg void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 595b9156daeSSagi Grimberg void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 596a785dbccSKeith Busch void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 597a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags); 598764e9332SJohn Meneghini bool nvme_failover_req(struct request *req); 59932acab31SChristoph Hellwig void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 60032acab31SChristoph Hellwig int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 6010d0b660fSChristoph Hellwig void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 60232acab31SChristoph Hellwig void nvme_mpath_remove_disk(struct nvme_ns_head *head); 6030d0b660fSChristoph Hellwig int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 6040d0b660fSChristoph Hellwig void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 6050d0b660fSChristoph Hellwig void nvme_mpath_stop(struct nvme_ctrl *ctrl); 6060157ec8dSSagi Grimberg bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 6070157ec8dSSagi Grimberg void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 60832acab31SChristoph Hellwig struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 609c62b37d9SChristoph Hellwig blk_qc_t nvme_ns_head_submit_bio(struct bio *bio); 610479a322fSSagi Grimberg 611479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 612479a322fSSagi Grimberg { 613479a322fSSagi Grimberg struct nvme_ns_head *head = ns->head; 614479a322fSSagi Grimberg 615479a322fSSagi Grimberg if (head->disk && list_empty(&head->list)) 616479a322fSSagi Grimberg kblockd_schedule_work(&head->requeue_work); 617479a322fSSagi Grimberg } 618479a322fSSagi Grimberg 61935fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 62035fe0d12SHannes Reinecke blk_status_t status) 62135fe0d12SHannes Reinecke { 62235fe0d12SHannes Reinecke struct nvme_ns *ns = req->q->queuedata; 62335fe0d12SHannes Reinecke 62435fe0d12SHannes Reinecke if (req->cmd_flags & REQ_NVME_MPATH) 625d24de76aSChristoph Hellwig trace_block_bio_complete(ns->head->disk->queue, req->bio); 62635fe0d12SHannes Reinecke } 62735fe0d12SHannes Reinecke 6280d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_grpid; 6290d0b660fSChristoph Hellwig extern struct device_attribute dev_attr_ana_state; 63075c10e73SHannes Reinecke extern struct device_attribute subsys_attr_iopolicy; 6310d0b660fSChristoph Hellwig 63232acab31SChristoph Hellwig #else 6330d0b660fSChristoph Hellwig static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 6340d0b660fSChristoph Hellwig { 6350d0b660fSChristoph Hellwig return false; 6360d0b660fSChristoph Hellwig } 637a785dbccSKeith Busch /* 638a785dbccSKeith Busch * Without the multipath code enabled, multiple controller per subsystems are 639a785dbccSKeith Busch * visible as devices and thus we cannot use the subsystem instance. 640a785dbccSKeith Busch */ 641a785dbccSKeith Busch static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns, 642a785dbccSKeith Busch struct nvme_ctrl *ctrl, int *flags) 643a785dbccSKeith Busch { 644a785dbccSKeith Busch sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance); 645a785dbccSKeith Busch } 646a785dbccSKeith Busch 647764e9332SJohn Meneghini static inline bool nvme_failover_req(struct request *req) 64832acab31SChristoph Hellwig { 649764e9332SJohn Meneghini return false; 65032acab31SChristoph Hellwig } 65132acab31SChristoph Hellwig static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 65232acab31SChristoph Hellwig { 65332acab31SChristoph Hellwig } 65432acab31SChristoph Hellwig static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 65532acab31SChristoph Hellwig struct nvme_ns_head *head) 65632acab31SChristoph Hellwig { 65732acab31SChristoph Hellwig return 0; 65832acab31SChristoph Hellwig } 6590d0b660fSChristoph Hellwig static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 6600d0b660fSChristoph Hellwig struct nvme_id_ns *id) 66132acab31SChristoph Hellwig { 66232acab31SChristoph Hellwig } 66332acab31SChristoph Hellwig static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 66432acab31SChristoph Hellwig { 66532acab31SChristoph Hellwig } 6660157ec8dSSagi Grimberg static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 6670157ec8dSSagi Grimberg { 6680157ec8dSSagi Grimberg return false; 6690157ec8dSSagi Grimberg } 6700157ec8dSSagi Grimberg static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 67132acab31SChristoph Hellwig { 67232acab31SChristoph Hellwig } 673479a322fSSagi Grimberg static inline void nvme_mpath_check_last_path(struct nvme_ns *ns) 674479a322fSSagi Grimberg { 675479a322fSSagi Grimberg } 67635fe0d12SHannes Reinecke static inline void nvme_trace_bio_complete(struct request *req, 67735fe0d12SHannes Reinecke blk_status_t status) 67835fe0d12SHannes Reinecke { 67935fe0d12SHannes Reinecke } 6800d0b660fSChristoph Hellwig static inline int nvme_mpath_init(struct nvme_ctrl *ctrl, 6810d0b660fSChristoph Hellwig struct nvme_id_ctrl *id) 6820d0b660fSChristoph Hellwig { 68314a1336eSChristoph Hellwig if (ctrl->subsys->cmic & (1 << 3)) 68414a1336eSChristoph Hellwig dev_warn(ctrl->device, 68514a1336eSChristoph Hellwig "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 6860d0b660fSChristoph Hellwig return 0; 6870d0b660fSChristoph Hellwig } 6880d0b660fSChristoph Hellwig static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 6890d0b660fSChristoph Hellwig { 6900d0b660fSChristoph Hellwig } 6910d0b660fSChristoph Hellwig static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 6920d0b660fSChristoph Hellwig { 6930d0b660fSChristoph Hellwig } 694b9156daeSSagi Grimberg static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 695b9156daeSSagi Grimberg { 696b9156daeSSagi Grimberg } 697b9156daeSSagi Grimberg static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 698b9156daeSSagi Grimberg { 699b9156daeSSagi Grimberg } 700b9156daeSSagi Grimberg static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 701b9156daeSSagi Grimberg { 702b9156daeSSagi Grimberg } 70332acab31SChristoph Hellwig #endif /* CONFIG_NVME_MULTIPATH */ 70432acab31SChristoph Hellwig 705240e6ee2SKeith Busch #ifdef CONFIG_BLK_DEV_ZONED 706240e6ee2SKeith Busch int nvme_update_zone_info(struct gendisk *disk, struct nvme_ns *ns, 707240e6ee2SKeith Busch unsigned lbaf); 708240e6ee2SKeith Busch 709240e6ee2SKeith Busch int nvme_report_zones(struct gendisk *disk, sector_t sector, 710240e6ee2SKeith Busch unsigned int nr_zones, report_zones_cb cb, void *data); 711240e6ee2SKeith Busch 712240e6ee2SKeith Busch blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 713240e6ee2SKeith Busch struct nvme_command *cmnd, 714240e6ee2SKeith Busch enum nvme_zone_mgmt_action action); 715240e6ee2SKeith Busch #else 716240e6ee2SKeith Busch #define nvme_report_zones NULL 717240e6ee2SKeith Busch 718240e6ee2SKeith Busch static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 719240e6ee2SKeith Busch struct request *req, struct nvme_command *cmnd, 720240e6ee2SKeith Busch enum nvme_zone_mgmt_action action) 721240e6ee2SKeith Busch { 722240e6ee2SKeith Busch return BLK_STS_NOTSUPP; 723240e6ee2SKeith Busch } 724240e6ee2SKeith Busch 725240e6ee2SKeith Busch static inline int nvme_update_zone_info(struct gendisk *disk, 726240e6ee2SKeith Busch struct nvme_ns *ns, 727240e6ee2SKeith Busch unsigned lbaf) 728240e6ee2SKeith Busch { 729240e6ee2SKeith Busch dev_warn(ns->ctrl->device, 730240e6ee2SKeith Busch "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 731240e6ee2SKeith Busch return -EPROTONOSUPPORT; 732240e6ee2SKeith Busch } 733240e6ee2SKeith Busch #endif 734240e6ee2SKeith Busch 735c4699e70SKeith Busch #ifdef CONFIG_NVM 7363dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 737b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 73833b14f67SHannes Reinecke extern const struct attribute_group nvme_nvm_attr_group; 73984d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 740c4699e70SKeith Busch #else 741b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 7423dc87dd0SMatias Bjørling int node) 743c4699e70SKeith Busch { 744c4699e70SKeith Busch return 0; 745c4699e70SKeith Busch } 746c4699e70SKeith Busch 747b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 74884d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 74984d4add7SMatias Bjørling unsigned long arg) 75084d4add7SMatias Bjørling { 75184d4add7SMatias Bjørling return -ENOTTY; 75284d4add7SMatias Bjørling } 7533dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 7543dc87dd0SMatias Bjørling 75540267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 75640267efdSSimon A. F. Lund { 75740267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 75840267efdSSimon A. F. Lund } 759ca064085SMatias Bjørling 760400b6a7bSGuenter Roeck #ifdef CONFIG_NVME_HWMON 761400b6a7bSGuenter Roeck void nvme_hwmon_init(struct nvme_ctrl *ctrl); 762400b6a7bSGuenter Roeck #else 763400b6a7bSGuenter Roeck static inline void nvme_hwmon_init(struct nvme_ctrl *ctrl) { } 764400b6a7bSGuenter Roeck #endif 765400b6a7bSGuenter Roeck 76657dacad5SJay Sternberg #endif /* _NVME_H */ 767