157dacad5SJay Sternberg /* 257dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 357dacad5SJay Sternberg * 457dacad5SJay Sternberg * This program is free software; you can redistribute it and/or modify it 557dacad5SJay Sternberg * under the terms and conditions of the GNU General Public License, 657dacad5SJay Sternberg * version 2, as published by the Free Software Foundation. 757dacad5SJay Sternberg * 857dacad5SJay Sternberg * This program is distributed in the hope it will be useful, but WITHOUT 957dacad5SJay Sternberg * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1057dacad5SJay Sternberg * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1157dacad5SJay Sternberg * more details. 1257dacad5SJay Sternberg */ 1357dacad5SJay Sternberg 1457dacad5SJay Sternberg #ifndef _NVME_H 1557dacad5SJay Sternberg #define _NVME_H 1657dacad5SJay Sternberg 1757dacad5SJay Sternberg #include <linux/nvme.h> 18a6a5149bSChristoph Hellwig #include <linux/cdev.h> 1957dacad5SJay Sternberg #include <linux/pci.h> 2057dacad5SJay Sternberg #include <linux/kref.h> 2157dacad5SJay Sternberg #include <linux/blk-mq.h> 22b0b4e09cSMatias Bjørling #include <linux/lightnvm.h> 23a98e58e5SScott Bauer #include <linux/sed-opal.h> 2457dacad5SJay Sternberg 258ae4e447SMarc Olson extern unsigned int nvme_io_timeout; 2657dacad5SJay Sternberg #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 2757dacad5SJay Sternberg 288ae4e447SMarc Olson extern unsigned int admin_timeout; 2921d34711SChristoph Hellwig #define ADMIN_TIMEOUT (admin_timeout * HZ) 3021d34711SChristoph Hellwig 31038bd4cbSSagi Grimberg #define NVME_DEFAULT_KATO 5 32038bd4cbSSagi Grimberg #define NVME_KATO_GRACE 10 33038bd4cbSSagi Grimberg 349a6327d2SSagi Grimberg extern struct workqueue_struct *nvme_wq; 359a6327d2SSagi Grimberg 36ca064085SMatias Bjørling enum { 37ca064085SMatias Bjørling NVME_NS_LBA = 0, 38ca064085SMatias Bjørling NVME_NS_LIGHTNVM = 1, 39ca064085SMatias Bjørling }; 40ca064085SMatias Bjørling 4157dacad5SJay Sternberg /* 42106198edSChristoph Hellwig * List of workarounds for devices that required behavior not specified in 43106198edSChristoph Hellwig * the standard. 4457dacad5SJay Sternberg */ 45106198edSChristoph Hellwig enum nvme_quirks { 46106198edSChristoph Hellwig /* 47106198edSChristoph Hellwig * Prefers I/O aligned to a stripe size specified in a vendor 48106198edSChristoph Hellwig * specific Identify field. 49106198edSChristoph Hellwig */ 50106198edSChristoph Hellwig NVME_QUIRK_STRIPE_SIZE = (1 << 0), 51540c801cSKeith Busch 52540c801cSKeith Busch /* 53540c801cSKeith Busch * The controller doesn't handle Identify value others than 0 or 1 54540c801cSKeith Busch * correctly. 55540c801cSKeith Busch */ 56540c801cSKeith Busch NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 5708095e70SKeith Busch 5808095e70SKeith Busch /* 59e850fd16SChristoph Hellwig * The controller deterministically returns O's on reads to 60e850fd16SChristoph Hellwig * logical blocks that deallocate was called on. 6108095e70SKeith Busch */ 62e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 6354adc010SGuilherme G. Piccoli 6454adc010SGuilherme G. Piccoli /* 6554adc010SGuilherme G. Piccoli * The controller needs a delay before starts checking the device 6654adc010SGuilherme G. Piccoli * readiness, which is done by reading the NVME_CSTS_RDY bit. 6754adc010SGuilherme G. Piccoli */ 6854adc010SGuilherme G. Piccoli NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 69c5552fdeSAndy Lutomirski 70c5552fdeSAndy Lutomirski /* 71c5552fdeSAndy Lutomirski * APST should not be used. 72c5552fdeSAndy Lutomirski */ 73c5552fdeSAndy Lutomirski NVME_QUIRK_NO_APST = (1 << 4), 74ff5350a8SAndy Lutomirski 75ff5350a8SAndy Lutomirski /* 76ff5350a8SAndy Lutomirski * The deepest sleep state should not be used. 77ff5350a8SAndy Lutomirski */ 78ff5350a8SAndy Lutomirski NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 79608cc4b1SChristoph Hellwig 80608cc4b1SChristoph Hellwig /* 81608cc4b1SChristoph Hellwig * Supports the LighNVM command set if indicated in vs[1]. 82608cc4b1SChristoph Hellwig */ 83608cc4b1SChristoph Hellwig NVME_QUIRK_LIGHTNVM = (1 << 6), 84106198edSChristoph Hellwig }; 85106198edSChristoph Hellwig 86d49187e9SChristoph Hellwig /* 87d49187e9SChristoph Hellwig * Common request structure for NVMe passthrough. All drivers must have 88d49187e9SChristoph Hellwig * this structure as the first member of their request-private data. 89d49187e9SChristoph Hellwig */ 90d49187e9SChristoph Hellwig struct nvme_request { 91d49187e9SChristoph Hellwig struct nvme_command *cmd; 92d49187e9SChristoph Hellwig union nvme_result result; 9344e44b29SChristoph Hellwig u8 retries; 9427fa9bc5SChristoph Hellwig u8 flags; 9527fa9bc5SChristoph Hellwig u16 status; 9627fa9bc5SChristoph Hellwig }; 9727fa9bc5SChristoph Hellwig 9827fa9bc5SChristoph Hellwig enum { 9927fa9bc5SChristoph Hellwig NVME_REQ_CANCELLED = (1 << 0), 100d49187e9SChristoph Hellwig }; 101d49187e9SChristoph Hellwig 102d49187e9SChristoph Hellwig static inline struct nvme_request *nvme_req(struct request *req) 103d49187e9SChristoph Hellwig { 104d49187e9SChristoph Hellwig return blk_mq_rq_to_pdu(req); 105d49187e9SChristoph Hellwig } 106d49187e9SChristoph Hellwig 10754adc010SGuilherme G. Piccoli /* The below value is the specific amount of delay needed before checking 10854adc010SGuilherme G. Piccoli * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 10954adc010SGuilherme G. Piccoli * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 11054adc010SGuilherme G. Piccoli * found empirically. 11154adc010SGuilherme G. Piccoli */ 11254adc010SGuilherme G. Piccoli #define NVME_QUIRK_DELAY_AMOUNT 2000 11354adc010SGuilherme G. Piccoli 114bb8d261eSChristoph Hellwig enum nvme_ctrl_state { 115bb8d261eSChristoph Hellwig NVME_CTRL_NEW, 116bb8d261eSChristoph Hellwig NVME_CTRL_LIVE, 117bb8d261eSChristoph Hellwig NVME_CTRL_RESETTING, 118def61ecaSChristoph Hellwig NVME_CTRL_RECONNECTING, 119bb8d261eSChristoph Hellwig NVME_CTRL_DELETING, 1200ff9d4e1SKeith Busch NVME_CTRL_DEAD, 121bb8d261eSChristoph Hellwig }; 122bb8d261eSChristoph Hellwig 1231c63dc66SChristoph Hellwig struct nvme_ctrl { 124bb8d261eSChristoph Hellwig enum nvme_ctrl_state state; 125bd4da3abSAndy Lutomirski bool identified; 126bb8d261eSChristoph Hellwig spinlock_t lock; 1271c63dc66SChristoph Hellwig const struct nvme_ctrl_ops *ops; 12857dacad5SJay Sternberg struct request_queue *admin_q; 12907bfcd09SChristoph Hellwig struct request_queue *connect_q; 13057dacad5SJay Sternberg struct device *dev; 13157dacad5SJay Sternberg int instance; 1325bae7f73SChristoph Hellwig struct blk_mq_tag_set *tagset; 13334b6c231SSagi Grimberg struct blk_mq_tag_set *admin_tagset; 1345bae7f73SChristoph Hellwig struct list_head namespaces; 13569d3b8acSChristoph Hellwig struct mutex namespaces_mutex; 136d22524a4SChristoph Hellwig struct device ctrl_device; 1375bae7f73SChristoph Hellwig struct device *device; /* char device */ 138a6a5149bSChristoph Hellwig struct cdev cdev; 139075790ebSKeith Busch struct ida ns_ida; 140d86c4d8eSChristoph Hellwig struct work_struct reset_work; 141c5017e85SChristoph Hellwig struct work_struct delete_work; 1421c63dc66SChristoph Hellwig 143ab9e00ccSChristoph Hellwig struct nvme_subsystem *subsys; 144ab9e00ccSChristoph Hellwig struct list_head subsys_entry; 145ab9e00ccSChristoph Hellwig 1464f1244c8SChristoph Hellwig struct opal_dev *opal_dev; 147a98e58e5SScott Bauer 14857dacad5SJay Sternberg char name[12]; 14976e3914aSChristoph Hellwig u16 cntlid; 1505fd4ce1bSChristoph Hellwig 1515fd4ce1bSChristoph Hellwig u32 ctrl_config; 152b6dccf7fSArnav Dawn u16 mtfa; 153d858e5f0SSagi Grimberg u32 queue_count; 1545fd4ce1bSChristoph Hellwig 15520d0dfe6SSagi Grimberg u64 cap; 1565fd4ce1bSChristoph Hellwig u32 page_size; 15757dacad5SJay Sternberg u32 max_hw_sectors; 15857dacad5SJay Sternberg u16 oncs; 1598a9ae523SScott Bauer u16 oacs; 160f5d11840SJens Axboe u16 nssa; 161f5d11840SJens Axboe u16 nr_streams; 1626bf25d16SChristoph Hellwig atomic_t abort_limit; 16357dacad5SJay Sternberg u8 vwc; 164f3ca80fcSChristoph Hellwig u32 vs; 16507bfcd09SChristoph Hellwig u32 sgls; 166038bd4cbSSagi Grimberg u16 kas; 167c5552fdeSAndy Lutomirski u8 npss; 168c5552fdeSAndy Lutomirski u8 apsta; 169e3d7874dSKeith Busch u32 aen_result; 17007fbd32aSMartin K. Petersen unsigned int shutdown_timeout; 171038bd4cbSSagi Grimberg unsigned int kato; 172f3ca80fcSChristoph Hellwig bool subsystem; 173106198edSChristoph Hellwig unsigned long quirks; 174c5552fdeSAndy Lutomirski struct nvme_id_power_state psd[32]; 17584fef62dSKeith Busch struct nvme_effects_log *effects; 1765955be21SChristoph Hellwig struct work_struct scan_work; 177f866fc42SChristoph Hellwig struct work_struct async_event_work; 178038bd4cbSSagi Grimberg struct delayed_work ka_work; 179b6dccf7fSArnav Dawn struct work_struct fw_act_work; 18007bfcd09SChristoph Hellwig 181c5552fdeSAndy Lutomirski /* Power saving configuration */ 182c5552fdeSAndy Lutomirski u64 ps_max_latency_us; 18376a5af84SKai-Heng Feng bool apst_enabled; 184c5552fdeSAndy Lutomirski 185044a9df1SChristoph Hellwig /* PCIe only: */ 186fe6d53c9SChristoph Hellwig u32 hmpre; 187fe6d53c9SChristoph Hellwig u32 hmmin; 188044a9df1SChristoph Hellwig u32 hmminds; 189044a9df1SChristoph Hellwig u16 hmmaxd; 190fe6d53c9SChristoph Hellwig 19107bfcd09SChristoph Hellwig /* Fabrics only */ 19207bfcd09SChristoph Hellwig u16 sqsize; 19307bfcd09SChristoph Hellwig u32 ioccsz; 19407bfcd09SChristoph Hellwig u32 iorcsz; 19507bfcd09SChristoph Hellwig u16 icdoff; 19607bfcd09SChristoph Hellwig u16 maxcmd; 197fdf9dfa8SSagi Grimberg int nr_reconnects; 19807bfcd09SChristoph Hellwig struct nvmf_ctrl_options *opts; 19957dacad5SJay Sternberg }; 20057dacad5SJay Sternberg 201ab9e00ccSChristoph Hellwig struct nvme_subsystem { 202ab9e00ccSChristoph Hellwig int instance; 203ab9e00ccSChristoph Hellwig struct device dev; 204ab9e00ccSChristoph Hellwig /* 205ab9e00ccSChristoph Hellwig * Because we unregister the device on the last put we need 206ab9e00ccSChristoph Hellwig * a separate refcount. 207ab9e00ccSChristoph Hellwig */ 208ab9e00ccSChristoph Hellwig struct kref ref; 209ab9e00ccSChristoph Hellwig struct list_head entry; 210ab9e00ccSChristoph Hellwig struct mutex lock; 211ab9e00ccSChristoph Hellwig struct list_head ctrls; 212ab9e00ccSChristoph Hellwig char subnqn[NVMF_NQN_SIZE]; 213ab9e00ccSChristoph Hellwig char serial[20]; 214ab9e00ccSChristoph Hellwig char model[40]; 215ab9e00ccSChristoph Hellwig char firmware_rev[8]; 216ab9e00ccSChristoph Hellwig u8 cmic; 217ab9e00ccSChristoph Hellwig u16 vendor_id; 218ab9e00ccSChristoph Hellwig }; 219ab9e00ccSChristoph Hellwig 220002fab04SChristoph Hellwig /* 221002fab04SChristoph Hellwig * Container structure for uniqueue namespace identifiers. 222002fab04SChristoph Hellwig */ 223002fab04SChristoph Hellwig struct nvme_ns_ids { 224002fab04SChristoph Hellwig u8 eui64[8]; 225002fab04SChristoph Hellwig u8 nguid[16]; 226002fab04SChristoph Hellwig uuid_t uuid; 227002fab04SChristoph Hellwig }; 228002fab04SChristoph Hellwig 22957dacad5SJay Sternberg struct nvme_ns { 23057dacad5SJay Sternberg struct list_head list; 23157dacad5SJay Sternberg 2321c63dc66SChristoph Hellwig struct nvme_ctrl *ctrl; 23357dacad5SJay Sternberg struct request_queue *queue; 23457dacad5SJay Sternberg struct gendisk *disk; 235b0b4e09cSMatias Bjørling struct nvm_dev *ndev; 23657dacad5SJay Sternberg struct kref kref; 237075790ebSKeith Busch int instance; 23857dacad5SJay Sternberg 23957dacad5SJay Sternberg unsigned ns_id; 240002fab04SChristoph Hellwig struct nvme_ns_ids ids; 24157dacad5SJay Sternberg int lba_shift; 24257dacad5SJay Sternberg u16 ms; 243f5d11840SJens Axboe u16 sgs; 244f5d11840SJens Axboe u32 sws; 24557dacad5SJay Sternberg bool ext; 24657dacad5SJay Sternberg u8 pi_type; 247646017a6SKeith Busch unsigned long flags; 248646017a6SKeith Busch #define NVME_NS_REMOVING 0 24969d9a99cSKeith Busch #define NVME_NS_DEAD 1 25057eeaf8eSChristoph Hellwig u16 noiob; 25157dacad5SJay Sternberg }; 25257dacad5SJay Sternberg 2531c63dc66SChristoph Hellwig struct nvme_ctrl_ops { 2541a353d85SMing Lin const char *name; 255e439bb12SSagi Grimberg struct module *module; 256d3d5b87dSChristoph Hellwig unsigned int flags; 257d3d5b87dSChristoph Hellwig #define NVME_F_FABRICS (1 << 0) 258c81bfba9SChristoph Hellwig #define NVME_F_METADATA_SUPPORTED (1 << 1) 2591c63dc66SChristoph Hellwig int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 2605fd4ce1bSChristoph Hellwig int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 2617fd8930fSChristoph Hellwig int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 2621673f1f0SChristoph Hellwig void (*free_ctrl)(struct nvme_ctrl *ctrl); 263ad22c355SKeith Busch void (*submit_async_event)(struct nvme_ctrl *ctrl); 264c5017e85SChristoph Hellwig void (*delete_ctrl)(struct nvme_ctrl *ctrl); 2651a353d85SMing Lin int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 26631b84460SSagi Grimberg int (*reinit_request)(void *data, struct request *rq); 26757dacad5SJay Sternberg }; 26857dacad5SJay Sternberg 2691c63dc66SChristoph Hellwig static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) 2701c63dc66SChristoph Hellwig { 2711c63dc66SChristoph Hellwig u32 val = 0; 2721c63dc66SChristoph Hellwig 2731c63dc66SChristoph Hellwig if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) 2741c63dc66SChristoph Hellwig return false; 2751c63dc66SChristoph Hellwig return val & NVME_CSTS_RDY; 2761c63dc66SChristoph Hellwig } 2771c63dc66SChristoph Hellwig 278f3ca80fcSChristoph Hellwig static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 279f3ca80fcSChristoph Hellwig { 280f3ca80fcSChristoph Hellwig if (!ctrl->subsystem) 281f3ca80fcSChristoph Hellwig return -ENOTTY; 282f3ca80fcSChristoph Hellwig return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 283f3ca80fcSChristoph Hellwig } 284f3ca80fcSChristoph Hellwig 28557dacad5SJay Sternberg static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) 28657dacad5SJay Sternberg { 28757dacad5SJay Sternberg return (sector >> (ns->lba_shift - 9)); 28857dacad5SJay Sternberg } 28957dacad5SJay Sternberg 2906904242dSMing Lin static inline void nvme_cleanup_cmd(struct request *req) 2916904242dSMing Lin { 292f9d03f96SChristoph Hellwig if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 293f9d03f96SChristoph Hellwig kfree(page_address(req->special_vec.bv_page) + 294f9d03f96SChristoph Hellwig req->special_vec.bv_offset); 295f9d03f96SChristoph Hellwig } 2966904242dSMing Lin } 2976904242dSMing Lin 29827fa9bc5SChristoph Hellwig static inline void nvme_end_request(struct request *req, __le16 status, 29927fa9bc5SChristoph Hellwig union nvme_result result) 30015a190f7SChristoph Hellwig { 30127fa9bc5SChristoph Hellwig struct nvme_request *rq = nvme_req(req); 30227fa9bc5SChristoph Hellwig 30327fa9bc5SChristoph Hellwig rq->status = le16_to_cpu(status) >> 1; 30427fa9bc5SChristoph Hellwig rq->result = result; 30508e0029aSChristoph Hellwig blk_mq_complete_request(req); 30615a190f7SChristoph Hellwig } 30715a190f7SChristoph Hellwig 308d22524a4SChristoph Hellwig static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 309d22524a4SChristoph Hellwig { 310d22524a4SChristoph Hellwig get_device(ctrl->device); 311d22524a4SChristoph Hellwig } 312d22524a4SChristoph Hellwig 313d22524a4SChristoph Hellwig static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 314d22524a4SChristoph Hellwig { 315d22524a4SChristoph Hellwig put_device(ctrl->device); 316d22524a4SChristoph Hellwig } 317d22524a4SChristoph Hellwig 31877f02a7aSChristoph Hellwig void nvme_complete_rq(struct request *req); 319c55a2fd4SMing Lin void nvme_cancel_request(struct request *req, void *data, bool reserved); 320bb8d261eSChristoph Hellwig bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 321bb8d261eSChristoph Hellwig enum nvme_ctrl_state new_state); 3225fd4ce1bSChristoph Hellwig int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 3235fd4ce1bSChristoph Hellwig int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); 3245fd4ce1bSChristoph Hellwig int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 325f3ca80fcSChristoph Hellwig int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 326f3ca80fcSChristoph Hellwig const struct nvme_ctrl_ops *ops, unsigned long quirks); 32753029b04SKeith Busch void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 328d09f2b45SSagi Grimberg void nvme_start_ctrl(struct nvme_ctrl *ctrl); 329d09f2b45SSagi Grimberg void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 3301673f1f0SChristoph Hellwig void nvme_put_ctrl(struct nvme_ctrl *ctrl); 3317fd8930fSChristoph Hellwig int nvme_init_identify(struct nvme_ctrl *ctrl); 3325bae7f73SChristoph Hellwig 3335955be21SChristoph Hellwig void nvme_queue_scan(struct nvme_ctrl *ctrl); 3345bae7f73SChristoph Hellwig void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 3351673f1f0SChristoph Hellwig 3364f1244c8SChristoph Hellwig int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 3374f1244c8SChristoph Hellwig bool send); 338a98e58e5SScott Bauer 3397bf58533SChristoph Hellwig void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 3407bf58533SChristoph Hellwig union nvme_result *res); 341f866fc42SChristoph Hellwig 34225646264SKeith Busch void nvme_stop_queues(struct nvme_ctrl *ctrl); 34325646264SKeith Busch void nvme_start_queues(struct nvme_ctrl *ctrl); 34469d9a99cSKeith Busch void nvme_kill_queues(struct nvme_ctrl *ctrl); 345302ad8ccSKeith Busch void nvme_unfreeze(struct nvme_ctrl *ctrl); 346302ad8ccSKeith Busch void nvme_wait_freeze(struct nvme_ctrl *ctrl); 347302ad8ccSKeith Busch void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 348302ad8ccSKeith Busch void nvme_start_freeze(struct nvme_ctrl *ctrl); 34931b84460SSagi Grimberg int nvme_reinit_tagset(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set); 350363c9aacSSagi Grimberg 351eb71f435SChristoph Hellwig #define NVME_QID_ANY -1 3524160982eSChristoph Hellwig struct request *nvme_alloc_request(struct request_queue *q, 3539a95e4efSBart Van Assche struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid); 354fc17b653SChristoph Hellwig blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 3558093f7caSMing Lin struct nvme_command *cmd); 35657dacad5SJay Sternberg int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 35757dacad5SJay Sternberg void *buf, unsigned bufflen); 35857dacad5SJay Sternberg int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 359d49187e9SChristoph Hellwig union nvme_result *result, void *buffer, unsigned bufflen, 3609a95e4efSBart Van Assche unsigned timeout, int qid, int at_head, 3619a95e4efSBart Van Assche blk_mq_req_flags_t flags); 3629a0be7abSChristoph Hellwig int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 363038bd4cbSSagi Grimberg void nvme_start_keep_alive(struct nvme_ctrl *ctrl); 364038bd4cbSSagi Grimberg void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 365d86c4d8eSChristoph Hellwig int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 366c5017e85SChristoph Hellwig int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 367c5017e85SChristoph Hellwig int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 36857dacad5SJay Sternberg 369c4699e70SKeith Busch #ifdef CONFIG_NVM 3703dc87dd0SMatias Bjørling int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); 371b0b4e09cSMatias Bjørling void nvme_nvm_unregister(struct nvme_ns *ns); 3723dc87dd0SMatias Bjørling int nvme_nvm_register_sysfs(struct nvme_ns *ns); 3733dc87dd0SMatias Bjørling void nvme_nvm_unregister_sysfs(struct nvme_ns *ns); 37484d4add7SMatias Bjørling int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); 375c4699e70SKeith Busch #else 376b0b4e09cSMatias Bjørling static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, 3773dc87dd0SMatias Bjørling int node) 378c4699e70SKeith Busch { 379c4699e70SKeith Busch return 0; 380c4699e70SKeith Busch } 381c4699e70SKeith Busch 382b0b4e09cSMatias Bjørling static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; 3833dc87dd0SMatias Bjørling static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns) 3843dc87dd0SMatias Bjørling { 3853dc87dd0SMatias Bjørling return 0; 3863dc87dd0SMatias Bjørling } 3873dc87dd0SMatias Bjørling static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {}; 38884d4add7SMatias Bjørling static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, 38984d4add7SMatias Bjørling unsigned long arg) 39084d4add7SMatias Bjørling { 39184d4add7SMatias Bjørling return -ENOTTY; 39284d4add7SMatias Bjørling } 3933dc87dd0SMatias Bjørling #endif /* CONFIG_NVM */ 3943dc87dd0SMatias Bjørling 39540267efdSSimon A. F. Lund static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 39640267efdSSimon A. F. Lund { 39740267efdSSimon A. F. Lund return dev_to_disk(dev)->private_data; 39840267efdSSimon A. F. Lund } 399ca064085SMatias Bjørling 4005bae7f73SChristoph Hellwig int __init nvme_core_init(void); 4015bae7f73SChristoph Hellwig void nvme_core_exit(void); 4025bae7f73SChristoph Hellwig 40357dacad5SJay Sternberg #endif /* _NVME_H */ 404